diff options
author | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2007-12-27 14:58:48 +0000 |
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committer | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2007-12-27 14:58:48 +0000 |
commit | 23d61f22e9a68a7873626df4a01c60794f1acb7a (patch) | |
tree | 3e4370267151420e590118d11e642251d0727a65 /target/linux/adm5120/files/include/asm-mips | |
parent | 4bb1a03501d50b2f61888464e56ad1c030f207bf (diff) |
[adm5120] change switch register access macros
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@9962 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/adm5120/files/include/asm-mips')
-rw-r--r-- | target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h | 4 | ||||
-rw-r--r-- | target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h index 8d86fc6e78..a321db5d4a 100644 --- a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h +++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h @@ -65,8 +65,8 @@ static inline void adm5120_nand_enable(void) { - SW_WRITE_REG(BW_CNTL1, BW_CNTL1_NAND_ENABLE); - SW_WRITE_REG(BOOT_DONE, 1); + SW_WRITE_REG(SWITCH_REG_BW_CNTL1, BW_CNTL1_NAND_ENABLE); + SW_WRITE_REG(SWITCH_REG_BOOT_DONE, 1); } static inline void adm5120_nand_set_wpn(unsigned int set) diff --git a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h index f96c7d50c7..9ed5233cb5 100644 --- a/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h +++ b/target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h @@ -32,9 +32,9 @@ #define BITMASK(len) ((1 << (len))-1) #define SW_READ_REG(r) __raw_readl( \ - (void __iomem *)KSEG1ADDR(ADM5120_SWITCH_BASE) + SWITCH_REG_ ## r) + (void __iomem *)KSEG1ADDR(ADM5120_SWITCH_BASE) + r) #define SW_WRITE_REG(r, v) __raw_writel((v), \ - (void __iomem *)KSEG1ADDR(ADM5120_SWITCH_BASE) + SWITCH_REG_ ## r) + (void __iomem *)KSEG1ADDR(ADM5120_SWITCH_BASE) + r) /* Switch register offsets */ #define SWITCH_REG_CODE 0x0000 |