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authorralph <ralph@3c298f89-4303-0410-b956-a3cf2f4a3e73>2010-03-30 13:56:30 +0000
committerralph <ralph@3c298f89-4303-0410-b956-a3cf2f4a3e73>2010-03-30 13:56:30 +0000
commit05c930e80a27d5caac4ab057a906a075f59635ea (patch)
treea19841702989970a92a696107402d351e5824251 /package/uboot-lantiq/files/board/infineon/easy50812/pmuenable.S
parente0e232b87230222418b8df5444e2975e1a6ceb33 (diff)
[uboot-lantiq] add preliminary AR9 support
attention: if caches enabled the network is broken attention: the network of the flash image doesn't work because of enabled caches git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20606 3c298f89-4303-0410-b956-a3cf2f4a3e73
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1 files changed, 48 insertions, 0 deletions
diff --git a/package/uboot-lantiq/files/board/infineon/easy50812/pmuenable.S b/package/uboot-lantiq/files/board/infineon/easy50812/pmuenable.S
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+++ b/package/uboot-lantiq/files/board/infineon/easy50812/pmuenable.S
@@ -0,0 +1,48 @@
+/*
+ * Power Management unit initialization code for AMAZON development board.
+ *
+ * Copyright (c) 2003 Ou Ke, Infineon.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <config.h>
+#include <version.h>
+#include <asm/regdef.h>
+
+#define PMU_PWDCR 0xBF10201C
+#define PMU_SR 0xBF102020
+
+ .globl pmuenable
+
+pmuenable:
+ li t0, PMU_PWDCR
+ li t1, 0x2 /* enable everything */
+ sw t1, 0(t0)
+#if 0
+1:
+ li t0, PMU_SR
+ lw t2, 0(t0)
+ bne t1, t2, 1b
+ nop
+#endif
+ j ra
+ nop
+
+