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authorblogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73>2011-01-23 12:06:02 +0000
committerblogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73>2011-01-23 12:06:02 +0000
commitc2b8621119738aac39db105734f81bb67e32ce07 (patch)
tree62bb5fa6f0cead9edc7d0a67585b62997328a5d1 /package/uboot-lantiq/arcadyan_psc166.conf
parentf3cd157b433d87429df2aa6dd152db6385f8774f (diff)
[uboot-lantiq] add support for arv4518 and arv752DWP22 boards
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@25071 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'package/uboot-lantiq/arcadyan_psc166.conf')
-rw-r--r--package/uboot-lantiq/arcadyan_psc166.conf141
1 files changed, 141 insertions, 0 deletions
diff --git a/package/uboot-lantiq/arcadyan_psc166.conf b/package/uboot-lantiq/arcadyan_psc166.conf
new file mode 100644
index 0000000000..8cae0c77e2
--- /dev/null
+++ b/package/uboot-lantiq/arcadyan_psc166.conf
@@ -0,0 +1,141 @@
+ 0xbf800060 0x7
+ 0xbf800010 0x0
+ 0xbf800020 0x0
+ 0xbf800200 0x02
+ 0xbf800210 0x0
+
+;REG32(MC_DC0) = 0x00001B1B;
+ 0xbf801000 0x1b1b
+;REG32(MC_DC1) = 0x00000000;
+ 0xbf801010 0x0
+;REG32(MC_DC2) = 0x00000000;
+ 0xbf801020 0x0
+;REG32(MC_DC3) = 0x00000000;
+ 0xbf801030 0x0
+;REG32(MC_DC4) = 0x00000000;
+ 0xbf801040 0x0
+;REG32(MC_DC5) = 0x00000200;
+ 0xbf801050 0x200
+;REG32(MC_DC6) = 0x00000306;
+; 0xbf801060 0x0306
+ 0xbf801060 0x0605
+;REG32(MC_DC7) = 0x00000303;
+; 0xbf801070 0x302
+; 0xbf801070 0x0203
+ 0xbf801070 0x0303
+;REG32(MC_DC8) = 0x00000102;
+ 0xbf801080 0x102
+;REG32(MC_DC9) = 0x0000070A;
+ 0xbf801090 0x70a
+; 0xbf801090 0x608
+;REG32(MC_DC10) = 0x00000203;
+ 0xbf8010a0 0x203
+;REG32(MC_DC11) = 0x00000C02;
+ 0xbf8010b0 0xc02
+; 0xbf8010b0 0x0a02
+;REG32(MC_DC12) = 0x000001C8;
+ 0xbf8010c0 0x1c8
+;REG32(MC_DC13) = 0x00000001;
+ 0xbf8010d0 0x1
+;REG32(MC_DC14) = 0x00000000;
+ 0xbf8010e0 0x0
+;REG32(MC_DC15) = 0x00000F5F;
+; 0xbf8010f0 0xf5f
+; 0xbf8010f0 0xf3c
+ 0xbf8010f0 0x130
+;REG32(MC_DC16) = 0x0000C800;
+ 0xbf801100 0xc800
+;REG32(MC_DC17) = 0x0000000D;
+; 0xbf801110 0xd
+ 0xbf801110 0xd
+;REG32(MC_DC18) = 0x00000300;
+; 0xbf801120 0x300
+ 0xbf801120 0x301
+;REG32(MC_DC19) = 0x00000300;
+; 0xbf801130 0x300
+ 0xbf801130 0x200
+;REG32(MC_DC20) = 0x00000A04;
+; 0xbf801140 0xa04
+ 0xbf801140 0xa03
+;REG32(MC_DC21) = 0x00001c00;
+; 0xbf801150 0xd00
+; 0xbf801150 0x1f00
+ 0xbf801150 0x1b00
+;REG32(MC_DC22) = 0x00001E1E;
+; 0xbf801160 0xd0d
+; 0xbf801160 0x1f1f
+ 0xbf801160 0x1b1b
+;REG32(MC_DC23) = 0x00000000;
+ 0xbf801170 0x0
+;//Disable ECC
+;REG32(MC_DC24) = 0x0000007F;
+; 0xbf801180 0x7f
+; 0xbf801180 0x062
+; 0xbf801180 0x37f
+ 0xbf801180 0x59
+;REG32(MC_DC25) = 0x00000000;
+ 0xbf801190 0x0
+;REG32(MC_DC26) = 0x00000000;
+ 0xbf8011a0 0x0
+;REG32(MC_DC27) = 0x00000000;
+ 0xbf8011b0 0x0
+;REG32(MC_DC28) = 0x00000A24;
+; 0xbf8011c0 0xa24
+ 0xbf8011c0 0x510
+;REG32(MC_DC29) = 0x00002D89;
+; 0xbf8011d0 0x2d89
+; 0xbf8011d0 0x2d92
+ 0xbf8011d0 0x4e20
+;REG32(MC_DC30) = 0x00000022;
+; 0xbf8011e0 0x8300
+ 0xbf8011e0 0x8235
+;REG32(MC_DC31) = 0x00000000;
+ 0xbf8011f0 0x0
+;REG32(MC_DC32) = 0x00000000;
+ 0xbf801200 0x0
+;REG32(MC_DC33) = 0x00000000;
+ 0xbf801210 0x0
+;REG32(MC_DC34) = 0x00000000;
+ 0xbf801220 0x0
+;REG32(MC_DC35) = 0x00000000;
+ 0xbf801230 0x0
+;REG32(MC_DC36) = 0x00000000;
+ 0xbf801240 0x0
+;REG32(MC_DC37) = 0x00000000;
+ 0xbf801250 0x0
+;REG32(MC_DC38) = 0x00000000;
+ 0xbf801260 0x0
+;REG32(MC_DC39) = 0x00000000;
+ 0xbf801270 0x0
+;REG32(MC_DC40) = 0x00000000;
+ 0xbf801280 0x0
+;REG32(MC_DC41) = 0x00000000;
+ 0xbf801290 0x0
+;REG32(MC_DC42) = 0x00000000;
+ 0xbf8012a0 0x0
+;REG32(MC_DC43) = 0x00000000;
+ 0xbf8012b0 0x0
+;REG32(MC_DC44) = 0x00000000;
+ 0xbf8012c0 0x0
+;REG32(MC_DC45) = 0x00000600;
+ 0xbf8012d0 0x500
+;REG32(MC_DC46) = 0x00000000;
+ 0xbf8012e0 0x0
+
+ 0xbf800060 0x05
+ 0xbf801030 0x100
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+