diff options
| author | nbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2010-10-16 02:30:30 +0000 |
|---|---|---|
| committer | nbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2010-10-16 02:30:30 +0000 |
| commit | cbe6c66638efddd36b0bb71f46dd5f5689a3e045 (patch) | |
| tree | 7fc287bd3cfab8f40a0baaf8e6d80aa0a530401d /package/mac80211/patches/551-ath9k_isr_optimization.patch | |
| parent | fdb67f01dfbe2d6c79f7433f55baef1786d74d0c (diff) | |
mac80211: update to wireless-testing 2010-10-15, add a few ath9k fixes and performance enhancements
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@23470 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'package/mac80211/patches/551-ath9k_isr_optimization.patch')
| -rw-r--r-- | package/mac80211/patches/551-ath9k_isr_optimization.patch | 60 |
1 files changed, 60 insertions, 0 deletions
diff --git a/package/mac80211/patches/551-ath9k_isr_optimization.patch b/package/mac80211/patches/551-ath9k_isr_optimization.patch new file mode 100644 index 0000000000..dc267f33b0 --- /dev/null +++ b/package/mac80211/patches/551-ath9k_isr_optimization.patch @@ -0,0 +1,60 @@ +--- a/drivers/net/wireless/ath/ath9k/ar9002_mac.c ++++ b/drivers/net/wireless/ath/ath9k/ar9002_mac.c +@@ -90,13 +90,10 @@ static bool ar9002_hw_get_isr(struct ath + + *masked = isr & ATH9K_INT_COMMON; + +- if (ah->config.rx_intr_mitigation) { +- if (isr & (AR_ISR_RXMINTR | AR_ISR_RXINTM)) +- *masked |= ATH9K_INT_RX; +- } +- +- if (isr & (AR_ISR_RXOK | AR_ISR_RXERR)) ++ if (isr & (AR_ISR_RXMINTR | AR_ISR_RXINTM | ++ AR_ISR_RXOK | AR_ISR_RXERR)) + *masked |= ATH9K_INT_RX; ++ + if (isr & + (AR_ISR_TXOK | AR_ISR_TXDESC | AR_ISR_TXERR | + AR_ISR_TXEOL)) { +@@ -118,14 +115,6 @@ static bool ar9002_hw_get_isr(struct ath + "receive FIFO overrun interrupt\n"); + } + +- if (!AR_SREV_9100(ah)) { +- if (!(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) { +- u32 isr5 = REG_READ(ah, AR_ISR_S5_S); +- if (isr5 & AR_ISR_S5_TIM_TIMER) +- *masked |= ATH9K_INT_TIM_TIMER; +- } +- } +- + *masked |= mask2; + } + +@@ -136,17 +125,18 @@ static bool ar9002_hw_get_isr(struct ath + u32 s5_s; + + s5_s = REG_READ(ah, AR_ISR_S5_S); +- if (isr & AR_ISR_GENTMR) { +- ah->intr_gen_timer_trigger = ++ ah->intr_gen_timer_trigger = + MS(s5_s, AR_ISR_S5_GENTIMER_TRIG); + +- ah->intr_gen_timer_thresh = +- MS(s5_s, AR_ISR_S5_GENTIMER_THRESH); ++ ah->intr_gen_timer_thresh = ++ MS(s5_s, AR_ISR_S5_GENTIMER_THRESH); + +- if (ah->intr_gen_timer_trigger) +- *masked |= ATH9K_INT_GENTIMER; ++ if (ah->intr_gen_timer_trigger) ++ *masked |= ATH9K_INT_GENTIMER; + +- } ++ if ((s5_s & AR_ISR_S5_TIM_TIMER) && ++ !(pCap->hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) ++ *masked |= ATH9K_INT_TIM_TIMER; + } + + if (sync_cause) { |