diff options
| author | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-01-01 13:10:26 +0000 |
|---|---|---|
| committer | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-01-01 13:10:26 +0000 |
| commit | 0b02ab0508e1bbbba06935c4e6f80c820577d96a (patch) | |
| tree | ee8f2796d4f304d9c96aae73c1aef670ee3a27cf | |
| parent | 6b0575e342401cc3036d1d9b45810a71a7543f81 (diff) | |
ar71xx: fix NAND controller base for QCA955x SoCs
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34942 3c298f89-4303-0410-b956-a3cf2f4a3e73
| -rw-r--r-- | target/linux/ar71xx/patches-3.6/601-MIPS-ath79-add-more-register-defines.patch | 2 | ||||
| -rw-r--r-- | target/linux/ar71xx/patches-3.7/601-MIPS-ath79-add-more-register-defines.patch | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/ar71xx/patches-3.6/601-MIPS-ath79-add-more-register-defines.patch b/target/linux/ar71xx/patches-3.6/601-MIPS-ath79-add-more-register-defines.patch index 407de36008..26c87c8ef2 100644 --- a/target/linux/ar71xx/patches-3.6/601-MIPS-ath79-add-more-register-defines.patch +++ b/target/linux/ar71xx/patches-3.6/601-MIPS-ath79-add-more-register-defines.patch @@ -50,7 +50,7 @@ #define QCA955X_EHCI_SIZE 0x200 +#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) +#define QCA955X_GMAC_SIZE 0x40 -+#define QCA955X_NFC_BASE 0x1b000200 ++#define QCA955X_NFC_BASE 0x1b800200 +#define QCA955X_NFC_SIZE 0xb8 #define AR9300_OTP_BASE 0x14000 diff --git a/target/linux/ar71xx/patches-3.7/601-MIPS-ath79-add-more-register-defines.patch b/target/linux/ar71xx/patches-3.7/601-MIPS-ath79-add-more-register-defines.patch index 38290e8857..aa962059b7 100644 --- a/target/linux/ar71xx/patches-3.7/601-MIPS-ath79-add-more-register-defines.patch +++ b/target/linux/ar71xx/patches-3.7/601-MIPS-ath79-add-more-register-defines.patch @@ -48,7 +48,7 @@ #define QCA955X_EHCI_SIZE 0x200 +#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000) +#define QCA955X_GMAC_SIZE 0x40 -+#define QCA955X_NFC_BASE 0x1b000200 ++#define QCA955X_NFC_BASE 0x1b800200 +#define QCA955X_NFC_SIZE 0xb8 #define AR9300_OTP_BASE 0x14000 |