ag71xx: add F1E specific feature bit definitions to AR934X register file
authorjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Fri, 29 Nov 2013 20:18:43 +0000 (20:18 +0000)
committerjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>
Fri, 29 Nov 2013 20:18:43 +0000 (20:18 +0000)
commit2b4757410dabacee09fa17f4a2c5f08428e00be6
tree041955805e54370450073d4d851c16d45eedc834
parent365c0a909b2e3316928fa633d1755b0bd2e06dae
ag71xx: add F1E specific feature bit definitions to AR934X register file

The F1E Phy (AR8035?) requires additional bits to be
set in order to provide a fast and reliable connection
over gigabit links.

When enabled, the link doesn't suffer anymore from a small
package loss under load and the performance is improved
quite a bit as well. (203 mbit/s vs 112 mbit/s, iperf tcp).

Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
Patchwork: http://patchwork.openwrt.org/patch/4460/
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@38948 3c298f89-4303-0410-b956-a3cf2f4a3e73
target/linux/ar71xx/patches-3.10/601-MIPS-ath79-add-more-register-defines.patch