ramips: rt3883: add PCI support

[openwrt.git] / target / linux / ramips / files / arch / mips / include / asm / mach-ralink / rt3883_regs.h

diff --git a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883_regs.h b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883_regs.h
index 7149e6fafd672351675b3c9f67b352e8064833c6..b36cabe85862eea12ea3690dd7ec8227ba1f341e 100644 (file)
--- a/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883_regs.h
+++ b/target/linux/ramips/files/arch/mips/include/asm/mach-ralink/rt3883_regs.h
@@ -80,6 +80,9 @@
 #define RT3883_SYSC_REG_RSTSTAT                0x38    /* Reset Status*/
 #define RT3883_SYSC_REG_USB_PS         0x5c    /* USB Power saving control */
 #define RT3883_SYSC_REG_GPIO_MODE      0x60    /* GPIO Purpose Select */
+#define RT3883_SYSC_REG_PCIE_CLK_GEN0  0x7c
+#define RT3883_SYSC_REG_PCIE_CLK_GEN1  0x80
+#define RT3883_SYSC_REG_PCIE_CLK_GEN2  0x84
 #define RT3883_SYSC_REG_PMU            0x88
 #define RT3883_SYSC_REG_PMU1           0x8c
 
@@ -96,9 +99,14 @@
 #define RT3883_SYSCFG0_CPUCLK_500      0x3
 
 #define RT3883_SYSCFG1_USB0_HOST_MODE  BIT(10)
+#define RT3883_SYSCFG1_PCIE_RC_MODE    BIT(8)
+#define RT3883_SYSCFG1_PCI_HOST_MODE   BIT(7)
+#define RT3883_SYSCFG1_PCI_66M_MODE    BIT(6)
 #define RT3883_SYSCFG1_GPIO2_AS_WDT_OUT        BIT(2)
 
+#define RT3883_CLKCFG1_PCIE_CLK_EN     BIT(21)
 #define RT3883_CLKCFG1_UPHY1_CLK_EN    BIT(20)
+#define RT3883_CLKCFG1_PCI_CLK_EN      BIT(19)
 #define RT3883_CLKCFG1_UPHY0_CLK_EN    BIT(18)
 
 #define RT3883_GPIO_MODE_I2C           BIT(0)