---- a/drivers/net/wireless/ath/ath9k/ar9002_mac.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9002_mac.c
-@@ -170,33 +170,104 @@ static bool ar9002_hw_get_isr(struct ath
- return true;
- }
+--- a/net/mac80211/agg-rx.c
++++ b/net/mac80211/agg-rx.c
+@@ -203,6 +203,8 @@ static void ieee80211_send_addba_resp(st
+ memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
+ else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
+ memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
++ else if (sdata->vif.type == NL80211_IFTYPE_WDS)
++ memcpy(mgmt->bssid, da, ETH_ALEN);
--static void ar9002_hw_fill_txdesc(struct ath_hw *ah, void *ds, u32 seglen,
-- bool is_firstseg, bool is_lastseg,
-- const void *ds0, dma_addr_t buf_addr,
-- unsigned int qcu)
-+static void
-+ar9002_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
- {
- struct ar5416_desc *ads = AR5416DESC(ds);
-+ u32 ctl1, ctl6;
+ mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
+ IEEE80211_STYPE_ACTION);
+--- a/net/mac80211/agg-tx.c
++++ b/net/mac80211/agg-tx.c
+@@ -81,7 +81,8 @@ static void ieee80211_send_addba_request
+ memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN);
+ if (sdata->vif.type == NL80211_IFTYPE_AP ||
+ sdata->vif.type == NL80211_IFTYPE_AP_VLAN ||
+- sdata->vif.type == NL80211_IFTYPE_MESH_POINT)
++ sdata->vif.type == NL80211_IFTYPE_MESH_POINT ||
++ sdata->vif.type == NL80211_IFTYPE_WDS)
+ memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
+ else if (sdata->vif.type == NL80211_IFTYPE_STATION)
+ memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
+@@ -520,6 +521,7 @@ int ieee80211_start_tx_ba_session(struct
+ sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
+ sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
+ sdata->vif.type != NL80211_IFTYPE_AP &&
++ sdata->vif.type != NL80211_IFTYPE_WDS &&
+ sdata->vif.type != NL80211_IFTYPE_ADHOC)
+ return -EINVAL;
-- ads->ds_data = buf_addr;
--
-- if (is_firstseg) {
-- ads->ds_ctl1 |= seglen | (is_lastseg ? 0 : AR_TxMore);
-- } else if (is_lastseg) {
-- ads->ds_ctl0 = 0;
-- ads->ds_ctl1 = seglen;
-- ads->ds_ctl2 = AR5416DESC_CONST(ds0)->ds_ctl2;
-- ads->ds_ctl3 = AR5416DESC_CONST(ds0)->ds_ctl3;
-- } else {
-- ads->ds_ctl0 = 0;
-- ads->ds_ctl1 = seglen | AR_TxMore;
-- ads->ds_ctl2 = 0;
-- ads->ds_ctl3 = 0;
-- }
- ads->ds_txstatus0 = ads->ds_txstatus1 = 0;
- ads->ds_txstatus2 = ads->ds_txstatus3 = 0;
- ads->ds_txstatus4 = ads->ds_txstatus5 = 0;
- ads->ds_txstatus6 = ads->ds_txstatus7 = 0;
- ads->ds_txstatus8 = ads->ds_txstatus9 = 0;
-+
-+ ACCESS_ONCE(ads->ds_link) = i->link;
-+ ACCESS_ONCE(ads->ds_data) = i->buf_addr[0];
-+
-+ ctl1 = i->buf_len[0] | (i->is_last ? 0 : AR_TxMore);
-+ ctl6 = SM(i->keytype, AR_EncrType);
-+
-+ if (AR_SREV_9285(ah)) {
-+ ads->ds_ctl8 = 0;
-+ ads->ds_ctl9 = 0;
-+ ads->ds_ctl10 = 0;
-+ ads->ds_ctl11 = 0;
-+ }
-+
-+ if ((i->is_first || i->is_last) &&
-+ i->aggr != AGGR_BUF_MIDDLE && i->aggr != AGGR_BUF_LAST) {
-+ ACCESS_ONCE(ads->ds_ctl2) = set11nTries(i->rates, 0)
-+ | set11nTries(i->rates, 1)
-+ | set11nTries(i->rates, 2)
-+ | set11nTries(i->rates, 3)
-+ | (i->dur_update ? AR_DurUpdateEna : 0)
-+ | SM(0, AR_BurstDur);
-+
-+ ACCESS_ONCE(ads->ds_ctl3) = set11nRate(i->rates, 0)
-+ | set11nRate(i->rates, 1)
-+ | set11nRate(i->rates, 2)
-+ | set11nRate(i->rates, 3);
-+ } else {
-+ ACCESS_ONCE(ads->ds_ctl2) = 0;
-+ ACCESS_ONCE(ads->ds_ctl3) = 0;
-+ }
-+
-+ if (!i->is_first) {
-+ ACCESS_ONCE(ads->ds_ctl0) = 0;
-+ ACCESS_ONCE(ads->ds_ctl1) = ctl1;
-+ ACCESS_ONCE(ads->ds_ctl6) = ctl6;
-+ return;
-+ }
-+
-+ ctl1 |= (i->keyix != ATH9K_TXKEYIX_INVALID ? SM(i->keyix, AR_DestIdx) : 0)
-+ | SM(i->type, AR_FrameType)
-+ | (i->flags & ATH9K_TXDESC_NOACK ? AR_NoAck : 0)
-+ | (i->flags & ATH9K_TXDESC_EXT_ONLY ? AR_ExtOnly : 0)
-+ | (i->flags & ATH9K_TXDESC_EXT_AND_CTL ? AR_ExtAndCtl : 0);
-+
-+ switch (i->aggr) {
-+ case AGGR_BUF_FIRST:
-+ ctl6 |= SM(i->aggr_len, AR_AggrLen);
-+ /* fall through */
-+ case AGGR_BUF_MIDDLE:
-+ ctl1 |= AR_IsAggr | AR_MoreAggr;
-+ ctl6 |= SM(i->ndelim, AR_PadDelim);
-+ break;
-+ case AGGR_BUF_LAST:
-+ ctl1 |= AR_IsAggr;
-+ break;
-+ case AGGR_BUF_NONE:
-+ break;
-+ }
-+
-+ ACCESS_ONCE(ads->ds_ctl0) = (i->pkt_len & AR_FrameLen)
-+ | (i->flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
-+ | SM(i->txpower, AR_XmitPower)
-+ | (i->flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
-+ | (i->flags & ATH9K_TXDESC_INTREQ ? AR_TxIntrReq : 0)
-+ | (i->keyix != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0)
-+ | (i->flags & ATH9K_TXDESC_CLRDMASK ? AR_ClrDestMask : 0)
-+ | (i->flags & ATH9K_TXDESC_RTSENA ? AR_RTSEnable :
-+ (i->flags & ATH9K_TXDESC_CTSENA ? AR_CTSEnable : 0));
-+
-+ ACCESS_ONCE(ads->ds_ctl1) = ctl1;
-+ ACCESS_ONCE(ads->ds_ctl6) = ctl6;
-+
-+ if (i->aggr == AGGR_BUF_MIDDLE || i->aggr == AGGR_BUF_LAST)
-+ return;
-+
-+ ACCESS_ONCE(ads->ds_ctl4) = set11nPktDurRTSCTS(i->rates, 0)
-+ | set11nPktDurRTSCTS(i->rates, 1);
-+
-+ ACCESS_ONCE(ads->ds_ctl5) = set11nPktDurRTSCTS(i->rates, 2)
-+ | set11nPktDurRTSCTS(i->rates, 3);
-+
-+ ACCESS_ONCE(ads->ds_ctl7) = set11nRateFlags(i->rates, 0)
-+ | set11nRateFlags(i->rates, 1)
-+ | set11nRateFlags(i->rates, 2)
-+ | set11nRateFlags(i->rates, 3)
-+ | SM(i->rtscts_rate, AR_RTSCTSRate);
- }
+--- a/net/mac80211/debugfs_sta.c
++++ b/net/mac80211/debugfs_sta.c
+@@ -65,11 +65,11 @@ static ssize_t sta_flags_read(struct fil
+ test_sta_flag(sta, WLAN_STA_##flg) ? #flg "\n" : ""
+
+ int res = scnprintf(buf, sizeof(buf),
+- "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
++ "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
+ TEST(AUTH), TEST(ASSOC), TEST(PS_STA),
+ TEST(PS_DRIVER), TEST(AUTHORIZED),
+ TEST(SHORT_PREAMBLE),
+- TEST(WME), TEST(WDS), TEST(CLEAR_PS_FILT),
++ TEST(WME), TEST(CLEAR_PS_FILT),
+ TEST(MFP), TEST(BLOCK_BA), TEST(PSPOLL),
+ TEST(UAPSD), TEST(SP), TEST(TDLS_PEER),
+ TEST(TDLS_PEER_AUTH), TEST(4ADDR_EVENT),
+--- a/net/mac80211/iface.c
++++ b/net/mac80211/iface.c
+@@ -501,7 +501,6 @@ int ieee80211_do_open(struct wireless_de
+ struct ieee80211_sub_if_data *sdata = IEEE80211_WDEV_TO_SUB_IF(wdev);
+ struct net_device *dev = wdev->netdev;
+ struct ieee80211_local *local = sdata->local;
+- struct sta_info *sta;
+ u32 changed = 0;
+ int res;
+ u32 hw_reconf_flags = 0;
+@@ -658,30 +657,8 @@ int ieee80211_do_open(struct wireless_de
- static int ar9002_hw_proc_txdesc(struct ath_hw *ah, void *ds,
-@@ -271,145 +342,6 @@ static int ar9002_hw_proc_txdesc(struct
- return 0;
- }
+ set_bit(SDATA_STATE_RUNNING, &sdata->state);
--static void ar9002_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
-- u32 pktLen, enum ath9k_pkt_type type,
-- u32 txPower, u8 keyIx,
-- enum ath9k_key_type keyType, u32 flags)
--{
-- struct ar5416_desc *ads = AR5416DESC(ds);
--
-- if (txPower > 63)
-- txPower = 63;
--
-- ads->ds_ctl0 = (pktLen & AR_FrameLen)
-- | (flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
-- | SM(txPower, AR_XmitPower)
-- | (flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
-- | (flags & ATH9K_TXDESC_INTREQ ? AR_TxIntrReq : 0)
-- | (keyIx != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0);
--
-- ads->ds_ctl1 =
-- (keyIx != ATH9K_TXKEYIX_INVALID ? SM(keyIx, AR_DestIdx) : 0)
-- | SM(type, AR_FrameType)
-- | (flags & ATH9K_TXDESC_NOACK ? AR_NoAck : 0)
-- | (flags & ATH9K_TXDESC_EXT_ONLY ? AR_ExtOnly : 0)
-- | (flags & ATH9K_TXDESC_EXT_AND_CTL ? AR_ExtAndCtl : 0);
--
-- ads->ds_ctl6 = SM(keyType, AR_EncrType);
--
-- if (AR_SREV_9285(ah) || AR_SREV_9271(ah)) {
-- ads->ds_ctl8 = 0;
-- ads->ds_ctl9 = 0;
-- ads->ds_ctl10 = 0;
-- ads->ds_ctl11 = 0;
-- }
--}
--
--static void ar9002_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val)
--{
-- struct ar5416_desc *ads = AR5416DESC(ds);
--
-- if (val)
-- ads->ds_ctl0 |= AR_ClrDestMask;
-- else
-- ads->ds_ctl0 &= ~AR_ClrDestMask;
--}
--
--static void ar9002_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
-- void *lastds,
-- u32 durUpdateEn, u32 rtsctsRate,
-- u32 rtsctsDuration,
-- struct ath9k_11n_rate_series series[],
-- u32 nseries, u32 flags)
--{
-- struct ar5416_desc *ads = AR5416DESC(ds);
-- struct ar5416_desc *last_ads = AR5416DESC(lastds);
-- u32 ds_ctl0;
+- if (sdata->vif.type == NL80211_IFTYPE_WDS) {
+- /* Create STA entry for the WDS peer */
+- sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
+- GFP_KERNEL);
+- if (!sta) {
+- res = -ENOMEM;
+- goto err_del_interface;
+- }
-
-- if (flags & (ATH9K_TXDESC_RTSENA | ATH9K_TXDESC_CTSENA)) {
-- ds_ctl0 = ads->ds_ctl0;
+- sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
+- sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
+- sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
-
-- if (flags & ATH9K_TXDESC_RTSENA) {
-- ds_ctl0 &= ~AR_CTSEnable;
-- ds_ctl0 |= AR_RTSEnable;
-- } else {
-- ds_ctl0 &= ~AR_RTSEnable;
-- ds_ctl0 |= AR_CTSEnable;
+- res = sta_info_insert(sta);
+- if (res) {
+- /* STA has been freed */
+- goto err_del_interface;
- }
-
-- ads->ds_ctl0 = ds_ctl0;
-- } else {
-- ads->ds_ctl0 =
-- (ads->ds_ctl0 & ~(AR_RTSEnable | AR_CTSEnable));
+- rate_control_rate_init(sta);
+- netif_carrier_on(dev);
+- } else if (sdata->vif.type == NL80211_IFTYPE_P2P_DEVICE) {
++ if (sdata->vif.type == NL80211_IFTYPE_P2P_DEVICE)
+ rcu_assign_pointer(local->p2p_sdata, sdata);
- }
--
-- ads->ds_ctl2 = set11nTries(series, 0)
-- | set11nTries(series, 1)
-- | set11nTries(series, 2)
-- | set11nTries(series, 3)
-- | (durUpdateEn ? AR_DurUpdateEna : 0)
-- | SM(0, AR_BurstDur);
--
-- ads->ds_ctl3 = set11nRate(series, 0)
-- | set11nRate(series, 1)
-- | set11nRate(series, 2)
-- | set11nRate(series, 3);
--
-- ads->ds_ctl4 = set11nPktDurRTSCTS(series, 0)
-- | set11nPktDurRTSCTS(series, 1);
--
-- ads->ds_ctl5 = set11nPktDurRTSCTS(series, 2)
-- | set11nPktDurRTSCTS(series, 3);
--
-- ads->ds_ctl7 = set11nRateFlags(series, 0)
-- | set11nRateFlags(series, 1)
-- | set11nRateFlags(series, 2)
-- | set11nRateFlags(series, 3)
-- | SM(rtsctsRate, AR_RTSCTSRate);
-- last_ads->ds_ctl2 = ads->ds_ctl2;
-- last_ads->ds_ctl3 = ads->ds_ctl3;
--}
--
--static void ar9002_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
-- u32 aggrLen)
--{
-- struct ar5416_desc *ads = AR5416DESC(ds);
--
-- ads->ds_ctl1 |= (AR_IsAggr | AR_MoreAggr);
-- ads->ds_ctl6 &= ~AR_AggrLen;
-- ads->ds_ctl6 |= SM(aggrLen, AR_AggrLen);
--}
--
--static void ar9002_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
-- u32 numDelims)
--{
-- struct ar5416_desc *ads = AR5416DESC(ds);
-- unsigned int ctl6;
--
-- ads->ds_ctl1 |= (AR_IsAggr | AR_MoreAggr);
--
-- ctl6 = ads->ds_ctl6;
-- ctl6 &= ~AR_PadDelim;
-- ctl6 |= SM(numDelims, AR_PadDelim);
-- ads->ds_ctl6 = ctl6;
--}
--
--static void ar9002_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
--{
-- struct ar5416_desc *ads = AR5416DESC(ds);
--
-- ads->ds_ctl1 |= AR_IsAggr;
-- ads->ds_ctl1 &= ~AR_MoreAggr;
-- ads->ds_ctl6 &= ~AR_PadDelim;
--}
--
--static void ar9002_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
--{
-- struct ar5416_desc *ads = AR5416DESC(ds);
--
-- ads->ds_ctl1 &= (~AR_IsAggr & ~AR_MoreAggr);
--}
--
- void ath9k_hw_setuprxdesc(struct ath_hw *ah, struct ath_desc *ds,
- u32 size, u32 flags)
- {
-@@ -433,13 +365,6 @@ void ar9002_hw_attach_mac_ops(struct ath
- ops->rx_enable = ar9002_hw_rx_enable;
- ops->set_desc_link = ar9002_hw_set_desc_link;
- ops->get_isr = ar9002_hw_get_isr;
-- ops->fill_txdesc = ar9002_hw_fill_txdesc;
-+ ops->set_txdesc = ar9002_set_txdesc;
- ops->proc_txdesc = ar9002_hw_proc_txdesc;
-- ops->set11n_txdesc = ar9002_hw_set11n_txdesc;
-- ops->set11n_ratescenario = ar9002_hw_set11n_ratescenario;
-- ops->set11n_aggr_first = ar9002_hw_set11n_aggr_first;
-- ops->set11n_aggr_middle = ar9002_hw_set11n_aggr_middle;
-- ops->set11n_aggr_last = ar9002_hw_set11n_aggr_last;
-- ops->clr11n_aggr = ar9002_hw_clr11n_aggr;
-- ops->set_clrdmask = ar9002_hw_set_clrdmask;
- }
---- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
-@@ -652,8 +652,9 @@ static void ar9003_hw_detect_outlier(int
- outlier_idx = max_idx;
- else
- outlier_idx = min_idx;
-+
-+ mp_coeff[outlier_idx] = mp_avg;
- }
-- mp_coeff[outlier_idx] = mp_avg;
- }
-
- static void ar9003_hw_tx_iqcal_load_avg_2_passes(struct ath_hw *ah,
-@@ -884,6 +885,7 @@ static bool ar9003_hw_init_cal(struct at
- if (txiqcal_done)
- ar9003_hw_tx_iq_cal_post_proc(ah);
-+ ath9k_hw_loadnf(ah, chan);
- ath9k_hw_start_nfcal(ah, true);
-
- /* Initialize list pointers */
---- a/drivers/net/wireless/ath/ath9k/ar9003_mac.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_mac.c
-@@ -21,6 +21,132 @@ static void ar9003_hw_rx_enable(struct a
- REG_WRITE(hw, AR_CR, 0);
+ /*
+ * set_multicast_list will be invoked by the networking core
+@@ -1066,6 +1043,72 @@ static void ieee80211_if_setup(struct ne
+ dev->destructor = free_netdev;
}
-+static void
-+ar9003_set_txdesc(struct ath_hw *ah, void *ds, struct ath_tx_info *i)
++static void ieee80211_wds_rx_queued_mgmt(struct ieee80211_sub_if_data *sdata,
++ struct sk_buff *skb)
+{
-+ struct ar9003_txc *ads = ds;
-+ int checksum = 0;
-+ u32 val, ctl12, ctl17;
-+
-+ val = (ATHEROS_VENDOR_ID << AR_DescId_S) |
-+ (1 << AR_TxRxDesc_S) |
-+ (1 << AR_CtrlStat_S) |
-+ (i->qcu << AR_TxQcuNum_S) | 0x17;
-+
-+ checksum += val;
-+ ACCESS_ONCE(ads->info) = val;
-+
-+ checksum += i->link;
-+ ACCESS_ONCE(ads->link) = i->link;
-+
-+ checksum += i->buf_addr[0];
-+ ACCESS_ONCE(ads->data0) = i->buf_addr[0];
-+ checksum += i->buf_addr[1];
-+ ACCESS_ONCE(ads->data1) = i->buf_addr[1];
-+ checksum += i->buf_addr[2];
-+ ACCESS_ONCE(ads->data2) = i->buf_addr[2];
-+ checksum += i->buf_addr[3];
-+ ACCESS_ONCE(ads->data3) = i->buf_addr[3];
++ struct ieee80211_local *local = sdata->local;
++ struct ieee80211_rx_status *rx_status;
++ struct ieee802_11_elems elems;
++ struct ieee80211_mgmt *mgmt;
++ struct sta_info *sta;
++ size_t baselen;
++ u32 rates = 0;
++ u16 stype;
++ bool new = false;
++ enum ieee80211_band band = local->hw.conf.channel->band;
++ struct ieee80211_supported_band *sband = local->hw.wiphy->bands[band];
+
-+ checksum += (val = (i->buf_len[0] << AR_BufLen_S) & AR_BufLen);
-+ ACCESS_ONCE(ads->ctl3) = val;
-+ checksum += (val = (i->buf_len[1] << AR_BufLen_S) & AR_BufLen);
-+ ACCESS_ONCE(ads->ctl5) = val;
-+ checksum += (val = (i->buf_len[2] << AR_BufLen_S) & AR_BufLen);
-+ ACCESS_ONCE(ads->ctl7) = val;
-+ checksum += (val = (i->buf_len[3] << AR_BufLen_S) & AR_BufLen);
-+ ACCESS_ONCE(ads->ctl9) = val;
++ rx_status = IEEE80211_SKB_RXCB(skb);
++ mgmt = (struct ieee80211_mgmt *) skb->data;
++ stype = le16_to_cpu(mgmt->frame_control) & IEEE80211_FCTL_STYPE;
+
-+ checksum = (u16) (((checksum & 0xffff) + (checksum >> 16)) & 0xffff);
-+ ACCESS_ONCE(ads->ctl10) = checksum;
++ if (stype != IEEE80211_STYPE_BEACON)
++ return;
+
-+ if (i->is_first || i->is_last) {
-+ ACCESS_ONCE(ads->ctl13) = set11nTries(i->rates, 0)
-+ | set11nTries(i->rates, 1)
-+ | set11nTries(i->rates, 2)
-+ | set11nTries(i->rates, 3)
-+ | (i->dur_update ? AR_DurUpdateEna : 0)
-+ | SM(0, AR_BurstDur);
++ baselen = (u8 *) mgmt->u.probe_resp.variable - (u8 *) mgmt;
++ if (baselen > skb->len)
++ return;
+
-+ ACCESS_ONCE(ads->ctl14) = set11nRate(i->rates, 0)
-+ | set11nRate(i->rates, 1)
-+ | set11nRate(i->rates, 2)
-+ | set11nRate(i->rates, 3);
-+ } else {
-+ ACCESS_ONCE(ads->ctl13) = 0;
-+ ACCESS_ONCE(ads->ctl14) = 0;
-+ }
++ ieee802_11_parse_elems(mgmt->u.probe_resp.variable,
++ skb->len - baselen, &elems);
+
-+ ads->ctl20 = 0;
-+ ads->ctl21 = 0;
-+ ads->ctl22 = 0;
++ rates = ieee80211_sta_get_rates(local, &elems, band, NULL);
+
-+ ctl17 = SM(i->keytype, AR_EncrType);
-+ if (!i->is_first) {
-+ ACCESS_ONCE(ads->ctl11) = 0;
-+ ACCESS_ONCE(ads->ctl12) = i->is_last ? 0 : AR_TxMore;
-+ ACCESS_ONCE(ads->ctl15) = 0;
-+ ACCESS_ONCE(ads->ctl16) = 0;
-+ ACCESS_ONCE(ads->ctl17) = ctl17;
-+ ACCESS_ONCE(ads->ctl18) = 0;
-+ ACCESS_ONCE(ads->ctl19) = 0;
-+ return;
-+ }
++ rcu_read_lock();
+
-+ ACCESS_ONCE(ads->ctl11) = (i->pkt_len & AR_FrameLen)
-+ | (i->flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
-+ | SM(i->txpower, AR_XmitPower)
-+ | (i->flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
-+ | (i->keyix != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0)
-+ | (i->flags & ATH9K_TXDESC_LOWRXCHAIN ? AR_LowRxChain : 0)
-+ | (i->flags & ATH9K_TXDESC_CLRDMASK ? AR_ClrDestMask : 0)
-+ | (i->flags & ATH9K_TXDESC_RTSENA ? AR_RTSEnable :
-+ (i->flags & ATH9K_TXDESC_CTSENA ? AR_CTSEnable : 0));
++ sta = sta_info_get(sdata, sdata->u.wds.remote_addr);
+
-+ ctl12 = (i->keyix != ATH9K_TXKEYIX_INVALID ?
-+ SM(i->keyix, AR_DestIdx) : 0)
-+ | SM(i->type, AR_FrameType)
-+ | (i->flags & ATH9K_TXDESC_NOACK ? AR_NoAck : 0)
-+ | (i->flags & ATH9K_TXDESC_EXT_ONLY ? AR_ExtOnly : 0)
-+ | (i->flags & ATH9K_TXDESC_EXT_AND_CTL ? AR_ExtAndCtl : 0);
++ if (!sta) {
++ rcu_read_unlock();
++ sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
++ GFP_KERNEL);
++ if (!sta)
++ return;
+
-+ ctl17 |= (i->flags & ATH9K_TXDESC_LDPC ? AR_LDPC : 0);
-+ switch (i->aggr) {
-+ case AGGR_BUF_FIRST:
-+ ctl17 |= SM(i->aggr_len, AR_AggrLen);
-+ /* fall through */
-+ case AGGR_BUF_MIDDLE:
-+ ctl12 |= AR_IsAggr | AR_MoreAggr;
-+ ctl17 |= SM(i->ndelim, AR_PadDelim);
-+ break;
-+ case AGGR_BUF_LAST:
-+ ctl12 |= AR_IsAggr;
-+ break;
-+ case AGGR_BUF_NONE:
-+ break;
++ new = true;
+ }
+
-+ val = (i->flags & ATH9K_TXDESC_PAPRD) >> ATH9K_TXDESC_PAPRD_S;
-+ ctl12 |= SM(val, AR_PAPRDChainMask);
-+
-+ ACCESS_ONCE(ads->ctl12) = ctl12;
-+ ACCESS_ONCE(ads->ctl17) = ctl17;
++ sta->last_rx = jiffies;
++ sta->sta.supp_rates[local->hw.conf.channel->band] = rates;
+
-+ ACCESS_ONCE(ads->ctl15) = set11nPktDurRTSCTS(i->rates, 0)
-+ | set11nPktDurRTSCTS(i->rates, 1);
++ if (elems.ht_cap_elem)
++ ieee80211_ht_cap_ie_to_sta_ht_cap(sdata, sband,
++ elems.ht_cap_elem, &sta->sta.ht_cap);
+
-+ ACCESS_ONCE(ads->ctl16) = set11nPktDurRTSCTS(i->rates, 2)
-+ | set11nPktDurRTSCTS(i->rates, 3);
++ if (elems.wmm_param)
++ set_sta_flag(sta, WLAN_STA_WME);
+
-+ ACCESS_ONCE(ads->ctl18) = set11nRateFlags(i->rates, 0)
-+ | set11nRateFlags(i->rates, 1)
-+ | set11nRateFlags(i->rates, 2)
-+ | set11nRateFlags(i->rates, 3)
-+ | SM(i->rtscts_rate, AR_RTSCTSRate);
++ if (new) {
++ sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
++ sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
++ sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
++ rate_control_rate_init(sta);
++ sta_info_insert_rcu(sta);
++ }
+
-+ ACCESS_ONCE(ads->ctl19) = AR_Not_Sounding;
++ rcu_read_unlock();
+}
+
- static u16 ar9003_calc_ptr_chksum(struct ar9003_txc *ads)
+ static void ieee80211_iface_work(struct work_struct *work)
{
- int checksum;
-@@ -185,47 +311,6 @@ static bool ar9003_hw_get_isr(struct ath
- return true;
- }
+ struct ieee80211_sub_if_data *sdata =
+@@ -1170,6 +1213,9 @@ static void ieee80211_iface_work(struct
+ break;
+ ieee80211_mesh_rx_queued_mgmt(sdata, skb);
+ break;
++ case NL80211_IFTYPE_WDS:
++ ieee80211_wds_rx_queued_mgmt(sdata, skb);
++ break;
+ default:
+ WARN(1, "frame for unexpected interface type");
+ break;
+--- a/net/mac80211/rx.c
++++ b/net/mac80211/rx.c
+@@ -2350,6 +2350,7 @@ ieee80211_rx_h_action(struct ieee80211_r
+ sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
+ sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
+ sdata->vif.type != NL80211_IFTYPE_AP &&
++ sdata->vif.type != NL80211_IFTYPE_WDS &&
+ sdata->vif.type != NL80211_IFTYPE_ADHOC)
+ break;
--static void ar9003_hw_fill_txdesc(struct ath_hw *ah, void *ds, u32 seglen,
-- bool is_firstseg, bool is_lastseg,
-- const void *ds0, dma_addr_t buf_addr,
-- unsigned int qcu)
--{
-- struct ar9003_txc *ads = (struct ar9003_txc *) ds;
-- unsigned int descid = 0;
--
-- ads->info = (ATHEROS_VENDOR_ID << AR_DescId_S) |
-- (1 << AR_TxRxDesc_S) |
-- (1 << AR_CtrlStat_S) |
-- (qcu << AR_TxQcuNum_S) | 0x17;
--
-- ads->data0 = buf_addr;
-- ads->data1 = 0;
-- ads->data2 = 0;
-- ads->data3 = 0;
--
-- ads->ctl3 = (seglen << AR_BufLen_S);
-- ads->ctl3 &= AR_BufLen;
--
-- /* Fill in pointer checksum and descriptor id */
-- ads->ctl10 = ar9003_calc_ptr_chksum(ads);
-- ads->ctl10 |= (descid << AR_TxDescId_S);
--
-- if (is_firstseg) {
-- ads->ctl12 |= (is_lastseg ? 0 : AR_TxMore);
-- } else if (is_lastseg) {
-- ads->ctl11 = 0;
-- ads->ctl12 = 0;
-- ads->ctl13 = AR9003TXC_CONST(ds0)->ctl13;
-- ads->ctl14 = AR9003TXC_CONST(ds0)->ctl14;
-- } else {
-- /* XXX Intermediate descriptor in a multi-descriptor frame.*/
-- ads->ctl11 = 0;
-- ads->ctl12 = AR_TxMore;
-- ads->ctl13 = 0;
-- ads->ctl14 = 0;
-- }
--}
--
- static int ar9003_hw_proc_txdesc(struct ath_hw *ah, void *ds,
- struct ath_tx_status *ts)
- {
-@@ -310,161 +395,6 @@ static int ar9003_hw_proc_txdesc(struct
- return 0;
- }
+@@ -2655,14 +2656,15 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_
--static void ar9003_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
-- u32 pktlen, enum ath9k_pkt_type type, u32 txpower,
-- u8 keyIx, enum ath9k_key_type keyType, u32 flags)
--{
-- struct ar9003_txc *ads = (struct ar9003_txc *) ds;
--
-- if (txpower > ah->txpower_limit)
-- txpower = ah->txpower_limit;
--
-- if (txpower > 63)
-- txpower = 63;
--
-- ads->ctl11 = (pktlen & AR_FrameLen)
-- | (flags & ATH9K_TXDESC_VMF ? AR_VirtMoreFrag : 0)
-- | SM(txpower, AR_XmitPower)
-- | (flags & ATH9K_TXDESC_VEOL ? AR_VEOL : 0)
-- | (keyIx != ATH9K_TXKEYIX_INVALID ? AR_DestIdxValid : 0)
-- | (flags & ATH9K_TXDESC_LOWRXCHAIN ? AR_LowRxChain : 0);
--
-- ads->ctl12 =
-- (keyIx != ATH9K_TXKEYIX_INVALID ? SM(keyIx, AR_DestIdx) : 0)
-- | SM(type, AR_FrameType)
-- | (flags & ATH9K_TXDESC_NOACK ? AR_NoAck : 0)
-- | (flags & ATH9K_TXDESC_EXT_ONLY ? AR_ExtOnly : 0)
-- | (flags & ATH9K_TXDESC_EXT_AND_CTL ? AR_ExtAndCtl : 0);
--
-- ads->ctl17 = SM(keyType, AR_EncrType) |
-- (flags & ATH9K_TXDESC_LDPC ? AR_LDPC : 0);
-- ads->ctl18 = 0;
-- ads->ctl19 = AR_Not_Sounding;
--
-- ads->ctl20 = 0;
-- ads->ctl21 = 0;
-- ads->ctl22 = 0;
--}
--
--static void ar9003_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val)
--{
-- struct ar9003_txc *ads = (struct ar9003_txc *) ds;
--
-- if (val)
-- ads->ctl11 |= AR_ClrDestMask;
-- else
-- ads->ctl11 &= ~AR_ClrDestMask;
--}
--
--static void ar9003_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
-- void *lastds,
-- u32 durUpdateEn, u32 rtsctsRate,
-- u32 rtsctsDuration,
-- struct ath9k_11n_rate_series series[],
-- u32 nseries, u32 flags)
--{
-- struct ar9003_txc *ads = (struct ar9003_txc *) ds;
-- struct ar9003_txc *last_ads = (struct ar9003_txc *) lastds;
-- u_int32_t ctl11;
--
-- if (flags & (ATH9K_TXDESC_RTSENA | ATH9K_TXDESC_CTSENA)) {
-- ctl11 = ads->ctl11;
--
-- if (flags & ATH9K_TXDESC_RTSENA) {
-- ctl11 &= ~AR_CTSEnable;
-- ctl11 |= AR_RTSEnable;
-- } else {
-- ctl11 &= ~AR_RTSEnable;
-- ctl11 |= AR_CTSEnable;
-- }
--
-- ads->ctl11 = ctl11;
-- } else {
-- ads->ctl11 = (ads->ctl11 & ~(AR_RTSEnable | AR_CTSEnable));
-- }
--
-- ads->ctl13 = set11nTries(series, 0)
-- | set11nTries(series, 1)
-- | set11nTries(series, 2)
-- | set11nTries(series, 3)
-- | (durUpdateEn ? AR_DurUpdateEna : 0)
-- | SM(0, AR_BurstDur);
--
-- ads->ctl14 = set11nRate(series, 0)
-- | set11nRate(series, 1)
-- | set11nRate(series, 2)
-- | set11nRate(series, 3);
--
-- ads->ctl15 = set11nPktDurRTSCTS(series, 0)
-- | set11nPktDurRTSCTS(series, 1);
--
-- ads->ctl16 = set11nPktDurRTSCTS(series, 2)
-- | set11nPktDurRTSCTS(series, 3);
--
-- ads->ctl18 = set11nRateFlags(series, 0)
-- | set11nRateFlags(series, 1)
-- | set11nRateFlags(series, 2)
-- | set11nRateFlags(series, 3)
-- | SM(rtsctsRate, AR_RTSCTSRate);
-- ads->ctl19 = AR_Not_Sounding;
--
-- last_ads->ctl13 = ads->ctl13;
-- last_ads->ctl14 = ads->ctl14;
--}
--
--static void ar9003_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
-- u32 aggrLen)
--{
-- struct ar9003_txc *ads = (struct ar9003_txc *) ds;
--
-- ads->ctl12 |= (AR_IsAggr | AR_MoreAggr);
--
-- ads->ctl17 &= ~AR_AggrLen;
-- ads->ctl17 |= SM(aggrLen, AR_AggrLen);
--}
--
--static void ar9003_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
-- u32 numDelims)
--{
-- struct ar9003_txc *ads = (struct ar9003_txc *) ds;
-- unsigned int ctl17;
--
-- ads->ctl12 |= (AR_IsAggr | AR_MoreAggr);
--
-- /*
-- * We use a stack variable to manipulate ctl6 to reduce uncached
-- * read modify, modfiy, write.
-- */
-- ctl17 = ads->ctl17;
-- ctl17 &= ~AR_PadDelim;
-- ctl17 |= SM(numDelims, AR_PadDelim);
-- ads->ctl17 = ctl17;
--}
--
--static void ar9003_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
--{
-- struct ar9003_txc *ads = (struct ar9003_txc *) ds;
--
-- ads->ctl12 |= AR_IsAggr;
-- ads->ctl12 &= ~AR_MoreAggr;
-- ads->ctl17 &= ~AR_PadDelim;
--}
--
--static void ar9003_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
--{
-- struct ar9003_txc *ads = (struct ar9003_txc *) ds;
--
-- ads->ctl12 &= (~AR_IsAggr & ~AR_MoreAggr);
--}
--
--void ar9003_hw_set_paprd_txdesc(struct ath_hw *ah, void *ds, u8 chains)
--{
-- struct ar9003_txc *ads = ds;
--
-- ads->ctl12 |= SM(chains, AR_PAPRDChainMask);
--}
--EXPORT_SYMBOL(ar9003_hw_set_paprd_txdesc);
--
- void ar9003_hw_attach_mac_ops(struct ath_hw *hw)
- {
- struct ath_hw_ops *ops = ath9k_hw_ops(hw);
-@@ -472,15 +402,8 @@ void ar9003_hw_attach_mac_ops(struct ath
- ops->rx_enable = ar9003_hw_rx_enable;
- ops->set_desc_link = ar9003_hw_set_desc_link;
- ops->get_isr = ar9003_hw_get_isr;
-- ops->fill_txdesc = ar9003_hw_fill_txdesc;
-+ ops->set_txdesc = ar9003_set_txdesc;
- ops->proc_txdesc = ar9003_hw_proc_txdesc;
-- ops->set11n_txdesc = ar9003_hw_set11n_txdesc;
-- ops->set11n_ratescenario = ar9003_hw_set11n_ratescenario;
-- ops->set11n_aggr_first = ar9003_hw_set11n_aggr_first;
-- ops->set11n_aggr_middle = ar9003_hw_set11n_aggr_middle;
-- ops->set11n_aggr_last = ar9003_hw_set11n_aggr_last;
-- ops->clr11n_aggr = ar9003_hw_clr11n_aggr;
-- ops->set_clrdmask = ar9003_hw_set_clrdmask;
- }
+ if (!ieee80211_vif_is_mesh(&sdata->vif) &&
+ sdata->vif.type != NL80211_IFTYPE_ADHOC &&
+- sdata->vif.type != NL80211_IFTYPE_STATION)
++ sdata->vif.type != NL80211_IFTYPE_STATION &&
++ sdata->vif.type != NL80211_IFTYPE_WDS)
+ return RX_DROP_MONITOR;
- void ath9k_hw_set_rx_bufsize(struct ath_hw *ah, u16 buf_size)
+ switch (stype) {
+ case cpu_to_le16(IEEE80211_STYPE_AUTH):
+ case cpu_to_le16(IEEE80211_STYPE_BEACON):
+ case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
+- /* process for all: mesh, mlme, ibss */
++ /* process for all: mesh, mlme, ibss, wds */
+ break;
+ case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
+ case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
+@@ -2987,10 +2989,16 @@ static int prepare_for_handlers(struct i
+ }
+ break;
+ case NL80211_IFTYPE_WDS:
+- if (bssid || !ieee80211_is_data(hdr->frame_control))
+- return 0;
+ if (!ether_addr_equal(sdata->u.wds.remote_addr, hdr->addr2))
+ return 0;
++
++ if (ieee80211_is_data(hdr->frame_control) ||
++ ieee80211_is_action(hdr->frame_control)) {
++ if (compare_ether_addr(sdata->vif.addr, hdr->addr1))
++ return 0;
++ } else if (!ieee80211_is_beacon(hdr->frame_control))
++ return 0;
++
+ break;
+ case NL80211_IFTYPE_P2P_DEVICE:
+ if (!ieee80211_is_public_action(hdr, skb->len) &&
+--- a/net/mac80211/sta_info.h
++++ b/net/mac80211/sta_info.h
+@@ -32,7 +32,6 @@
+ * @WLAN_STA_SHORT_PREAMBLE: Station is capable of receiving short-preamble
+ * frames.
+ * @WLAN_STA_WME: Station is a QoS-STA.
+- * @WLAN_STA_WDS: Station is one of our WDS peers.
+ * @WLAN_STA_CLEAR_PS_FILT: Clear PS filter in hardware (using the
+ * IEEE80211_TX_CTL_CLEAR_PS_FILT control flag) when the next
+ * frame to this station is transmitted.
+@@ -64,7 +63,6 @@ enum ieee80211_sta_info_flags {
+ WLAN_STA_AUTHORIZED,
+ WLAN_STA_SHORT_PREAMBLE,
+ WLAN_STA_WME,
+- WLAN_STA_WDS,
+ WLAN_STA_CLEAR_PS_FILT,
+ WLAN_STA_MFP,
+ WLAN_STA_BLOCK_BA,
--- a/drivers/net/wireless/ath/ath9k/ath9k.h
+++ b/drivers/net/wireless/ath/ath9k/ath9k.h
-@@ -87,17 +87,14 @@ struct ath_config {
- * @BUF_AMPDU: This buffer is an ampdu, as part of an aggregate (during TX)
- * @BUF_AGGR: Indicates whether the buffer can be aggregated
- * (used in aggregation scheduling)
-- * @BUF_XRETRY: To denote excessive retries of the buffer
- */
- enum buffer_type {
- BUF_AMPDU = BIT(0),
- BUF_AGGR = BIT(1),
-- BUF_XRETRY = BIT(2),
- };
-
- #define bf_isampdu(bf) (bf->bf_state.bf_type & BUF_AMPDU)
- #define bf_isaggr(bf) (bf->bf_state.bf_type & BUF_AGGR)
--#define bf_isxretried(bf) (bf->bf_state.bf_type & BUF_XRETRY)
-
- #define ATH_TXSTATUS_RING_SIZE 64
-
-@@ -216,6 +213,7 @@ struct ath_frame_info {
- struct ath_buf_state {
- u8 bf_type;
- u8 bfs_paprd;
-+ u8 ndelim;
- u16 seqno;
- unsigned long bfs_paprd_timestamp;
- };
-@@ -230,7 +228,6 @@ struct ath_buf {
- dma_addr_t bf_daddr; /* physical addr of desc */
- dma_addr_t bf_buf_addr; /* physical addr of data buffer, for DMA */
- bool bf_stale;
-- u16 bf_flags;
- struct ath_buf_state bf_state;
- };
-
-@@ -277,8 +274,7 @@ struct ath_tx_control {
- };
-
- #define ATH_TX_ERROR 0x01
--#define ATH_TX_XRETRY 0x02
--#define ATH_TX_BAR 0x04
-+#define ATH_TX_BAR 0x02
-
- /**
- * @txq_map: Index is mac80211 queue number. This is
+@@ -314,7 +314,6 @@ struct ath_rx {
+ u32 *rxlink;
+ u32 num_pkts;
+ unsigned int rxfilter;
+- spinlock_t rxbuflock;
+ struct list_head rxbuf;
+ struct ath_descdma rxdma;
+ struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
+@@ -324,7 +323,6 @@ struct ath_rx {
+
+ int ath_startrecv(struct ath_softc *sc);
+ bool ath_stoprecv(struct ath_softc *sc);
+-void ath_flushrecv(struct ath_softc *sc);
+ u32 ath_calcrxfilter(struct ath_softc *sc);
+ int ath_rx_init(struct ath_softc *sc, int nbufs);
+ void ath_rx_cleanup(struct ath_softc *sc);
+@@ -334,9 +332,8 @@ void ath_txq_lock(struct ath_softc *sc,
+ void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq);
+ void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
+ void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
+-bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
+-void ath_draintxq(struct ath_softc *sc,
+- struct ath_txq *txq, bool retry_tx);
++bool ath_drain_all_txq(struct ath_softc *sc);
++void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
+ void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
+ void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
+ void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
+@@ -641,7 +638,6 @@ void ath_ant_comb_update(struct ath_soft
+ enum sc_op_flags {
+ SC_OP_INVALID,
+ SC_OP_BEACONS,
+- SC_OP_RXFLUSH,
+ SC_OP_ANI_RUN,
+ SC_OP_PRIM_STA_VIF,
+ SC_OP_HW_RESET,
--- a/drivers/net/wireless/ath/ath9k/beacon.c
+++ b/drivers/net/wireless/ath/ath9k/beacon.c
-@@ -73,44 +73,39 @@ static void ath_beacon_setup(struct ath_
- struct sk_buff *skb = bf->bf_mpdu;
- struct ath_hw *ah = sc->sc_ah;
- struct ath_common *common = ath9k_hw_common(ah);
-- struct ath_desc *ds;
-- struct ath9k_11n_rate_series series[4];
-- int flags, ctsrate = 0, ctsduration = 0;
-+ struct ath_tx_info info;
- struct ieee80211_supported_band *sband;
-+ u8 chainmask = ah->txchainmask;
- u8 rate = 0;
-
- ath9k_reset_beacon_status(sc);
-
-- ds = bf->bf_desc;
-- flags = ATH9K_TXDESC_NOACK;
--
-- ds->ds_link = 0;
--
- sband = &sc->sbands[common->hw->conf.channel->band];
- rate = sband->bitrates[rateidx].hw_value;
- if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
- rate |= sband->bitrates[rateidx].hw_value_short;
-
-- ath9k_hw_set11n_txdesc(ah, ds, skb->len + FCS_LEN,
-- ATH9K_PKT_TYPE_BEACON,
-- MAX_RATE_POWER,
-- ATH9K_TXKEYIX_INVALID,
-- ATH9K_KEY_TYPE_CLEAR,
-- flags);
--
-- /* NB: beacon's BufLen must be a multiple of 4 bytes */
-- ath9k_hw_filltxdesc(ah, ds, roundup(skb->len, 4),
-- true, true, ds, bf->bf_buf_addr,
-- sc->beacon.beaconq);
--
-- memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4);
-- series[0].Tries = 1;
-- series[0].Rate = rate;
-- series[0].ChSel = ath_txchainmask_reduction(sc,
-- ah->txchainmask, series[0].Rate);
-- series[0].RateFlags = (ctsrate) ? ATH9K_RATESERIES_RTS_CTS : 0;
-- ath9k_hw_set11n_ratescenario(ah, ds, ds, 0, ctsrate, ctsduration,
-- series, 4, 0);
-+ memset(&info, 0, sizeof(info));
-+ info.pkt_len = skb->len + FCS_LEN;
-+ info.type = ATH9K_PKT_TYPE_BEACON;
-+ info.txpower = MAX_RATE_POWER;
-+ info.keyix = ATH9K_TXKEYIX_INVALID;
-+ info.keytype = ATH9K_KEY_TYPE_CLEAR;
-+ info.flags = ATH9K_TXDESC_NOACK;
-+
-+ info.buf_addr[0] = bf->bf_buf_addr;
-+ info.buf_len[0] = roundup(skb->len, 4);
-+
-+ info.is_first = true;
-+ info.is_last = true;
-+
-+ info.qcu = sc->beacon.beaconq;
-+
-+ info.rates[0].Tries = 1;
-+ info.rates[0].Rate = rate;
-+ info.rates[0].ChSel = ath_txchainmask_reduction(sc, chainmask, rate);
-+
-+ ath9k_hw_set_txdesc(ah, bf->bf_desc, &info);
- }
+@@ -147,6 +147,7 @@ static struct ath_buf *ath9k_beacon_gene
+ skb->len, DMA_TO_DEVICE);
+ dev_kfree_skb_any(skb);
+ bf->bf_buf_addr = 0;
++ bf->bf_mpdu = NULL;
+ }
+
+ skb = ieee80211_beacon_get(hw, vif);
+@@ -198,7 +199,7 @@ static struct ath_buf *ath9k_beacon_gene
+ if (sc->nvifs > 1) {
+ ath_dbg(common, BEACON,
+ "Flushing previous cabq traffic\n");
+- ath_draintxq(sc, cabq, false);
++ ath_draintxq(sc, cabq);
+ }
+ }
+
+@@ -359,7 +360,6 @@ void ath9k_beacon_tasklet(unsigned long
+ return;
- static void ath_tx_cabq(struct ieee80211_hw *hw, struct sk_buff *skb)
-@@ -517,6 +512,7 @@ static void ath_beacon_config_ap(struct
- /* Set the computed AP beacon timers */
+ bf = ath9k_beacon_generate(sc->hw, vif);
+- WARN_ON(!bf);
- ath9k_hw_disable_interrupts(ah);
-+ sc->sc_flags |= SC_OP_TSF_RESET;
- ath9k_beacon_init(sc, nexttbtt, intval);
- sc->beacon.bmisscnt = 0;
- ath9k_hw_set_interrupts(ah, ah->imask);
+ if (sc->beacon.bmisscnt != 0) {
+ ath_dbg(common, BSTUCK, "resume beacon xmit after %u misses\n",
--- a/drivers/net/wireless/ath/ath9k/debug.c
+++ b/drivers/net/wireless/ath/ath9k/debug.c
-@@ -826,7 +826,8 @@ static ssize_t read_file_misc(struct fil
- }
-
- void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
-- struct ath_tx_status *ts, struct ath_txq *txq)
-+ struct ath_tx_status *ts, struct ath_txq *txq,
-+ unsigned int flags)
- {
- #define TX_SAMP_DBG(c) (sc->debug.bb_mac_samp[sc->debug.sampidx].ts\
- [sc->debug.tsidx].c)
-@@ -836,12 +837,12 @@ void ath_debug_stat_tx(struct ath_softc
- sc->debug.stats.txstats[qnum].tx_bytes_all += bf->bf_mpdu->len;
-
- if (bf_isampdu(bf)) {
-- if (bf_isxretried(bf))
-+ if (flags & ATH_TX_BAR)
- TX_STAT_INC(qnum, a_xretries);
- else
- TX_STAT_INC(qnum, a_completed);
- } else {
-- if (bf_isxretried(bf))
-+ if (ts->ts_status & ATH9K_TXERR_XRETRY)
- TX_STAT_INC(qnum, xretries);
- else
- TX_STAT_INC(qnum, completed);
+@@ -861,7 +861,6 @@ static ssize_t read_file_recv(struct fil
+ RXS_ERR("RX-LENGTH-ERR", rx_len_err);
+ RXS_ERR("RX-OOM-ERR", rx_oom_err);
+ RXS_ERR("RX-RATE-ERR", rx_rate_err);
+- RXS_ERR("RX-DROP-RXFLUSH", rx_drop_rxflush);
+ RXS_ERR("RX-TOO-MANY-FRAGS", rx_too_many_frags_err);
+
+ PHY_ERR("UNDERRUN ERR", ATH9K_PHYERR_UNDERRUN);
--- a/drivers/net/wireless/ath/ath9k/debug.h
+++ b/drivers/net/wireless/ath/ath9k/debug.h
-@@ -230,7 +230,8 @@ int ath9k_init_debug(struct ath_hw *ah);
- void ath9k_debug_samp_bb_mac(struct ath_softc *sc);
- void ath_debug_stat_interrupt(struct ath_softc *sc, enum ath9k_int status);
- void ath_debug_stat_tx(struct ath_softc *sc, struct ath_buf *bf,
-- struct ath_tx_status *ts, struct ath_txq *txq);
-+ struct ath_tx_status *ts, struct ath_txq *txq,
-+ unsigned int flags);
- void ath_debug_stat_rx(struct ath_softc *sc, struct ath_rx_status *rs);
-
- #else
-@@ -252,7 +253,8 @@ static inline void ath_debug_stat_interr
- static inline void ath_debug_stat_tx(struct ath_softc *sc,
- struct ath_buf *bf,
- struct ath_tx_status *ts,
-- struct ath_txq *txq)
-+ struct ath_txq *txq,
-+ unsigned int flags)
- {
- }
-
---- a/drivers/net/wireless/ath/ath9k/hw-ops.h
-+++ b/drivers/net/wireless/ath/ath9k/hw-ops.h
-@@ -54,13 +54,10 @@ static inline bool ath9k_hw_getisr(struc
- return ath9k_hw_ops(ah)->get_isr(ah, masked);
+@@ -216,7 +216,6 @@ struct ath_tx_stats {
+ * @rx_oom_err: No. of frames dropped due to OOM issues.
+ * @rx_rate_err: No. of frames dropped due to rate errors.
+ * @rx_too_many_frags_err: Frames dropped due to too-many-frags received.
+- * @rx_drop_rxflush: No. of frames dropped due to RX-FLUSH.
+ * @rx_beacons: No. of beacons received.
+ * @rx_frags: No. of rx-fragements received.
+ */
+@@ -235,7 +234,6 @@ struct ath_rx_stats {
+ u32 rx_oom_err;
+ u32 rx_rate_err;
+ u32 rx_too_many_frags_err;
+- u32 rx_drop_rxflush;
+ u32 rx_beacons;
+ u32 rx_frags;
+ };
+--- a/drivers/net/wireless/ath/ath9k/main.c
++++ b/drivers/net/wireless/ath/ath9k/main.c
+@@ -182,7 +182,7 @@ static void ath_restart_work(struct ath_
+ ath_start_ani(sc);
}
--static inline void ath9k_hw_filltxdesc(struct ath_hw *ah, void *ds, u32 seglen,
-- bool is_firstseg, bool is_lastseg,
-- const void *ds0, dma_addr_t buf_addr,
-- unsigned int qcu)
-+static inline void ath9k_hw_set_txdesc(struct ath_hw *ah, void *ds,
-+ struct ath_tx_info *i)
+-static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
++static bool ath_prepare_reset(struct ath_softc *sc)
{
-- ath9k_hw_ops(ah)->fill_txdesc(ah, ds, seglen, is_firstseg, is_lastseg,
-- ds0, buf_addr, qcu);
-+ return ath9k_hw_ops(ah)->set_txdesc(ah, ds, i);
- }
+ struct ath_hw *ah = sc->sc_ah;
+ bool ret = true;
+@@ -196,20 +196,12 @@ static bool ath_prepare_reset(struct ath
+ ath9k_debug_samp_bb_mac(sc);
+ ath9k_hw_disable_interrupts(ah);
- static inline int ath9k_hw_txprocdesc(struct ath_hw *ah, void *ds,
-@@ -69,55 +66,6 @@ static inline int ath9k_hw_txprocdesc(st
- return ath9k_hw_ops(ah)->proc_txdesc(ah, ds, ts);
- }
+- if (!ath_stoprecv(sc))
++ if (!ath_drain_all_txq(sc))
+ ret = false;
--static inline void ath9k_hw_set11n_txdesc(struct ath_hw *ah, void *ds,
-- u32 pktLen, enum ath9k_pkt_type type,
-- u32 txPower, u32 keyIx,
-- enum ath9k_key_type keyType,
-- u32 flags)
--{
-- ath9k_hw_ops(ah)->set11n_txdesc(ah, ds, pktLen, type, txPower, keyIx,
-- keyType, flags);
--}
--
--static inline void ath9k_hw_set11n_ratescenario(struct ath_hw *ah, void *ds,
-- void *lastds,
-- u32 durUpdateEn, u32 rtsctsRate,
-- u32 rtsctsDuration,
-- struct ath9k_11n_rate_series series[],
-- u32 nseries, u32 flags)
--{
-- ath9k_hw_ops(ah)->set11n_ratescenario(ah, ds, lastds, durUpdateEn,
-- rtsctsRate, rtsctsDuration, series,
-- nseries, flags);
--}
--
--static inline void ath9k_hw_set11n_aggr_first(struct ath_hw *ah, void *ds,
-- u32 aggrLen)
--{
-- ath9k_hw_ops(ah)->set11n_aggr_first(ah, ds, aggrLen);
--}
--
--static inline void ath9k_hw_set11n_aggr_middle(struct ath_hw *ah, void *ds,
-- u32 numDelims)
--{
-- ath9k_hw_ops(ah)->set11n_aggr_middle(ah, ds, numDelims);
--}
--
--static inline void ath9k_hw_set11n_aggr_last(struct ath_hw *ah, void *ds)
--{
-- ath9k_hw_ops(ah)->set11n_aggr_last(ah, ds);
--}
--
--static inline void ath9k_hw_clr11n_aggr(struct ath_hw *ah, void *ds)
--{
-- ath9k_hw_ops(ah)->clr11n_aggr(ah, ds);
--}
--
--static inline void ath9k_hw_set_clrdmask(struct ath_hw *ah, void *ds, bool val)
--{
-- ath9k_hw_ops(ah)->set_clrdmask(ah, ds, val);
--}
--
- static inline void ath9k_hw_antdiv_comb_conf_get(struct ath_hw *ah,
- struct ath_hw_antcomb_conf *antconf)
- {
-@@ -233,11 +181,6 @@ static inline void ath9k_hw_restore_chai
- return ath9k_hw_private_ops(ah)->restore_chainmask(ah);
- }
+- if (!ath_drain_all_txq(sc, retry_tx))
++ if (!ath_stoprecv(sc))
+ ret = false;
--static inline void ath9k_hw_set_diversity(struct ath_hw *ah, bool value)
--{
-- return ath9k_hw_private_ops(ah)->set_diversity(ah, value);
--}
+- if (!flush) {
+- if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
+- ath_rx_tasklet(sc, 1, true);
+- ath_rx_tasklet(sc, 1, false);
+- } else {
+- ath_flushrecv(sc);
+- }
-
- static inline bool ath9k_hw_ani_control(struct ath_hw *ah,
- enum ath9k_ani_cmd cmd, int param)
- {
---- a/drivers/net/wireless/ath/ath9k/hw.c
-+++ b/drivers/net/wireless/ath/ath9k/hw.c
-@@ -1496,14 +1496,16 @@ int ath9k_hw_reset(struct ath_hw *ah, st
- }
- ah->noise = ath9k_hw_getchan_noise(ah, chan);
+ return ret;
+ }
-+ if ((AR_SREV_9280(ah) && common->bus_ops->ath_bus_type == ATH_PCI) ||
-+ (AR_SREV_9300_20_OR_LATER(ah) && IS_CHAN_5GHZ(chan)))
-+ bChannelChange = false;
-+
- if (bChannelChange &&
- (ah->chip_fullsleep != true) &&
- (ah->curchan != NULL) &&
- (chan->channel != ah->curchan->channel) &&
- ((chan->channelFlags & CHANNEL_ALL) ==
-- (ah->curchan->channelFlags & CHANNEL_ALL)) &&
-- (!AR_SREV_9280(ah) || AR_DEVID_7010(ah))) {
--
-+ (ah->curchan->channelFlags & CHANNEL_ALL))) {
- if (ath9k_hw_channel_change(ah, chan)) {
- ath9k_hw_loadnf(ah, ah->curchan);
- ath9k_hw_start_nfcal(ah, true);
---- a/drivers/net/wireless/ath/ath9k/hw.h
-+++ b/drivers/net/wireless/ath/ath9k/hw.h
-@@ -583,7 +583,6 @@ struct ath_hw_private_ops {
- bool (*rfbus_req)(struct ath_hw *ah);
- void (*rfbus_done)(struct ath_hw *ah);
- void (*restore_chainmask)(struct ath_hw *ah);
-- void (*set_diversity)(struct ath_hw *ah, bool value);
- u32 (*compute_pll_control)(struct ath_hw *ah,
- struct ath9k_channel *chan);
- bool (*ani_control)(struct ath_hw *ah, enum ath9k_ani_cmd cmd,
-@@ -615,30 +614,10 @@ struct ath_hw_ops {
- u8 rxchainmask,
- bool longcal);
- bool (*get_isr)(struct ath_hw *ah, enum ath9k_int *masked);
-- void (*fill_txdesc)(struct ath_hw *ah, void *ds, u32 seglen,
-- bool is_firstseg, bool is_is_lastseg,
-- const void *ds0, dma_addr_t buf_addr,
-- unsigned int qcu);
-+ void (*set_txdesc)(struct ath_hw *ah, void *ds,
-+ struct ath_tx_info *i);
- int (*proc_txdesc)(struct ath_hw *ah, void *ds,
- struct ath_tx_status *ts);
-- void (*set11n_txdesc)(struct ath_hw *ah, void *ds,
-- u32 pktLen, enum ath9k_pkt_type type,
-- u32 txPower, u8 keyIx,
-- enum ath9k_key_type keyType,
-- u32 flags);
-- void (*set11n_ratescenario)(struct ath_hw *ah, void *ds,
-- void *lastds,
-- u32 durUpdateEn, u32 rtsctsRate,
-- u32 rtsctsDuration,
-- struct ath9k_11n_rate_series series[],
-- u32 nseries, u32 flags);
-- void (*set11n_aggr_first)(struct ath_hw *ah, void *ds,
-- u32 aggrLen);
-- void (*set11n_aggr_middle)(struct ath_hw *ah, void *ds,
-- u32 numDelims);
-- void (*set11n_aggr_last)(struct ath_hw *ah, void *ds);
-- void (*clr11n_aggr)(struct ath_hw *ah, void *ds);
-- void (*set_clrdmask)(struct ath_hw *ah, void *ds, bool val);
- void (*antdiv_comb_conf_get)(struct ath_hw *ah,
- struct ath_hw_antcomb_conf *antconf);
- void (*antdiv_comb_conf_set)(struct ath_hw *ah,
---- a/drivers/net/wireless/ath/ath9k/mac.c
-+++ b/drivers/net/wireless/ath/ath9k/mac.c
-@@ -62,18 +62,6 @@ void ath9k_hw_txstart(struct ath_hw *ah,
+@@ -255,18 +247,17 @@ static bool ath_complete_reset(struct at
+ return true;
}
- EXPORT_SYMBOL(ath9k_hw_txstart);
--void ath9k_hw_cleartxdesc(struct ath_hw *ah, void *ds)
--{
-- struct ar5416_desc *ads = AR5416DESC(ds);
--
-- ads->ds_txstatus0 = ads->ds_txstatus1 = 0;
-- ads->ds_txstatus2 = ads->ds_txstatus3 = 0;
-- ads->ds_txstatus4 = ads->ds_txstatus5 = 0;
-- ads->ds_txstatus6 = ads->ds_txstatus7 = 0;
-- ads->ds_txstatus8 = ads->ds_txstatus9 = 0;
--}
--EXPORT_SYMBOL(ath9k_hw_cleartxdesc);
--
- u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q)
+-static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
+- bool retry_tx)
++static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
{
- u32 npend;
-@@ -596,7 +584,7 @@ int ath9k_hw_rxprocdesc(struct ath_hw *a
- else
- rs->rs_keyix = ATH9K_RXKEYIX_INVALID;
-
-- rs->rs_rate = RXSTATUS_RATE(ah, (&ads));
-+ rs->rs_rate = MS(ads.ds_rxstatus0, AR_RxRate);
- rs->rs_more = (ads.ds_rxstatus1 & AR_RxMore) ? 1 : 0;
-
- rs->rs_isaggr = (ads.ds_rxstatus8 & AR_RxAggr) ? 1 : 0;
---- a/drivers/net/wireless/ath/ath9k/mac.h
-+++ b/drivers/net/wireless/ath/ath9k/mac.h
-@@ -17,10 +17,6 @@
- #ifndef MAC_H
- #define MAC_H
-
--#define RXSTATUS_RATE(ah, ads) (AR_SREV_5416_20_OR_LATER(ah) ? \
-- MS(ads->ds_rxstatus0, AR_RxRate) : \
-- (ads->ds_rxstatus3 >> 2) & 0xFF)
--
- #define set11nTries(_series, _index) \
- (SM((_series)[_index].Tries, AR_XmitDataTries##_index))
-
-@@ -263,7 +259,11 @@ struct ath_desc {
- #define ATH9K_TXDESC_VMF 0x0100
- #define ATH9K_TXDESC_FRAG_IS_ON 0x0200
- #define ATH9K_TXDESC_LOWRXCHAIN 0x0400
--#define ATH9K_TXDESC_LDPC 0x00010000
-+#define ATH9K_TXDESC_LDPC 0x0800
-+#define ATH9K_TXDESC_CLRDMASK 0x1000
-+
-+#define ATH9K_TXDESC_PAPRD 0x70000
-+#define ATH9K_TXDESC_PAPRD_S 16
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(ah);
+ struct ath9k_hw_cal_data *caldata = NULL;
+ bool fastcc = true;
+- bool flush = false;
+ int r;
- #define ATH9K_RXDESC_INTREQ 0x0020
+ __ath_cancel_work(sc);
-@@ -659,6 +659,13 @@ struct ath9k_11n_rate_series {
- u32 RateFlags;
- };
++ tasklet_disable(&sc->intr_tq);
+ spin_lock_bh(&sc->sc_pcu_lock);
-+enum aggr_type {
-+ AGGR_BUF_NONE,
-+ AGGR_BUF_FIRST,
-+ AGGR_BUF_MIDDLE,
-+ AGGR_BUF_LAST,
-+};
-+
- enum ath9k_key_type {
- ATH9K_KEY_TYPE_CLEAR,
- ATH9K_KEY_TYPE_WEP,
-@@ -666,6 +673,33 @@ enum ath9k_key_type {
- ATH9K_KEY_TYPE_TKIP,
- };
+ if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
+@@ -276,11 +267,10 @@ static int ath_reset_internal(struct ath
-+struct ath_tx_info {
-+ u8 qcu;
-+
-+ bool is_first;
-+ bool is_last;
-+
-+ enum aggr_type aggr;
-+ u8 ndelim;
-+ u16 aggr_len;
-+
-+ dma_addr_t link;
-+ int pkt_len;
-+ u32 flags;
-+
-+ dma_addr_t buf_addr[4];
-+ int buf_len[4];
-+
-+ struct ath9k_11n_rate_series rates[4];
-+ u8 rtscts_rate;
-+ bool dur_update;
-+
-+ enum ath9k_pkt_type type;
-+ enum ath9k_key_type keytype;
-+ u8 keyix;
-+ u8 txpower;
-+};
-+
- struct ath_hw;
- struct ath9k_channel;
- enum ath9k_int;
-@@ -673,7 +707,6 @@ enum ath9k_int;
- u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q);
- void ath9k_hw_puttxbuf(struct ath_hw *ah, u32 q, u32 txdp);
- void ath9k_hw_txstart(struct ath_hw *ah, u32 q);
--void ath9k_hw_cleartxdesc(struct ath_hw *ah, void *ds);
- u32 ath9k_hw_numtxpending(struct ath_hw *ah, u32 q);
- bool ath9k_hw_updatetxtriglevel(struct ath_hw *ah, bool bIncTrigLevel);
- bool ath9k_hw_stop_dma_queue(struct ath_hw *ah, u32 q);
---- a/drivers/net/wireless/ath/ath9k/main.c
-+++ b/drivers/net/wireless/ath/ath9k/main.c
-@@ -111,24 +111,29 @@ void ath9k_ps_wakeup(struct ath_softc *s
- void ath9k_ps_restore(struct ath_softc *sc)
- {
- struct ath_common *common = ath9k_hw_common(sc->sc_ah);
-+ enum ath9k_power_mode mode;
- unsigned long flags;
+ if (!hchan) {
+ fastcc = false;
+- flush = true;
+ hchan = ah->curchan;
+ }
- spin_lock_irqsave(&sc->sc_pm_lock, flags);
- if (--sc->ps_usecount != 0)
- goto unlock;
+- if (!ath_prepare_reset(sc, retry_tx, flush))
++ if (!ath_prepare_reset(sc))
+ fastcc = false;
-- spin_lock(&common->cc_lock);
-- ath_hw_cycle_counters_update(common);
-- spin_unlock(&common->cc_lock);
--
- if (sc->ps_idle)
-- ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
-+ mode = ATH9K_PM_FULL_SLEEP;
- else if (sc->ps_enabled &&
- !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
- PS_WAIT_FOR_CAB |
- PS_WAIT_FOR_PSPOLL_DATA |
- PS_WAIT_FOR_TX_ACK)))
-- ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
-+ mode = ATH9K_PM_NETWORK_SLEEP;
-+ else
-+ goto unlock;
-+
-+ spin_lock(&common->cc_lock);
-+ ath_hw_cycle_counters_update(common);
-+ spin_unlock(&common->cc_lock);
-+
-+ ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
-
- unlock:
- spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
-@@ -247,8 +252,8 @@ static bool ath_prepare_reset(struct ath
-
- if (!flush) {
- if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
-- ath_rx_tasklet(sc, 0, true);
-- ath_rx_tasklet(sc, 0, false);
-+ ath_rx_tasklet(sc, 1, true);
-+ ath_rx_tasklet(sc, 1, false);
- } else {
- ath_flushrecv(sc);
- }
-@@ -669,15 +674,15 @@ void ath9k_tasklet(unsigned long data)
- u32 status = sc->intrstatus;
- u32 rxmask;
+ ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
+@@ -302,6 +292,8 @@ static int ath_reset_internal(struct ath
-+ ath9k_ps_wakeup(sc);
-+ spin_lock(&sc->sc_pcu_lock);
+ out:
+ spin_unlock_bh(&sc->sc_pcu_lock);
++ tasklet_enable(&sc->intr_tq);
+
- if ((status & ATH9K_INT_FATAL) ||
- (status & ATH9K_INT_BB_WATCHDOG)) {
- ieee80211_queue_work(sc->hw, &sc->hw_reset_work);
-- return;
-+ goto out;
- }
-
-- ath9k_ps_wakeup(sc);
-- spin_lock(&sc->sc_pcu_lock);
--
- /*
- * Only run the baseband hang check if beacons stop working in AP or
- * IBSS mode, because it has a high false positive rate. For station
-@@ -725,6 +730,7 @@ void ath9k_tasklet(unsigned long data)
- if (status & ATH9K_INT_GENTIMER)
- ath_gen_timer_isr(sc->sc_ah);
-
-+out:
- /* re-enable hardware interrupt */
- ath9k_hw_enable_interrupts(ah);
-
-@@ -2015,6 +2021,7 @@ static void ath9k_config_bss(struct ath_
- /* Stop ANI */
- sc->sc_flags &= ~SC_OP_ANI_RUN;
- del_timer_sync(&common->ani.timer);
-+ memset(&sc->caldata, 0, sizeof(sc->caldata));
- }
+ return r;
}
---- a/drivers/net/wireless/ath/ath9k/pci.c
-+++ b/drivers/net/wireless/ath/ath9k/pci.c
-@@ -332,16 +332,16 @@ static int ath_pci_resume(struct device
- if ((val & 0x0000ff00) != 0)
- pci_write_config_dword(pdev, 0x40, val & 0xffff00ff);
-
-+ ath9k_ps_wakeup(sc);
- /* Enable LED */
- ath9k_hw_cfg_output(sc->sc_ah, sc->sc_ah->led_pin,
- AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
-- ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 1);
-+ ath9k_hw_set_gpio(sc->sc_ah, sc->sc_ah->led_pin, 0);
-
- /*
- * Reset key cache to sane defaults (all entries cleared) instead of
- * semi-random values after suspend/resume.
- */
-- ath9k_ps_wakeup(sc);
- ath9k_cmn_init_crypto(sc->sc_ah);
- ath9k_ps_restore(sc);
+@@ -319,7 +311,7 @@ static int ath_set_channel(struct ath_so
+ if (test_bit(SC_OP_INVALID, &sc->sc_flags))
+ return -EIO;
---- a/drivers/net/wireless/ath/ath9k/recv.c
-+++ b/drivers/net/wireless/ath/ath9k/recv.c
-@@ -1839,7 +1839,7 @@ int ath_rx_tasklet(struct ath_softc *sc,
- * If we're asked to flush receive queue, directly
- * chain it back at the queue without processing it.
- */
-- if (flush)
-+ if (sc->sc_flags & SC_OP_RXFLUSH)
- goto requeue_drop_frag;
+- r = ath_reset_internal(sc, hchan, false);
++ r = ath_reset_internal(sc, hchan);
- retval = ath9k_rx_skb_preprocess(common, hw, hdr, &rs,
-@@ -1967,7 +1967,8 @@ requeue:
- } else {
- list_move_tail(&bf->list, &sc->rx.rxbuf);
- ath_rx_buf_link(sc, bf);
-- ath9k_hw_rxena(ah);
-+ if (!flush)
-+ ath9k_hw_rxena(ah);
- }
- } while (1);
+ return r;
+ }
+@@ -549,23 +541,21 @@ chip_reset:
+ #undef SCHED_INTR
+ }
---- a/drivers/net/wireless/ath/ath9k/xmit.c
-+++ b/drivers/net/wireless/ath/ath9k/xmit.c
-@@ -56,10 +56,9 @@ static void ath_tx_complete_buf(struct a
- struct ath_tx_status *ts, int txok, int sendbar);
- static void ath_tx_txqaddbuf(struct ath_softc *sc, struct ath_txq *txq,
- struct list_head *head, bool internal);
--static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf, int len);
- static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf,
- struct ath_tx_status *ts, int nframes, int nbad,
-- int txok, bool update_rc);
-+ int txok);
- static void ath_tx_update_baw(struct ath_softc *sc, struct ath_atx_tid *tid,
- int seqno);
- static struct ath_buf *ath_tx_setup_buffer(struct ath_softc *sc,
-@@ -263,6 +262,7 @@ static void ath_tx_set_retry(struct ath_
- struct sk_buff *skb)
+-static int ath_reset(struct ath_softc *sc, bool retry_tx)
++static int ath_reset(struct ath_softc *sc)
{
- struct ath_frame_info *fi = get_frame_info(skb);
-+ struct ath_buf *bf = fi->bf;
- struct ieee80211_hdr *hdr;
-
- TX_STAT_INC(txq->axq_qnum, a_retries);
-@@ -271,6 +271,8 @@ static void ath_tx_set_retry(struct ath_
-
- hdr = (struct ieee80211_hdr *)skb->data;
- hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_RETRY);
-+ dma_sync_single_for_device(sc->dev, bf->bf_buf_addr,
-+ sizeof(*hdr), DMA_TO_DEVICE);
- }
+- int r;
++ int i, r;
- static struct ath_buf *ath_tx_get_buffer(struct ath_softc *sc)
-@@ -390,11 +392,9 @@ static void ath_tx_complete_aggr(struct
- while (bf) {
- bf_next = bf->bf_next;
-
-- bf->bf_state.bf_type |= BUF_XRETRY;
- if (!bf->bf_stale || bf_next != NULL)
- list_move_tail(&bf->list, &bf_head);
-
-- ath_tx_rc_status(sc, bf, ts, 1, 1, 0, false);
- ath_tx_complete_buf(sc, bf, txq, &bf_head, ts,
- 0, 0);
-
-@@ -470,7 +470,6 @@ static void ath_tx_complete_aggr(struct
- clear_filter = true;
- txpending = 1;
- } else {
-- bf->bf_state.bf_type |= BUF_XRETRY;
- txfail = 1;
- sendbar = 1;
- txfail_cnt++;
-@@ -497,17 +496,14 @@ static void ath_tx_complete_aggr(struct
-
- if (rc_update && (acked_cnt == 1 || txfail_cnt == 1)) {
- memcpy(tx_info->control.rates, rates, sizeof(rates));
-- ath_tx_rc_status(sc, bf, ts, nframes, nbad, txok, true);
-+ ath_tx_rc_status(sc, bf, ts, nframes, nbad, txok);
- rc_update = false;
-- } else {
-- ath_tx_rc_status(sc, bf, ts, nframes, nbad, txok, false);
- }
-
- ath_tx_complete_buf(sc, bf, txq, &bf_head, ts,
- !txfail, sendbar);
- } else {
- /* retry the un-acked ones */
-- ath9k_hw_set_clrdmask(sc->sc_ah, bf->bf_desc, false);
- if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)) {
- if (bf->bf_next == NULL && bf_last->bf_stale) {
- struct ath_buf *tbf;
-@@ -523,26 +519,13 @@ static void ath_tx_complete_aggr(struct
- ath_tx_update_baw(sc, tid, seqno);
- spin_unlock_bh(&txq->axq_lock);
-
-- bf->bf_state.bf_type |=
-- BUF_XRETRY;
-- ath_tx_rc_status(sc, bf, ts, nframes,
-- nbad, 0, false);
- ath_tx_complete_buf(sc, bf, txq,
- &bf_head,
-- ts, 0, 0);
-+ ts, 0, 1);
- break;
- }
-
-- ath9k_hw_cleartxdesc(sc->sc_ah,
-- tbf->bf_desc);
- fi->bf = tbf;
-- } else {
-- /*
-- * Clear descriptor status words for
-- * software retry
-- */
-- ath9k_hw_cleartxdesc(sc->sc_ah,
-- bf->bf_desc);
- }
- }
-
-@@ -778,7 +761,7 @@ static enum ATH_AGGR_STATUS ath_tx_form_
- if (!bf)
- continue;
-
-- bf->bf_state.bf_type |= BUF_AMPDU;
-+ bf->bf_state.bf_type = BUF_AMPDU | BUF_AGGR;
- seqno = bf->bf_state.seqno;
- if (!bf_first)
- bf_first = bf;
-@@ -805,8 +788,7 @@ static enum ATH_AGGR_STATUS ath_tx_form_
- }
+ ath9k_ps_wakeup(sc);
- tx_info = IEEE80211_SKB_CB(bf->bf_mpdu);
-- if (nframes && ((tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE) ||
-- !(tx_info->control.rates[0].flags & IEEE80211_TX_RC_MCS)))
-+ if (nframes && (tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE))
- break;
+- r = ath_reset_internal(sc, NULL, retry_tx);
++ r = ath_reset_internal(sc, NULL);
- /* do not exceed subframe limit */
-@@ -828,20 +810,17 @@ static enum ATH_AGGR_STATUS ath_tx_form_
-
- nframes++;
- bf->bf_next = NULL;
-- ath9k_hw_set_desc_link(sc->sc_ah, bf->bf_desc, 0);
-
- /* link buffers of this frame to the aggregate */
- if (!fi->retries)
- ath_tx_addto_baw(sc, tid, seqno);
-- ath9k_hw_set11n_aggr_middle(sc->sc_ah, bf->bf_desc, ndelim);
-+ bf->bf_state.ndelim = ndelim;
-
- __skb_unlink(skb, &tid->buf_q);
- list_add_tail(&bf->list, bf_q);
-- if (bf_prev) {
-+ if (bf_prev)
- bf_prev->bf_next = bf;
-- ath9k_hw_set_desc_link(sc->sc_ah, bf_prev->bf_desc,
-- bf->bf_daddr);
+- if (retry_tx) {
+- int i;
+- for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
+- if (ATH_TXQ_SETUP(sc, i)) {
+- spin_lock_bh(&sc->tx.txq[i].axq_lock);
+- ath_txq_schedule(sc, &sc->tx.txq[i]);
+- spin_unlock_bh(&sc->tx.txq[i].axq_lock);
+- }
- }
-+
- bf_prev = bf;
-
- } while (!skb_queue_empty(&tid->buf_q));
-@@ -852,12 +831,245 @@ static enum ATH_AGGR_STATUS ath_tx_form_
- #undef PADBYTES
- }
-
-+/*
-+ * rix - rate index
-+ * pktlen - total bytes (delims + data + fcs + pads + pad delims)
-+ * width - 0 for 20 MHz, 1 for 40 MHz
-+ * half_gi - to use 4us v/s 3.6 us for symbol time
-+ */
-+static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen,
-+ int width, int half_gi, bool shortPreamble)
-+{
-+ u32 nbits, nsymbits, duration, nsymbols;
-+ int streams;
-+
-+ /* find number of symbols: PLCP + data */
-+ streams = HT_RC_2_STREAMS(rix);
-+ nbits = (pktlen << 3) + OFDM_PLCP_BITS;
-+ nsymbits = bits_per_symbol[rix % 8][width] * streams;
-+ nsymbols = (nbits + nsymbits - 1) / nsymbits;
-+
-+ if (!half_gi)
-+ duration = SYMBOL_TIME(nsymbols);
-+ else
-+ duration = SYMBOL_TIME_HALFGI(nsymbols);
-+
-+ /* addup duration for legacy/ht training and signal fields */
-+ duration += L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams);
-+
-+ return duration;
-+}
-+
-+static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf,
-+ struct ath_tx_info *info, int len)
-+{
-+ struct ath_hw *ah = sc->sc_ah;
-+ struct sk_buff *skb;
-+ struct ieee80211_tx_info *tx_info;
-+ struct ieee80211_tx_rate *rates;
-+ const struct ieee80211_rate *rate;
-+ struct ieee80211_hdr *hdr;
-+ int i;
-+ u8 rix = 0;
-+
-+ skb = bf->bf_mpdu;
-+ tx_info = IEEE80211_SKB_CB(skb);
-+ rates = tx_info->control.rates;
-+ hdr = (struct ieee80211_hdr *)skb->data;
-+
-+ /* set dur_update_en for l-sig computation except for PS-Poll frames */
-+ info->dur_update = !ieee80211_is_pspoll(hdr->frame_control);
-+
-+ /*
-+ * We check if Short Preamble is needed for the CTS rate by
-+ * checking the BSS's global flag.
-+ * But for the rate series, IEEE80211_TX_RC_USE_SHORT_PREAMBLE is used.
-+ */
-+ rate = ieee80211_get_rts_cts_rate(sc->hw, tx_info);
-+ info->rtscts_rate = rate->hw_value;
-+ if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
-+ info->rtscts_rate |= rate->hw_value_short;
-+
-+ for (i = 0; i < 4; i++) {
-+ bool is_40, is_sgi, is_sp;
-+ int phy;
-+
-+ if (!rates[i].count || (rates[i].idx < 0))
++ for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
++ if (!ATH_TXQ_SETUP(sc, i))
+ continue;
+
-+ rix = rates[i].idx;
-+ info->rates[i].Tries = rates[i].count;
-+
-+ if (rates[i].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
-+ info->rates[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
-+ info->flags |= ATH9K_TXDESC_RTSENA;
-+ } else if (rates[i].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
-+ info->rates[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
-+ info->flags |= ATH9K_TXDESC_CTSENA;
-+ }
-+
-+ if (rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
-+ info->rates[i].RateFlags |= ATH9K_RATESERIES_2040;
-+ if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
-+ info->rates[i].RateFlags |= ATH9K_RATESERIES_HALFGI;
-+
-+ is_sgi = !!(rates[i].flags & IEEE80211_TX_RC_SHORT_GI);
-+ is_40 = !!(rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH);
-+ is_sp = !!(rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE);
-+
-+ if (rates[i].flags & IEEE80211_TX_RC_MCS) {
-+ /* MCS rates */
-+ info->rates[i].Rate = rix | 0x80;
-+ info->rates[i].ChSel = ath_txchainmask_reduction(sc,
-+ ah->txchainmask, info->rates[i].Rate);
-+ info->rates[i].PktDuration = ath_pkt_duration(sc, rix, len,
-+ is_40, is_sgi, is_sp);
-+ if (rix < 8 && (tx_info->flags & IEEE80211_TX_CTL_STBC))
-+ info->rates[i].RateFlags |= ATH9K_RATESERIES_STBC;
-+ continue;
-+ }
-+
-+ /* legacy rates */
-+ if ((tx_info->band == IEEE80211_BAND_2GHZ) &&
-+ !(rate->flags & IEEE80211_RATE_ERP_G))
-+ phy = WLAN_RC_PHY_CCK;
-+ else
-+ phy = WLAN_RC_PHY_OFDM;
-+
-+ rate = &sc->sbands[tx_info->band].bitrates[rates[i].idx];
-+ info->rates[i].Rate = rate->hw_value;
-+ if (rate->hw_value_short) {
-+ if (rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
-+ info->rates[i].Rate |= rate->hw_value_short;
-+ } else {
-+ is_sp = false;
-+ }
-+
-+ if (bf->bf_state.bfs_paprd)
-+ info->rates[i].ChSel = ah->txchainmask;
-+ else
-+ info->rates[i].ChSel = ath_txchainmask_reduction(sc,
-+ ah->txchainmask, info->rates[i].Rate);
-+
-+ info->rates[i].PktDuration = ath9k_hw_computetxtime(sc->sc_ah,
-+ phy, rate->bitrate * 100, len, rix, is_sp);
-+ }
-+
-+ /* For AR5416 - RTS cannot be followed by a frame larger than 8K */
-+ if (bf_isaggr(bf) && (len > sc->sc_ah->caps.rts_aggr_limit))
-+ info->flags &= ~ATH9K_TXDESC_RTSENA;
-+
-+ /* ATH9K_TXDESC_RTSENA and ATH9K_TXDESC_CTSENA are mutually exclusive. */
-+ if (info->flags & ATH9K_TXDESC_RTSENA)
-+ info->flags &= ~ATH9K_TXDESC_CTSENA;
-+}
-+
-+static enum ath9k_pkt_type get_hw_packet_type(struct sk_buff *skb)
-+{
-+ struct ieee80211_hdr *hdr;
-+ enum ath9k_pkt_type htype;
-+ __le16 fc;
-+
-+ hdr = (struct ieee80211_hdr *)skb->data;
-+ fc = hdr->frame_control;
-+
-+ if (ieee80211_is_beacon(fc))
-+ htype = ATH9K_PKT_TYPE_BEACON;
-+ else if (ieee80211_is_probe_resp(fc))
-+ htype = ATH9K_PKT_TYPE_PROBE_RESP;
-+ else if (ieee80211_is_atim(fc))
-+ htype = ATH9K_PKT_TYPE_ATIM;
-+ else if (ieee80211_is_pspoll(fc))
-+ htype = ATH9K_PKT_TYPE_PSPOLL;
-+ else
-+ htype = ATH9K_PKT_TYPE_NORMAL;
-+
-+ return htype;
-+}
-+
-+static void ath_tx_fill_desc(struct ath_softc *sc, struct ath_buf *bf,
-+ struct ath_txq *txq, int len)
-+{
-+ struct ath_hw *ah = sc->sc_ah;
-+ struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(bf->bf_mpdu);
-+ struct ath_buf *bf_first = bf;
-+ struct ath_tx_info info;
-+ bool aggr = !!(bf->bf_state.bf_type & BUF_AGGR);
-+
-+ memset(&info, 0, sizeof(info));
-+ info.is_first = true;
-+ info.is_last = true;
-+ info.txpower = MAX_RATE_POWER;
-+ info.qcu = txq->axq_qnum;
-+
-+ info.flags = ATH9K_TXDESC_INTREQ;
-+ if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK)
-+ info.flags |= ATH9K_TXDESC_NOACK;
-+ if (tx_info->flags & IEEE80211_TX_CTL_LDPC)
-+ info.flags |= ATH9K_TXDESC_LDPC;
-+
-+ ath_buf_set_rate(sc, bf, &info, len);
-+
-+ if (tx_info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT)
-+ info.flags |= ATH9K_TXDESC_CLRDMASK;
-+
-+ if (bf->bf_state.bfs_paprd)
-+ info.flags |= (u32) bf->bf_state.bfs_paprd << ATH9K_TXDESC_PAPRD_S;
-+
-+
-+ while (bf) {
-+ struct sk_buff *skb = bf->bf_mpdu;
-+ struct ath_frame_info *fi = get_frame_info(skb);
-+ struct ieee80211_hdr *hdr;
-+ int padpos, padsize;
-+
-+ info.type = get_hw_packet_type(skb);
-+ if (bf->bf_next)
-+ info.link = bf->bf_next->bf_daddr;
-+ else
-+ info.link = 0;
-+
-+ if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
-+ hdr = (struct ieee80211_hdr *)skb->data;
-+ padpos = ath9k_cmn_padpos(hdr->frame_control);
-+ padsize = padpos & 3;
-+
-+ info.buf_addr[0] = bf->bf_buf_addr;
-+ info.buf_len[0] = padpos + padsize;
-+ info.buf_addr[1] = info.buf_addr[0] + padpos;
-+ info.buf_len[1] = skb->len - padpos;
-+ } else {
-+ info.buf_addr[0] = bf->bf_buf_addr;
-+ info.buf_len[0] = skb->len;
-+ }
-+
-+ info.pkt_len = fi->framelen;
-+ info.keyix = fi->keyix;
-+ info.keytype = fi->keytype;
-+
-+ if (aggr) {
-+ if (bf == bf_first)
-+ info.aggr = AGGR_BUF_FIRST;
-+ else if (!bf->bf_next)
-+ info.aggr = AGGR_BUF_LAST;
-+ else
-+ info.aggr = AGGR_BUF_MIDDLE;
-+
-+ info.ndelim = bf->bf_state.ndelim;
-+ info.aggr_len = len;
-+ }
-+
-+ ath9k_hw_set_txdesc(ah, bf->bf_desc, &info);
-+ bf = bf->bf_next;
-+ }
-+}
-+
- static void ath_tx_sched_aggr(struct ath_softc *sc, struct ath_txq *txq,
- struct ath_atx_tid *tid)
- {
- struct ath_buf *bf;
- enum ATH_AGGR_STATUS status;
-- struct ath_frame_info *fi;
-+ struct ieee80211_tx_info *tx_info;
- struct list_head bf_q;
- int aggr_len;
-
-@@ -878,34 +1090,25 @@ static void ath_tx_sched_aggr(struct ath
-
- bf = list_first_entry(&bf_q, struct ath_buf, list);
- bf->bf_lastbf = list_entry(bf_q.prev, struct ath_buf, list);
-+ tx_info = IEEE80211_SKB_CB(bf->bf_mpdu);
-
- if (tid->ac->clear_ps_filter) {
- tid->ac->clear_ps_filter = false;
-- ath9k_hw_set_clrdmask(sc->sc_ah, bf->bf_desc, true);
-+ tx_info->flags |= IEEE80211_TX_CTL_CLEAR_PS_FILT;
-+ } else {
-+ tx_info->flags &= ~IEEE80211_TX_CTL_CLEAR_PS_FILT;
- }
-
- /* if only one frame, send as non-aggregate */
- if (bf == bf->bf_lastbf) {
-- fi = get_frame_info(bf->bf_mpdu);
--
-- bf->bf_state.bf_type &= ~BUF_AGGR;
-- ath9k_hw_clr11n_aggr(sc->sc_ah, bf->bf_desc);
-- ath_buf_set_rate(sc, bf, fi->framelen);
-- ath_tx_txqaddbuf(sc, txq, &bf_q, false);
-- continue;
-+ aggr_len = get_frame_info(bf->bf_mpdu)->framelen;
-+ bf->bf_state.bf_type = BUF_AMPDU;
-+ } else {
-+ TX_STAT_INC(txq->axq_qnum, a_aggr);
- }
++ spin_lock_bh(&sc->tx.txq[i].axq_lock);
++ ath_txq_schedule(sc, &sc->tx.txq[i]);
++ spin_unlock_bh(&sc->tx.txq[i].axq_lock);
+ }
-- /* setup first desc of aggregate */
-- bf->bf_state.bf_type |= BUF_AGGR;
-- ath_buf_set_rate(sc, bf, aggr_len);
-- ath9k_hw_set11n_aggr_first(sc->sc_ah, bf->bf_desc, aggr_len);
--
-- /* anchor last desc of aggregate */
-- ath9k_hw_set11n_aggr_last(sc->sc_ah, bf->bf_lastbf->bf_desc);
--
-+ ath_tx_fill_desc(sc, bf, txq, aggr_len);
- ath_tx_txqaddbuf(sc, txq, &bf_q, false);
-- TX_STAT_INC(txq->axq_qnum, a_aggr);
--
- } while (txq->axq_ampdu_depth < ATH_AGGR_MIN_QDEPTH &&
- status != ATH_AGGR_BAW_CLOSED);
- }
-@@ -1483,7 +1686,7 @@ static void ath_tx_send_ampdu(struct ath
- if (!bf)
- return;
+ ath9k_ps_restore(sc);
+@@ -586,7 +576,7 @@ void ath_reset_work(struct work_struct *
+ {
+ struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
-- bf->bf_state.bf_type |= BUF_AMPDU;
-+ bf->bf_state.bf_type = BUF_AMPDU;
- INIT_LIST_HEAD(&bf_head);
- list_add(&bf->list, &bf_head);
-
-@@ -1493,7 +1696,7 @@ static void ath_tx_send_ampdu(struct ath
- /* Queue to h/w without aggregation */
- TX_STAT_INC(txctl->txq->axq_qnum, a_queued_hw);
- bf->bf_lastbf = bf;
-- ath_buf_set_rate(sc, bf, fi->framelen);
-+ ath_tx_fill_desc(sc, bf, txctl->txq, fi->framelen);
- ath_tx_txqaddbuf(sc, txctl->txq, &bf_head, false);
+- ath_reset(sc, true);
++ ath_reset(sc);
}
-@@ -1513,41 +1716,18 @@ static void ath_tx_send_normal(struct at
-
- INIT_LIST_HEAD(&bf_head);
- list_add_tail(&bf->list, &bf_head);
-- bf->bf_state.bf_type &= ~BUF_AMPDU;
-+ bf->bf_state.bf_type = 0;
+ /**********************/
+@@ -804,7 +794,7 @@ static void ath9k_stop(struct ieee80211_
+ ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
+ }
- /* update starting sequence number for subsequent ADDBA request */
- if (tid)
- INCR(tid->seq_start, IEEE80211_SEQ_MAX);
+- ath_prepare_reset(sc, false, true);
++ ath_prepare_reset(sc);
- bf->bf_lastbf = bf;
-- ath_buf_set_rate(sc, bf, fi->framelen);
-+ ath_tx_fill_desc(sc, bf, txq, fi->framelen);
- ath_tx_txqaddbuf(sc, txq, &bf_head, false);
- TX_STAT_INC(txq->axq_qnum, queued);
- }
+ if (sc->rx.frag) {
+ dev_kfree_skb_any(sc->rx.frag);
+@@ -1731,11 +1721,11 @@ static void ath9k_flush(struct ieee80211
+ if (drop) {
+ ath9k_ps_wakeup(sc);
+ spin_lock_bh(&sc->sc_pcu_lock);
+- drain_txq = ath_drain_all_txq(sc, false);
++ drain_txq = ath_drain_all_txq(sc);
+ spin_unlock_bh(&sc->sc_pcu_lock);
--static enum ath9k_pkt_type get_hw_packet_type(struct sk_buff *skb)
--{
-- struct ieee80211_hdr *hdr;
-- enum ath9k_pkt_type htype;
-- __le16 fc;
--
-- hdr = (struct ieee80211_hdr *)skb->data;
-- fc = hdr->frame_control;
--
-- if (ieee80211_is_beacon(fc))
-- htype = ATH9K_PKT_TYPE_BEACON;
-- else if (ieee80211_is_probe_resp(fc))
-- htype = ATH9K_PKT_TYPE_PROBE_RESP;
-- else if (ieee80211_is_atim(fc))
-- htype = ATH9K_PKT_TYPE_ATIM;
-- else if (ieee80211_is_pspoll(fc))
-- htype = ATH9K_PKT_TYPE_PSPOLL;
-- else
-- htype = ATH9K_PKT_TYPE_NORMAL;
--
-- return htype;
--}
--
- static void setup_frame_info(struct ieee80211_hw *hw, struct sk_buff *skb,
- int framelen)
- {
-@@ -1575,51 +1755,6 @@ static void setup_frame_info(struct ieee
- fi->framelen = framelen;
- }
+ if (!drain_txq)
+- ath_reset(sc, false);
++ ath_reset(sc);
--static int setup_tx_flags(struct sk_buff *skb)
--{
-- struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
-- int flags = 0;
--
-- flags |= ATH9K_TXDESC_INTREQ;
--
-- if (tx_info->flags & IEEE80211_TX_CTL_NO_ACK)
-- flags |= ATH9K_TXDESC_NOACK;
--
-- if (tx_info->flags & IEEE80211_TX_CTL_LDPC)
-- flags |= ATH9K_TXDESC_LDPC;
--
-- return flags;
--}
--
--/*
-- * rix - rate index
-- * pktlen - total bytes (delims + data + fcs + pads + pad delims)
-- * width - 0 for 20 MHz, 1 for 40 MHz
-- * half_gi - to use 4us v/s 3.6 us for symbol time
-- */
--static u32 ath_pkt_duration(struct ath_softc *sc, u8 rix, int pktlen,
-- int width, int half_gi, bool shortPreamble)
--{
-- u32 nbits, nsymbits, duration, nsymbols;
-- int streams;
--
-- /* find number of symbols: PLCP + data */
-- streams = HT_RC_2_STREAMS(rix);
-- nbits = (pktlen << 3) + OFDM_PLCP_BITS;
-- nsymbits = bits_per_symbol[rix % 8][width] * streams;
-- nsymbols = (nbits + nsymbits - 1) / nsymbits;
--
-- if (!half_gi)
-- duration = SYMBOL_TIME(nsymbols);
-- else
-- duration = SYMBOL_TIME_HALFGI(nsymbols);
+ ath9k_ps_restore(sc);
+ ieee80211_wake_queues(hw);
+@@ -1835,6 +1825,9 @@ static u32 fill_chainmask(u32 cap, u32 n
+
+ static bool validate_antenna_mask(struct ath_hw *ah, u32 val)
+ {
++ if (AR_SREV_9300_20_OR_LATER(ah))
++ return true;
++
+ switch (val & 0x7) {
+ case 0x1:
+ case 0x3:
+--- a/drivers/net/wireless/ath/ath9k/recv.c
++++ b/drivers/net/wireless/ath/ath9k/recv.c
+@@ -248,8 +248,6 @@ rx_init_fail:
+
+ static void ath_edma_start_recv(struct ath_softc *sc)
+ {
+- spin_lock_bh(&sc->rx.rxbuflock);
-
-- /* addup duration for legacy/ht training and signal fields */
-- duration += L_STF + L_LTF + L_SIG + HT_SIG + HT_STF + HT_LTF(streams);
+ ath9k_hw_rxena(sc->sc_ah);
+
+ ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
+@@ -261,8 +259,6 @@ static void ath_edma_start_recv(struct a
+ ath_opmode_init(sc);
+
+ ath9k_hw_startpcureceive(sc->sc_ah, !!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL));
-
-- return duration;
--}
+- spin_unlock_bh(&sc->rx.rxbuflock);
+ }
+
+ static void ath_edma_stop_recv(struct ath_softc *sc)
+@@ -279,8 +275,6 @@ int ath_rx_init(struct ath_softc *sc, in
+ int error = 0;
+
+ spin_lock_init(&sc->sc_pcu_lock);
+- spin_lock_init(&sc->rx.rxbuflock);
+- clear_bit(SC_OP_RXFLUSH, &sc->sc_flags);
+
+ common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
+ sc->sc_ah->caps.rx_status_len;
+@@ -438,7 +432,6 @@ int ath_startrecv(struct ath_softc *sc)
+ return 0;
+ }
+
+- spin_lock_bh(&sc->rx.rxbuflock);
+ if (list_empty(&sc->rx.rxbuf))
+ goto start_recv;
+
+@@ -459,26 +452,31 @@ start_recv:
+ ath_opmode_init(sc);
+ ath9k_hw_startpcureceive(ah, !!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL));
+
+- spin_unlock_bh(&sc->rx.rxbuflock);
-
- u8 ath_txchainmask_reduction(struct ath_softc *sc, u8 chainmask, u32 rate)
+ return 0;
+ }
+
++static void ath_flushrecv(struct ath_softc *sc)
++{
++ if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
++ ath_rx_tasklet(sc, 1, true);
++ ath_rx_tasklet(sc, 1, false);
++}
++
+ bool ath_stoprecv(struct ath_softc *sc)
{
struct ath_hw *ah = sc->sc_ah;
-@@ -1632,118 +1767,6 @@ u8 ath_txchainmask_reduction(struct ath_
- return chainmask;
+ bool stopped, reset = false;
+
+- spin_lock_bh(&sc->rx.rxbuflock);
+ ath9k_hw_abortpcurecv(ah);
+ ath9k_hw_setrxfilter(ah, 0);
+ stopped = ath9k_hw_stopdmarecv(ah, &reset);
+
++ ath_flushrecv(sc);
++
+ if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
+ ath_edma_stop_recv(sc);
+ else
+ sc->rx.rxlink = NULL;
+- spin_unlock_bh(&sc->rx.rxbuflock);
+
+ if (!(ah->ah_flags & AH_UNPLUGGED) &&
+ unlikely(!stopped)) {
+@@ -490,15 +488,6 @@ bool ath_stoprecv(struct ath_softc *sc)
+ return stopped && !reset;
}
--static void ath_buf_set_rate(struct ath_softc *sc, struct ath_buf *bf, int len)
+-void ath_flushrecv(struct ath_softc *sc)
-{
-- struct ath_hw *ah = sc->sc_ah;
-- struct ath9k_11n_rate_series series[4];
-- struct sk_buff *skb;
-- struct ieee80211_tx_info *tx_info;
-- struct ieee80211_tx_rate *rates;
-- const struct ieee80211_rate *rate;
-- struct ieee80211_hdr *hdr;
-- int i, flags = 0;
-- u8 rix = 0, ctsrate = 0;
-- bool is_pspoll;
--
-- memset(series, 0, sizeof(struct ath9k_11n_rate_series) * 4);
--
-- skb = bf->bf_mpdu;
-- tx_info = IEEE80211_SKB_CB(skb);
-- rates = tx_info->control.rates;
-- hdr = (struct ieee80211_hdr *)skb->data;
-- is_pspoll = ieee80211_is_pspoll(hdr->frame_control);
--
-- /*
-- * We check if Short Preamble is needed for the CTS rate by
-- * checking the BSS's global flag.
-- * But for the rate series, IEEE80211_TX_RC_USE_SHORT_PREAMBLE is used.
-- */
-- rate = ieee80211_get_rts_cts_rate(sc->hw, tx_info);
-- ctsrate = rate->hw_value;
-- if (sc->sc_flags & SC_OP_PREAMBLE_SHORT)
-- ctsrate |= rate->hw_value_short;
--
-- for (i = 0; i < 4; i++) {
-- bool is_40, is_sgi, is_sp;
-- int phy;
--
-- if (!rates[i].count || (rates[i].idx < 0))
-- continue;
--
-- rix = rates[i].idx;
-- series[i].Tries = rates[i].count;
--
-- if (rates[i].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
-- series[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
-- flags |= ATH9K_TXDESC_RTSENA;
-- } else if (rates[i].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
-- series[i].RateFlags |= ATH9K_RATESERIES_RTS_CTS;
-- flags |= ATH9K_TXDESC_CTSENA;
-- }
--
-- if (rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH)
-- series[i].RateFlags |= ATH9K_RATESERIES_2040;
-- if (rates[i].flags & IEEE80211_TX_RC_SHORT_GI)
-- series[i].RateFlags |= ATH9K_RATESERIES_HALFGI;
--
-- is_sgi = !!(rates[i].flags & IEEE80211_TX_RC_SHORT_GI);
-- is_40 = !!(rates[i].flags & IEEE80211_TX_RC_40_MHZ_WIDTH);
-- is_sp = !!(rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE);
--
-- if (rates[i].flags & IEEE80211_TX_RC_MCS) {
-- /* MCS rates */
-- series[i].Rate = rix | 0x80;
-- series[i].ChSel = ath_txchainmask_reduction(sc,
-- ah->txchainmask, series[i].Rate);
-- series[i].PktDuration = ath_pkt_duration(sc, rix, len,
-- is_40, is_sgi, is_sp);
-- if (rix < 8 && (tx_info->flags & IEEE80211_TX_CTL_STBC))
-- series[i].RateFlags |= ATH9K_RATESERIES_STBC;
-- continue;
-- }
--
-- /* legacy rates */
-- if ((tx_info->band == IEEE80211_BAND_2GHZ) &&
-- !(rate->flags & IEEE80211_RATE_ERP_G))
-- phy = WLAN_RC_PHY_CCK;
-- else
-- phy = WLAN_RC_PHY_OFDM;
--
-- rate = &sc->sbands[tx_info->band].bitrates[rates[i].idx];
-- series[i].Rate = rate->hw_value;
-- if (rate->hw_value_short) {
-- if (rates[i].flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
-- series[i].Rate |= rate->hw_value_short;
-- } else {
-- is_sp = false;
-- }
--
-- if (bf->bf_state.bfs_paprd)
-- series[i].ChSel = ah->txchainmask;
-- else
-- series[i].ChSel = ath_txchainmask_reduction(sc,
-- ah->txchainmask, series[i].Rate);
--
-- series[i].PktDuration = ath9k_hw_computetxtime(sc->sc_ah,
-- phy, rate->bitrate * 100, len, rix, is_sp);
-- }
--
-- /* For AR5416 - RTS cannot be followed by a frame larger than 8K */
-- if (bf_isaggr(bf) && (len > sc->sc_ah->caps.rts_aggr_limit))
-- flags &= ~ATH9K_TXDESC_RTSENA;
--
-- /* ATH9K_TXDESC_RTSENA and ATH9K_TXDESC_CTSENA are mutually exclusive. */
-- if (flags & ATH9K_TXDESC_RTSENA)
-- flags &= ~ATH9K_TXDESC_CTSENA;
--
-- /* set dur_update_en for l-sig computation except for PS-Poll frames */
-- ath9k_hw_set11n_ratescenario(sc->sc_ah, bf->bf_desc,
-- bf->bf_lastbf->bf_desc,
-- !is_pspoll, ctsrate,
-- 0, series, 4, flags);
--
+- set_bit(SC_OP_RXFLUSH, &sc->sc_flags);
+- if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
+- ath_rx_tasklet(sc, 1, true);
+- ath_rx_tasklet(sc, 1, false);
+- clear_bit(SC_OP_RXFLUSH, &sc->sc_flags);
-}
-
- /*
- * Assign a descriptor (and sequence number if necessary,
- * and map buffer for DMA. Frees skb on error
-@@ -1753,13 +1776,10 @@ static struct ath_buf *ath_tx_setup_buff
- struct ath_atx_tid *tid,
- struct sk_buff *skb)
+ static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
{
-- struct ath_hw *ah = sc->sc_ah;
- struct ath_common *common = ath9k_hw_common(sc->sc_ah);
- struct ath_frame_info *fi = get_frame_info(skb);
- struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
- struct ath_buf *bf;
-- struct ath_desc *ds;
-- int frm_type;
- u16 seqno;
-
- bf = ath_tx_get_buffer(sc);
-@@ -1777,7 +1797,6 @@ static struct ath_buf *ath_tx_setup_buff
- bf->bf_state.seqno = seqno;
+ /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
+@@ -735,6 +724,7 @@ static struct ath_buf *ath_get_next_rx_b
+ return NULL;
}
-- bf->bf_flags = setup_tx_flags(skb);
- bf->bf_mpdu = skb;
++ list_del(&bf->list);
+ if (!bf->bf_mpdu)
+ return bf;
- bf->bf_buf_addr = dma_map_single(sc->dev, skb->data,
-@@ -1791,22 +1810,6 @@ static struct ath_buf *ath_tx_setup_buff
- goto error;
- }
+@@ -1050,16 +1040,12 @@ int ath_rx_tasklet(struct ath_softc *sc,
+ dma_type = DMA_FROM_DEVICE;
-- frm_type = get_hw_packet_type(skb);
--
-- ds = bf->bf_desc;
-- ath9k_hw_set_desc_link(ah, ds, 0);
--
-- ath9k_hw_set11n_txdesc(ah, ds, fi->framelen, frm_type, MAX_RATE_POWER,
-- fi->keyix, fi->keytype, bf->bf_flags);
--
-- ath9k_hw_filltxdesc(ah, ds,
-- skb->len, /* segment length */
-- true, /* first segment */
-- true, /* last segment */
-- ds, /* first descriptor */
-- bf->bf_buf_addr,
-- txq->axq_qnum);
--
- fi->bf = bf;
+ qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
+- spin_lock_bh(&sc->rx.rxbuflock);
- return bf;
-@@ -1849,16 +1852,9 @@ static void ath_tx_start_dma(struct ath_
+ tsf = ath9k_hw_gettsf64(ah);
+ tsf_lower = tsf & 0xffffffff;
- bf->bf_state.bfs_paprd = txctl->paprd;
+ do {
+ bool decrypt_error = false;
+- /* If handling rx interrupt and flush is in progress => exit */
+- if (test_bit(SC_OP_RXFLUSH, &sc->sc_flags) && (flush == 0))
+- break;
-- if (bf->bf_state.bfs_paprd)
-- ar9003_hw_set_paprd_txdesc(sc->sc_ah, bf->bf_desc,
-- bf->bf_state.bfs_paprd);
--
- if (txctl->paprd)
- bf->bf_state.bfs_paprd_timestamp = jiffies;
+ memset(&rs, 0, sizeof(rs));
+ if (edma)
+@@ -1102,15 +1088,6 @@ int ath_rx_tasklet(struct ath_softc *sc,
+
+ ath_debug_stat_rx(sc, &rs);
-- if (tx_info->flags & IEEE80211_TX_CTL_CLEAR_PS_FILT)
-- ath9k_hw_set_clrdmask(sc->sc_ah, bf->bf_desc, true);
+- /*
+- * If we're asked to flush receive queue, directly
+- * chain it back at the queue without processing it.
+- */
+- if (test_bit(SC_OP_RXFLUSH, &sc->sc_flags)) {
+- RX_STAT_INC(rx_drop_rxflush);
+- goto requeue_drop_frag;
+- }
-
- ath_tx_send_normal(sc, txctl->txq, tid, skb);
- }
+ memset(rxs, 0, sizeof(struct ieee80211_rx_status));
-@@ -1899,15 +1895,18 @@ int ath_tx_start(struct ieee80211_hw *hw
- hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
- }
+ rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
+@@ -1245,19 +1222,18 @@ requeue_drop_frag:
+ sc->rx.frag = NULL;
+ }
+ requeue:
++ list_add_tail(&bf->list, &sc->rx.rxbuf);
++ if (flush)
++ continue;
++
+ if (edma) {
+- list_add_tail(&bf->list, &sc->rx.rxbuf);
+ ath_rx_edma_buf_link(sc, qtype);
+ } else {
+- list_move_tail(&bf->list, &sc->rx.rxbuf);
+ ath_rx_buf_link(sc, bf);
+- if (!flush)
+- ath9k_hw_rxena(ah);
++ ath9k_hw_rxena(ah);
+ }
+ } while (1);
-- /* Add the padding after the header if this is not already done */
-- padpos = ath9k_cmn_padpos(hdr->frame_control);
-- padsize = padpos & 3;
-- if (padsize && skb->len > padpos) {
-- if (skb_headroom(skb) < padsize)
-- return -ENOMEM;
+- spin_unlock_bh(&sc->rx.rxbuflock);
-
-- skb_push(skb, padsize);
-- memmove(skb->data, skb->data + padsize, padpos);
-+ if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)) {
-+ /* Add the padding after the header if this is not already done */
-+ padpos = ath9k_cmn_padpos(hdr->frame_control);
-+ padsize = padpos & 3;
-+ if (padsize && skb->len > padpos) {
-+ if (skb_headroom(skb) < padsize)
-+ return -ENOMEM;
+ if (!(ah->imask & ATH9K_INT_RXEOL)) {
+ ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
+ ath9k_hw_set_interrupts(ah);
+--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
+@@ -4586,14 +4586,14 @@ static int ar9003_hw_cal_pier_get(struct
+ return 0;
+ }
+
+-static int ar9003_hw_power_control_override(struct ath_hw *ah,
+- int frequency,
+- int *correction,
+- int *voltage, int *temperature)
++static void ar9003_hw_power_control_override(struct ath_hw *ah,
++ int frequency,
++ int *correction,
++ int *voltage, int *temperature)
+ {
+- int tempSlope = 0;
++ int temp_slope = 0, temp_slope1 = 0, temp_slope2 = 0;
+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
+- int f[8], t[8], i;
++ int f[8], t[8], t1[3], t2[3], i;
+
+ REG_RMW(ah, AR_PHY_TPC_11_B0,
+ (correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S),
+@@ -4624,38 +4624,108 @@ static int ar9003_hw_power_control_overr
+ * enable temperature compensation
+ * Need to use register names
+ */
+- if (frequency < 4000)
+- tempSlope = eep->modalHeader2G.tempSlope;
+- else if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {
+- for (i = 0; i < 8; i++) {
+- t[i] = eep->base_ext1.tempslopextension[i];
+- f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0);
+- }
+- tempSlope = ar9003_hw_power_interpolate((s32) frequency,
+- f, t, 8);
+- } else if (eep->base_ext2.tempSlopeLow != 0) {
+- t[0] = eep->base_ext2.tempSlopeLow;
+- f[0] = 5180;
+- t[1] = eep->modalHeader5G.tempSlope;
+- f[1] = 5500;
+- t[2] = eep->base_ext2.tempSlopeHigh;
+- f[2] = 5785;
+- tempSlope = ar9003_hw_power_interpolate((s32) frequency,
+- f, t, 3);
+- } else
+- tempSlope = eep->modalHeader5G.tempSlope;
++ if (frequency < 4000) {
++ temp_slope = eep->modalHeader2G.tempSlope;
++ } else {
++ if (AR_SREV_9550(ah)) {
++ t[0] = eep->base_ext1.tempslopextension[2];
++ t1[0] = eep->base_ext1.tempslopextension[3];
++ t2[0] = eep->base_ext1.tempslopextension[4];
++ f[0] = 5180;
++
++ t[1] = eep->modalHeader5G.tempSlope;
++ t1[1] = eep->base_ext1.tempslopextension[0];
++ t2[1] = eep->base_ext1.tempslopextension[1];
++ f[1] = 5500;
++
++ t[2] = eep->base_ext1.tempslopextension[5];
++ t1[2] = eep->base_ext1.tempslopextension[6];
++ t2[2] = eep->base_ext1.tempslopextension[7];
++ f[2] = 5785;
++
++ temp_slope = ar9003_hw_power_interpolate(frequency,
++ f, t, 3);
++ temp_slope1 = ar9003_hw_power_interpolate(frequency,
++ f, t1, 3);
++ temp_slope2 = ar9003_hw_power_interpolate(frequency,
++ f, t2, 3);
++
++ goto tempslope;
++ }
+
-+ skb_push(skb, padsize);
-+ memmove(skb->data, skb->data + padsize, padpos);
-+ hdr = (struct ieee80211_hdr *) skb->data;
++ if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {
++ for (i = 0; i < 8; i++) {
++ t[i] = eep->base_ext1.tempslopextension[i];
++ f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0);
++ }
++ temp_slope = ar9003_hw_power_interpolate((s32) frequency,
++ f, t, 8);
++ } else if (eep->base_ext2.tempSlopeLow != 0) {
++ t[0] = eep->base_ext2.tempSlopeLow;
++ f[0] = 5180;
++ t[1] = eep->modalHeader5G.tempSlope;
++ f[1] = 5500;
++ t[2] = eep->base_ext2.tempSlopeHigh;
++ f[2] = 5785;
++ temp_slope = ar9003_hw_power_interpolate((s32) frequency,
++ f, t, 3);
++ } else {
++ temp_slope = eep->modalHeader5G.tempSlope;
+ }
- }
-
- if ((vif && vif->type != NL80211_IFTYPE_AP &&
-@@ -1953,20 +1952,21 @@ static void ath_tx_complete(struct ath_s
- if (tx_flags & ATH_TX_BAR)
- tx_info->flags |= IEEE80211_TX_STAT_AMPDU_NO_BACK;
-
-- if (!(tx_flags & (ATH_TX_ERROR | ATH_TX_XRETRY))) {
-+ if (!(tx_flags & ATH_TX_ERROR))
- /* Frame was ACKed */
- tx_info->flags |= IEEE80211_TX_STAT_ACK;
-- }
++ }
-- padpos = ath9k_cmn_padpos(hdr->frame_control);
-- padsize = padpos & 3;
-- if (padsize && skb->len>padpos+padsize) {
-- /*
-- * Remove MAC header padding before giving the frame back to
-- * mac80211.
-- */
-- memmove(skb->data + padsize, skb->data, padpos);
-- skb_pull(skb, padsize);
-+ if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)) {
-+ padpos = ath9k_cmn_padpos(hdr->frame_control);
-+ padsize = padpos & 3;
-+ if (padsize && skb->len>padpos+padsize) {
+- REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope);
++tempslope:
++ if (AR_SREV_9550(ah)) {
++ /*
++ * AR955x has tempSlope register for each chain.
++ * Check whether temp_compensation feature is enabled or not.
++ */
++ if (eep->baseEepHeader.featureEnable & 0x1) {
++ if (frequency < 4000) {
++ REG_RMW_FIELD(ah, AR_PHY_TPC_19,
++ AR_PHY_TPC_19_ALPHA_THERM,
++ eep->base_ext2.tempSlopeLow);
++ REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
++ AR_PHY_TPC_19_ALPHA_THERM,
++ temp_slope);
++ REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
++ AR_PHY_TPC_19_ALPHA_THERM,
++ eep->base_ext2.tempSlopeHigh);
++ } else {
++ REG_RMW_FIELD(ah, AR_PHY_TPC_19,
++ AR_PHY_TPC_19_ALPHA_THERM,
++ temp_slope);
++ REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
++ AR_PHY_TPC_19_ALPHA_THERM,
++ temp_slope1);
++ REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
++ AR_PHY_TPC_19_ALPHA_THERM,
++ temp_slope2);
++ }
++ } else {
+ /*
-+ * Remove MAC header padding before giving the frame back to
-+ * mac80211.
++ * If temp compensation is not enabled,
++ * set all registers to 0.
+ */
-+ memmove(skb->data + padsize, skb->data, padpos);
-+ skb_pull(skb, padsize);
++ REG_RMW_FIELD(ah, AR_PHY_TPC_19,
++ AR_PHY_TPC_19_ALPHA_THERM, 0);
++ REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
++ AR_PHY_TPC_19_ALPHA_THERM, 0);
++ REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
++ AR_PHY_TPC_19_ALPHA_THERM, 0);
+ }
- }
++ } else {
++ REG_RMW_FIELD(ah, AR_PHY_TPC_19,
++ AR_PHY_TPC_19_ALPHA_THERM, temp_slope);
++ }
- if (sc->ps_flags & PS_WAIT_FOR_TX_ACK) {
-@@ -2000,18 +2000,18 @@ static void ath_tx_complete_buf(struct a
- struct ath_tx_status *ts, int txok, int sendbar)
- {
- struct sk_buff *skb = bf->bf_mpdu;
-+ struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
- unsigned long flags;
- int tx_flags = 0;
+ if (AR_SREV_9462_20(ah))
+ REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
+- AR_PHY_TPC_19_B1_ALPHA_THERM, tempSlope);
++ AR_PHY_TPC_19_B1_ALPHA_THERM, temp_slope);
- if (sendbar)
- tx_flags = ATH_TX_BAR;
-- if (!txok) {
-+ if (!txok)
- tx_flags |= ATH_TX_ERROR;
+ REG_RMW_FIELD(ah, AR_PHY_TPC_18, AR_PHY_TPC_18_THERM_CAL_VALUE,
+ temperature[0]);
+-
+- return 0;
+ }
-- if (bf_isxretried(bf))
-- tx_flags |= ATH_TX_XRETRY;
-- }
-+ if (ts->ts_status & ATH9K_TXERR_FILT)
-+ tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
-
- dma_unmap_single(sc->dev, bf->bf_buf_addr, skb->len, DMA_TO_DEVICE);
- bf->bf_buf_addr = 0;
-@@ -2024,7 +2024,7 @@ static void ath_tx_complete_buf(struct a
- else
- complete(&sc->paprd_complete);
+ /* Apply the recorded correction values. */
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
+@@ -68,7 +68,7 @@ static const int m2ThreshExt_off = 127;
+ static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
+ {
+ u16 bMode, fracMode = 0, aModeRefSel = 0;
+- u32 freq, channelSel = 0, reg32 = 0;
++ u32 freq, chan_frac, div, channelSel = 0, reg32 = 0;
+ struct chan_centers centers;
+ int loadSynthChannel;
+
+@@ -77,9 +77,6 @@ static int ar9003_hw_set_channel(struct
+
+ if (freq < 4800) { /* 2 GHz, fractional mode */
+ if (AR_SREV_9330(ah)) {
+- u32 chan_frac;
+- u32 div;
+-
+ if (ah->is_clk_25mhz)
+ div = 75;
+ else
+@@ -89,34 +86,40 @@ static int ar9003_hw_set_channel(struct
+ chan_frac = (((freq * 4) % div) * 0x20000) / div;
+ channelSel = (channelSel << 17) | chan_frac;
+ } else if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
+- u32 chan_frac;
+-
+ /*
+- * freq_ref = 40 / (refdiva >> amoderefsel); where refdiva=1 and amoderefsel=0
++ * freq_ref = 40 / (refdiva >> amoderefsel);
++ * where refdiva=1 and amoderefsel=0
+ * ndiv = ((chan_mhz * 4) / 3) / freq_ref;
+ * chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000
+ */
+ channelSel = (freq * 4) / 120;
+ chan_frac = (((freq * 4) % 120) * 0x20000) / 120;
+ channelSel = (channelSel << 17) | chan_frac;
+- } else if (AR_SREV_9340(ah) || AR_SREV_9550(ah)) {
++ } else if (AR_SREV_9340(ah)) {
+ if (ah->is_clk_25mhz) {
+- u32 chan_frac;
+-
+ channelSel = (freq * 2) / 75;
+ chan_frac = (((freq * 2) % 75) * 0x20000) / 75;
+ channelSel = (channelSel << 17) | chan_frac;
+- } else
++ } else {
+ channelSel = CHANSEL_2G(freq) >> 1;
+- } else
++ }
++ } else if (AR_SREV_9550(ah)) {
++ if (ah->is_clk_25mhz)
++ div = 75;
++ else
++ div = 120;
++
++ channelSel = (freq * 4) / div;
++ chan_frac = (((freq * 4) % div) * 0x20000) / div;
++ channelSel = (channelSel << 17) | chan_frac;
++ } else {
+ channelSel = CHANSEL_2G(freq);
++ }
+ /* Set to 2G mode */
+ bMode = 1;
} else {
-- ath_debug_stat_tx(sc, bf, ts, txq);
-+ ath_debug_stat_tx(sc, bf, ts, txq, tx_flags);
- ath_tx_complete(sc, skb, tx_flags, txq);
- }
- /* At this point, skb (bf->bf_mpdu) is consumed...make sure we don't
-@@ -2042,7 +2042,7 @@ static void ath_tx_complete_buf(struct a
+ if ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) &&
+ ah->is_clk_25mhz) {
+- u32 chan_frac;
+-
+ channelSel = freq / 75;
+ chan_frac = ((freq % 75) * 0x20000) / 75;
+ channelSel = (channelSel << 17) | chan_frac;
+@@ -586,32 +589,19 @@ static void ar9003_hw_init_bb(struct ath
+ ath9k_hw_synth_delay(ah, chan, synthDelay);
+ }
- static void ath_tx_rc_status(struct ath_softc *sc, struct ath_buf *bf,
- struct ath_tx_status *ts, int nframes, int nbad,
-- int txok, bool update_rc)
-+ int txok)
+-static void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx)
++void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx)
{
- struct sk_buff *skb = bf->bf_mpdu;
- struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
-@@ -2057,9 +2057,7 @@ static void ath_tx_rc_status(struct ath_
- tx_rateindex = ts->ts_rateindex;
- WARN_ON(tx_rateindex >= hw->max_rates);
-
-- if (ts->ts_status & ATH9K_TXERR_FILT)
-- tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED;
-- if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && update_rc) {
-+ if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
- tx_info->flags |= IEEE80211_TX_STAT_AMPDU;
-
- BUG_ON(nbad > nframes);
-@@ -2069,7 +2067,7 @@ static void ath_tx_rc_status(struct ath_
+- switch (rx) {
+- case 0x5:
++ if (ah->caps.tx_chainmask == 5 || ah->caps.rx_chainmask == 5)
+ REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
+ AR_PHY_SWAP_ALT_CHAIN);
+- case 0x3:
+- case 0x1:
+- case 0x2:
+- case 0x7:
+- REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx);
+- REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx);
+- break;
+- default:
+- break;
+- }
++
++ REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx);
++ REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx);
+
+ if ((ah->caps.hw_caps & ATH9K_HW_CAP_APM) && (tx == 0x7))
+- REG_WRITE(ah, AR_SELFGEN_MASK, 0x3);
+- else
+- REG_WRITE(ah, AR_SELFGEN_MASK, tx);
++ tx = 3;
+
+- if (tx == 0x5) {
+- REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP,
+- AR_PHY_SWAP_ALT_CHAIN);
+- }
++ REG_WRITE(ah, AR_SELFGEN_MASK, tx);
+ }
+
+ /*
+--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
+@@ -1028,7 +1028,7 @@
+ #define AR_PHY_TPC_5_B2 (AR_SM2_BASE + 0x208)
+ #define AR_PHY_TPC_6_B2 (AR_SM2_BASE + 0x20c)
+ #define AR_PHY_TPC_11_B2 (AR_SM2_BASE + 0x220)
+-#define AR_PHY_PDADC_TAB_2 (AR_SM2_BASE + 0x240)
++#define AR_PHY_TPC_19_B2 (AR_SM2_BASE + 0x240)
+ #define AR_PHY_TX_IQCAL_STATUS_B2 (AR_SM2_BASE + 0x48c)
+ #define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i) (AR_SM2_BASE + 0x450 + ((_i) << 2))
+
+--- a/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
+@@ -23,16 +23,16 @@
+ static const u32 ar955x_1p0_radio_postamble[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x00016098, 0xd2dd5554, 0xd2dd5554, 0xd28b3330, 0xd28b3330},
+- {0x0001609c, 0x0a566f3a, 0x0a566f3a, 0x06345f2a, 0x06345f2a},
+- {0x000160ac, 0xa4647c00, 0xa4647c00, 0xa4646800, 0xa4646800},
+- {0x000160b0, 0x01885f52, 0x01885f52, 0x04accf3a, 0x04accf3a},
+- {0x00016104, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001},
++ {0x0001609c, 0x0a566f3a, 0x0a566f3a, 0x0a566f3a, 0x0a566f3a},
++ {0x000160ac, 0xa4647c00, 0xa4647c00, 0x24647c00, 0x24647c00},
++ {0x000160b0, 0x01885f52, 0x01885f52, 0x01885f52, 0x01885f52},
++ {0x00016104, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
+ {0x0001610c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
+ {0x00016140, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
+- {0x00016504, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001},
++ {0x00016504, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
+ {0x0001650c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
+ {0x00016540, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
+- {0x00016904, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001},
++ {0x00016904, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
+ {0x0001690c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
+ {0x00016940, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
+ };
+@@ -69,15 +69,15 @@ static const u32 ar955x_1p0_baseband_pos
+ {0x0000a204, 0x005c0ec0, 0x005c0ec4, 0x005c0ec4, 0x005c0ec0},
+ {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
+ {0x0000a22c, 0x07e26a2f, 0x07e26a2f, 0x01026a2f, 0x01026a2f},
+- {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b},
++ {0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
+ {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
+ {0x0000a238, 0xffb01018, 0xffb01018, 0xffb01018, 0xffb01018},
+ {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
+ {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
+ {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
+- {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
++ {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01010e0e, 0x01010e0e},
+ {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
+- {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
++ {0x0000a264, 0x00000e0e, 0x00000e0e, 0x01000e0e, 0x01000e0e},
+ {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
+ {0x0000a284, 0x00000000, 0x00000000, 0x00000010, 0x00000010},
+ {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
+@@ -125,7 +125,7 @@ static const u32 ar955x_1p0_radio_core[]
+ {0x00016094, 0x00000000},
+ {0x000160a0, 0x0a108ffe},
+ {0x000160a4, 0x812fc370},
+- {0x000160a8, 0x423c8000},
++ {0x000160a8, 0x423c8100},
+ {0x000160b4, 0x92480080},
+ {0x000160c0, 0x006db6d0},
+ {0x000160c4, 0x6db6db60},
+@@ -134,7 +134,7 @@ static const u32 ar955x_1p0_radio_core[]
+ {0x00016100, 0x11999601},
+ {0x00016108, 0x00080010},
+ {0x00016144, 0x02084080},
+- {0x00016148, 0x000080c0},
++ {0x00016148, 0x00008040},
+ {0x00016280, 0x01800804},
+ {0x00016284, 0x00038dc5},
+ {0x00016288, 0x00000000},
+@@ -178,7 +178,7 @@ static const u32 ar955x_1p0_radio_core[]
+ {0x00016500, 0x11999601},
+ {0x00016508, 0x00080010},
+ {0x00016544, 0x02084080},
+- {0x00016548, 0x000080c0},
++ {0x00016548, 0x00008040},
+ {0x00016780, 0x00000000},
+ {0x00016784, 0x00000000},
+ {0x00016788, 0x00400705},
+@@ -218,7 +218,7 @@ static const u32 ar955x_1p0_radio_core[]
+ {0x00016900, 0x11999601},
+ {0x00016908, 0x00080010},
+ {0x00016944, 0x02084080},
+- {0x00016948, 0x000080c0},
++ {0x00016948, 0x00008040},
+ {0x00016b80, 0x00000000},
+ {0x00016b84, 0x00000000},
+ {0x00016b88, 0x00400705},
+@@ -245,9 +245,9 @@ static const u32 ar955x_1p0_radio_core[]
+
+ static const u32 ar955x_1p0_modes_xpa_tx_gain_table[][9] = {
+ /* Addr 5G_HT20_L 5G_HT40_L 5G_HT20_M 5G_HT40_M 5G_HT20_H 5G_HT40_H 2G_HT40 2G_HT20 */
+- {0x0000a2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa},
+- {0x0000a2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc},
+- {0x0000a2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0},
++ {0x0000a2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
++ {0x0000a2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
++ {0x0000a2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
+ {0x0000a2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
+ {0x0000a410, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050da, 0x000050da},
+ {0x0000a500, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000000, 0x00000000},
+@@ -256,63 +256,63 @@ static const u32 ar955x_1p0_modes_xpa_tx
+ {0x0000a50c, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c000006, 0x0c000006},
+ {0x0000a510, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x0f00000a, 0x0f00000a},
+ {0x0000a514, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x1300000c, 0x1300000c},
+- {0x0000a518, 0x19004008, 0x19004008, 0x19004008, 0x19004008, 0x18004008, 0x18004008, 0x1700000e, 0x1700000e},
+- {0x0000a51c, 0x1d00400a, 0x1d00400a, 0x1d00400a, 0x1d00400a, 0x1c00400a, 0x1c00400a, 0x1b000064, 0x1b000064},
+- {0x0000a520, 0x230020a2, 0x230020a2, 0x210020a2, 0x210020a2, 0x200020a2, 0x200020a2, 0x1f000242, 0x1f000242},
+- {0x0000a524, 0x2500006e, 0x2500006e, 0x2500006e, 0x2500006e, 0x2400006e, 0x2400006e, 0x23000229, 0x23000229},
+- {0x0000a528, 0x29022221, 0x29022221, 0x28022221, 0x28022221, 0x27022221, 0x27022221, 0x270002a2, 0x270002a2},
+- {0x0000a52c, 0x2d00062a, 0x2d00062a, 0x2c00062a, 0x2c00062a, 0x2a00062a, 0x2a00062a, 0x2c001203, 0x2c001203},
+- {0x0000a530, 0x340220a5, 0x340220a5, 0x320220a5, 0x320220a5, 0x2f0220a5, 0x2f0220a5, 0x30001803, 0x30001803},
+- {0x0000a534, 0x380022c5, 0x380022c5, 0x350022c5, 0x350022c5, 0x320022c5, 0x320022c5, 0x33000881, 0x33000881},
+- {0x0000a538, 0x3b002486, 0x3b002486, 0x39002486, 0x39002486, 0x36002486, 0x36002486, 0x38001809, 0x38001809},
+- {0x0000a53c, 0x3f00248a, 0x3f00248a, 0x3d00248a, 0x3d00248a, 0x3a00248a, 0x3a00248a, 0x3a000814, 0x3a000814},
+- {0x0000a540, 0x4202242c, 0x4202242c, 0x4102242c, 0x4102242c, 0x3f02242c, 0x3f02242c, 0x3f001a0c, 0x3f001a0c},
+- {0x0000a544, 0x490044c6, 0x490044c6, 0x460044c6, 0x460044c6, 0x420044c6, 0x420044c6, 0x43001a0e, 0x43001a0e},
+- {0x0000a548, 0x4d024485, 0x4d024485, 0x4a024485, 0x4a024485, 0x46024485, 0x46024485, 0x46001812, 0x46001812},
+- {0x0000a54c, 0x51044483, 0x51044483, 0x4e044483, 0x4e044483, 0x4a044483, 0x4a044483, 0x49001884, 0x49001884},
+- {0x0000a550, 0x5404a40c, 0x5404a40c, 0x5204a40c, 0x5204a40c, 0x4d04a40c, 0x4d04a40c, 0x4d001e84, 0x4d001e84},
+- {0x0000a554, 0x57024632, 0x57024632, 0x55024632, 0x55024632, 0x52024632, 0x52024632, 0x50001e69, 0x50001e69},
+- {0x0000a558, 0x5c00a634, 0x5c00a634, 0x5900a634, 0x5900a634, 0x5600a634, 0x5600a634, 0x550006f4, 0x550006f4},
+- {0x0000a55c, 0x5f026832, 0x5f026832, 0x5d026832, 0x5d026832, 0x5a026832, 0x5a026832, 0x59000ad3, 0x59000ad3},
+- {0x0000a560, 0x6602b012, 0x6602b012, 0x6202b012, 0x6202b012, 0x5d02b012, 0x5d02b012, 0x5e000ad5, 0x5e000ad5},
+- {0x0000a564, 0x6e02d0e1, 0x6e02d0e1, 0x6802d0e1, 0x6802d0e1, 0x6002d0e1, 0x6002d0e1, 0x61001ced, 0x61001ced},
+- {0x0000a568, 0x7202b4c4, 0x7202b4c4, 0x6c02b4c4, 0x6c02b4c4, 0x6502b4c4, 0x6502b4c4, 0x660018d4, 0x660018d4},
+- {0x0000a56c, 0x75007894, 0x75007894, 0x70007894, 0x70007894, 0x6b007894, 0x6b007894, 0x660018d4, 0x660018d4},
+- {0x0000a570, 0x7b025c74, 0x7b025c74, 0x75025c74, 0x75025c74, 0x70025c74, 0x70025c74, 0x660018d4, 0x660018d4},
+- {0x0000a574, 0x8300bcb5, 0x8300bcb5, 0x7a00bcb5, 0x7a00bcb5, 0x7600bcb5, 0x7600bcb5, 0x660018d4, 0x660018d4},
+- {0x0000a578, 0x8a04dc74, 0x8a04dc74, 0x7f04dc74, 0x7f04dc74, 0x7c04dc74, 0x7c04dc74, 0x660018d4, 0x660018d4},
+- {0x0000a57c, 0x8a04dc74, 0x8a04dc74, 0x7f04dc74, 0x7f04dc74, 0x7c04dc74, 0x7c04dc74, 0x660018d4, 0x660018d4},
++ {0x0000a518, 0x1700002b, 0x1700002b, 0x1700002b, 0x1700002b, 0x1600002b, 0x1600002b, 0x1700000e, 0x1700000e},
++ {0x0000a51c, 0x1b00002d, 0x1b00002d, 0x1b00002d, 0x1b00002d, 0x1a00002d, 0x1a00002d, 0x1b000064, 0x1b000064},
++ {0x0000a520, 0x20000031, 0x20000031, 0x1f000031, 0x1f000031, 0x1e000031, 0x1e000031, 0x1f000242, 0x1f000242},
++ {0x0000a524, 0x24000051, 0x24000051, 0x23000051, 0x23000051, 0x23000051, 0x23000051, 0x23000229, 0x23000229},
++ {0x0000a528, 0x27000071, 0x27000071, 0x27000071, 0x27000071, 0x26000071, 0x26000071, 0x270002a2, 0x270002a2},
++ {0x0000a52c, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2c001203, 0x2c001203},
++ {0x0000a530, 0x3000028c, 0x3000028c, 0x2f00028c, 0x2f00028c, 0x2e00028c, 0x2e00028c, 0x30001803, 0x30001803},
++ {0x0000a534, 0x34000290, 0x34000290, 0x33000290, 0x33000290, 0x32000290, 0x32000290, 0x33000881, 0x33000881},
++ {0x0000a538, 0x37000292, 0x37000292, 0x36000292, 0x36000292, 0x35000292, 0x35000292, 0x38001809, 0x38001809},
++ {0x0000a53c, 0x3b02028d, 0x3b02028d, 0x3a02028d, 0x3a02028d, 0x3902028d, 0x3902028d, 0x3a000814, 0x3a000814},
++ {0x0000a540, 0x3f020291, 0x3f020291, 0x3e020291, 0x3e020291, 0x3d020291, 0x3d020291, 0x3f001a0c, 0x3f001a0c},
++ {0x0000a544, 0x44020490, 0x44020490, 0x43020490, 0x43020490, 0x42020490, 0x42020490, 0x43001a0e, 0x43001a0e},
++ {0x0000a548, 0x48020492, 0x48020492, 0x47020492, 0x47020492, 0x46020492, 0x46020492, 0x46001812, 0x46001812},
++ {0x0000a54c, 0x4c020692, 0x4c020692, 0x4b020692, 0x4b020692, 0x4a020692, 0x4a020692, 0x49001884, 0x49001884},
++ {0x0000a550, 0x50020892, 0x50020892, 0x4f020892, 0x4f020892, 0x4e020892, 0x4e020892, 0x4d001e84, 0x4d001e84},
++ {0x0000a554, 0x53040891, 0x53040891, 0x53040891, 0x53040891, 0x52040891, 0x52040891, 0x50001e69, 0x50001e69},
++ {0x0000a558, 0x58040893, 0x58040893, 0x57040893, 0x57040893, 0x56040893, 0x56040893, 0x550006f4, 0x550006f4},
++ {0x0000a55c, 0x5c0408b4, 0x5c0408b4, 0x5a0408b4, 0x5a0408b4, 0x5a0408b4, 0x5a0408b4, 0x59000ad3, 0x59000ad3},
++ {0x0000a560, 0x610408b6, 0x610408b6, 0x5e0408b6, 0x5e0408b6, 0x5e0408b6, 0x5e0408b6, 0x5e000ad5, 0x5e000ad5},
++ {0x0000a564, 0x670408f6, 0x670408f6, 0x620408f6, 0x620408f6, 0x620408f6, 0x620408f6, 0x61001ced, 0x61001ced},
++ {0x0000a568, 0x6a040cf6, 0x6a040cf6, 0x66040cf6, 0x66040cf6, 0x66040cf6, 0x66040cf6, 0x660018d4, 0x660018d4},
++ {0x0000a56c, 0x6d040d76, 0x6d040d76, 0x6a040d76, 0x6a040d76, 0x6a040d76, 0x6a040d76, 0x660018d4, 0x660018d4},
++ {0x0000a570, 0x70060db6, 0x70060db6, 0x6e060db6, 0x6e060db6, 0x6e060db6, 0x6e060db6, 0x660018d4, 0x660018d4},
++ {0x0000a574, 0x730a0df6, 0x730a0df6, 0x720a0df6, 0x720a0df6, 0x720a0df6, 0x720a0df6, 0x660018d4, 0x660018d4},
++ {0x0000a578, 0x770a13f6, 0x770a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x660018d4, 0x660018d4},
++ {0x0000a57c, 0x770a13f6, 0x770a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x660018d4, 0x660018d4},
+ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+ {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
+- {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x03804000, 0x03804000},
+- {0x0000a610, 0x04c08c01, 0x04c08c01, 0x04808b01, 0x04808b01, 0x04808a01, 0x04808a01, 0x0300ca02, 0x0300ca02},
+- {0x0000a614, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00000e04, 0x00000e04},
+- {0x0000a618, 0x04010c01, 0x04010c01, 0x03c10b01, 0x03c10b01, 0x03810a01, 0x03810a01, 0x03014000, 0x03014000},
+- {0x0000a61c, 0x03814e05, 0x03814e05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03414d05, 0x00000000, 0x00000000},
+- {0x0000a620, 0x04010303, 0x04010303, 0x03c10303, 0x03c10303, 0x03810303, 0x03810303, 0x00000000, 0x00000000},
+- {0x0000a624, 0x03814e05, 0x03814e05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03014000, 0x03014000},
+- {0x0000a628, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x03804c05, 0x03804c05},
+- {0x0000a62c, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x0701de06, 0x0701de06},
+- {0x0000a630, 0x03418000, 0x03418000, 0x03018000, 0x03018000, 0x02c18000, 0x02c18000, 0x07819c07, 0x07819c07},
+- {0x0000a634, 0x03815004, 0x03815004, 0x03414f04, 0x03414f04, 0x03414e04, 0x03414e04, 0x0701dc07, 0x0701dc07},
+- {0x0000a638, 0x03005302, 0x03005302, 0x02c05202, 0x02c05202, 0x02805202, 0x02805202, 0x0701dc07, 0x0701dc07},
+- {0x0000a63c, 0x04c09302, 0x04c09302, 0x04809202, 0x04809202, 0x04809202, 0x04809202, 0x0701dc07, 0x0701dc07},
+- {0x0000b2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa},
+- {0x0000b2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc},
+- {0x0000b2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0},
++ {0x0000a60c, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x03804000, 0x03804000},
++ {0x0000a610, 0x04008b01, 0x04008b01, 0x04008b01, 0x04008b01, 0x03c08b01, 0x03c08b01, 0x0300ca02, 0x0300ca02},
++ {0x0000a614, 0x05811403, 0x05811403, 0x05411303, 0x05411303, 0x05411303, 0x05411303, 0x00000e04, 0x00000e04},
++ {0x0000a618, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03014000, 0x03014000},
++ {0x0000a61c, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x00000000, 0x00000000},
++ {0x0000a620, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x00000000, 0x00000000},
++ {0x0000a624, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03014000, 0x03014000},
++ {0x0000a628, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03804c05, 0x03804c05},
++ {0x0000a62c, 0x06815604, 0x06815604, 0x06415504, 0x06415504, 0x06015504, 0x06015504, 0x0701de06, 0x0701de06},
++ {0x0000a630, 0x07819a05, 0x07819a05, 0x07419905, 0x07419905, 0x07019805, 0x07019805, 0x07819c07, 0x07819c07},
++ {0x0000a634, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
++ {0x0000a638, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
++ {0x0000a63c, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
++ {0x0000b2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
++ {0x0000b2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
++ {0x0000b2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
+ {0x0000b2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
+- {0x0000c2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa},
+- {0x0000c2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc},
+- {0x0000c2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0},
++ {0x0000c2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
++ {0x0000c2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
++ {0x0000c2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
+ {0x0000c2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
+ {0x00016044, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
+- {0x00016048, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401},
++ {0x00016048, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
+ {0x00016280, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01808e84, 0x01808e84},
+ {0x00016444, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
+- {0x00016448, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401},
++ {0x00016448, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
+ {0x00016844, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
+- {0x00016848, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401},
++ {0x00016848, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
+ };
+
+ static const u32 ar955x_1p0_mac_core[][2] = {
+@@ -846,7 +846,7 @@ static const u32 ar955x_1p0_baseband_cor
+ {0x0000a44c, 0x00000001},
+ {0x0000a450, 0x00010000},
+ {0x0000a458, 0x00000000},
+- {0x0000a644, 0x3fad9d74},
++ {0x0000a644, 0xbfad9d74},
+ {0x0000a648, 0x0048060a},
+ {0x0000a64c, 0x00003c37},
+ {0x0000a670, 0x03020100},
+@@ -1277,7 +1277,7 @@ static const u32 ar955x_1p0_modes_fast_c
+ {0x0000801c, 0x148ec02b, 0x148ec057},
+ {0x00008318, 0x000044c0, 0x00008980},
+ {0x00009e00, 0x0372131c, 0x0372131c},
+- {0x0000a230, 0x0000000b, 0x00000016},
++ {0x0000a230, 0x0000400b, 0x00004016},
+ {0x0000a254, 0x00000898, 0x00001130},
+ };
+
+--- a/drivers/net/wireless/ath/ath9k/htc_hst.c
++++ b/drivers/net/wireless/ath/ath9k/htc_hst.c
+@@ -347,6 +347,8 @@ void ath9k_htc_txcompletion_cb(struct ht
+ endpoint->ep_callbacks.tx(endpoint->ep_callbacks.priv,
+ skb, htc_hdr->endpoint_id,
+ txok);
++ } else {
++ kfree_skb(skb);
+ }
}
- if ((ts->ts_status & ATH9K_TXERR_FILT) == 0 &&
-- (bf->bf_flags & ATH9K_TXDESC_NOACK) == 0 && update_rc) {
-+ (tx_info->flags & IEEE80211_TX_CTL_NO_ACK) == 0) {
- /*
- * If an underrun error is seen assume it as an excessive
- * retry only if max frame trigger level has been reached
-@@ -2082,9 +2080,9 @@ static void ath_tx_rc_status(struct ath_
- * successfully by eventually preferring slower rates.
- * This itself should also alleviate congestion on the bus.
- */
-- if (ieee80211_is_data(hdr->frame_control) &&
-- (ts->ts_flags & (ATH9K_TX_DATA_UNDERRUN |
-- ATH9K_TX_DELIM_UNDERRUN)) &&
-+ if (unlikely(ts->ts_flags & (ATH9K_TX_DATA_UNDERRUN |
-+ ATH9K_TX_DELIM_UNDERRUN)) &&
-+ ieee80211_is_data(hdr->frame_control) &&
- ah->tx_trig_level >= sc->sc_ah->config.max_txtrig_level)
- tx_info->status.rates[tx_rateindex].count =
- hw->max_rate_tries;
-@@ -2115,13 +2113,7 @@ static void ath_tx_process_buffer(struct
- spin_unlock_bh(&txq->axq_lock);
-
- if (!bf_isampdu(bf)) {
-- /*
-- * This frame is sent out as a single frame.
-- * Use hardware retry status for this frame.
-- */
-- if (ts->ts_status & ATH9K_TXERR_XRETRY)
-- bf->bf_state.bf_type |= BUF_XRETRY;
-- ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok, true);
-+ ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok);
- ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok, 0);
- } else
- ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok, true);
---- a/net/mac80211/agg-rx.c
-+++ b/net/mac80211/agg-rx.c
-@@ -180,6 +180,8 @@ static void ieee80211_send_addba_resp(st
- memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
- else if (sdata->vif.type == NL80211_IFTYPE_STATION)
- memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
-+ else if (sdata->vif.type == NL80211_IFTYPE_WDS)
-+ memcpy(mgmt->bssid, da, ETH_ALEN);
+--- a/net/wireless/reg.c
++++ b/net/wireless/reg.c
+@@ -142,8 +142,8 @@ static void rcu_free_regdom(const struct
- mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
- IEEE80211_STYPE_ACTION);
---- a/net/mac80211/agg-tx.c
-+++ b/net/mac80211/agg-tx.c
-@@ -77,7 +77,8 @@ static void ieee80211_send_addba_request
- memcpy(mgmt->da, da, ETH_ALEN);
- memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN);
- if (sdata->vif.type == NL80211_IFTYPE_AP ||
-- sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
-+ sdata->vif.type == NL80211_IFTYPE_AP_VLAN ||
-+ sdata->vif.type == NL80211_IFTYPE_WDS)
- memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
- else if (sdata->vif.type == NL80211_IFTYPE_STATION)
- memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
-@@ -397,7 +398,8 @@ int ieee80211_start_tx_ba_session(struct
- */
- if (sdata->vif.type != NL80211_IFTYPE_STATION &&
- sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
-- sdata->vif.type != NL80211_IFTYPE_AP)
-+ sdata->vif.type != NL80211_IFTYPE_AP &&
-+ sdata->vif.type != NL80211_IFTYPE_WDS)
- return -EINVAL;
+ static struct regulatory_request *get_last_request(void)
+ {
+- return rcu_dereference_protected(last_request,
+- lockdep_is_held(®_mutex));
++ return rcu_dereference_check(last_request,
++ lockdep_is_held(®_mutex));
+ }
- if (test_sta_flags(sta, WLAN_STA_BLOCK_BA)) {
---- a/net/mac80211/debugfs_sta.c
-+++ b/net/mac80211/debugfs_sta.c
-@@ -59,7 +59,7 @@ static ssize_t sta_flags_read(struct fil
- char buf[100];
- struct sta_info *sta = file->private_data;
- u32 staflags = get_sta_flags(sta);
-- int res = scnprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s",
-+ int res = scnprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s",
- staflags & WLAN_STA_AUTH ? "AUTH\n" : "",
- staflags & WLAN_STA_ASSOC ? "ASSOC\n" : "",
- staflags & WLAN_STA_PS_STA ? "PS (sta)\n" : "",
-@@ -67,7 +67,6 @@ static ssize_t sta_flags_read(struct fil
- staflags & WLAN_STA_AUTHORIZED ? "AUTHORIZED\n" : "",
- staflags & WLAN_STA_SHORT_PREAMBLE ? "SHORT PREAMBLE\n" : "",
- staflags & WLAN_STA_WME ? "WME\n" : "",
-- staflags & WLAN_STA_WDS ? "WDS\n" : "",
- staflags & WLAN_STA_MFP ? "MFP\n" : "");
- return simple_read_from_buffer(userbuf, count, ppos, buf, res);
+ /* Used to queue up regulatory hints */
+@@ -1125,7 +1125,9 @@ static bool is_ht40_allowed(struct ieee8
+ if (chan->flags & IEEE80211_CHAN_DISABLED)
+ return false;
+ /* This would happen when regulatory rules disallow HT40 completely */
+- return !(chan->flags & IEEE80211_CHAN_NO_HT40);
++ if ((chan->flags & IEEE80211_CHAN_NO_HT40) == IEEE80211_CHAN_NO_HT40)
++ return false;
++ return true;
}
---- a/net/mac80211/iface.c
-+++ b/net/mac80211/iface.c
-@@ -178,7 +178,6 @@ static int ieee80211_do_open(struct net_
- {
- struct ieee80211_sub_if_data *sdata = IEEE80211_DEV_TO_SUB_IF(dev);
- struct ieee80211_local *local = sdata->local;
-- struct sta_info *sta;
- u32 changed = 0;
- int res;
- u32 hw_reconf_flags = 0;
-@@ -290,27 +289,6 @@ static int ieee80211_do_open(struct net_
- set_bit(SDATA_STATE_RUNNING, &sdata->state);
+ static void reg_process_ht_flags_channel(struct wiphy *wiphy,
+@@ -1850,7 +1852,7 @@ static void restore_regulatory_settings(
+ mutex_lock(&cfg80211_mutex);
+ mutex_lock(®_mutex);
+
+- reset_regdomains(true, cfg80211_world_regdom);
++ reset_regdomains(true, &world_regdom);
+ restore_alpha2(alpha2, reset_user);
-- if (sdata->vif.type == NL80211_IFTYPE_WDS) {
-- /* Create STA entry for the WDS peer */
-- sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
-- GFP_KERNEL);
-- if (!sta) {
-- res = -ENOMEM;
-- goto err_del_interface;
-- }
--
-- /* no locking required since STA is not live yet */
-- sta->flags |= WLAN_STA_AUTHORIZED;
--
-- res = sta_info_insert(sta);
-- if (res) {
-- /* STA has been freed */
-- goto err_del_interface;
-- }
--
-- rate_control_rate_init(sta);
-- }
--
/*
- * set_multicast_list will be invoked by the networking core
- * which will check whether any increments here were done in
-@@ -344,8 +322,7 @@ static int ieee80211_do_open(struct net_
- netif_tx_start_all_queues(dev);
+@@ -2251,14 +2253,21 @@ int set_regdom(const struct ieee80211_re
+
+ int reg_device_uevent(struct device *dev, struct kobj_uevent_env *env)
+ {
+- struct regulatory_request *lr = get_last_request();
++ struct regulatory_request *lr;
++ u8 alpha2[2];
++ bool add = false;
+
++ rcu_read_lock();
++ lr = get_last_request();
+ if (lr && !lr->processed) {
+- if (add_uevent_var(env, "COUNTRY=%c%c",
+- lr->alpha2[0], lr->alpha2[1]))
+- return -ENOMEM;
++ memcpy(alpha2, lr->alpha2, 2);
++ add = true;
+ }
++ rcu_read_unlock();
++ if (add)
++ return add_uevent_var(env, "COUNTRY=%c%c",
++ alpha2[0], alpha2[1]);
return 0;
-- err_del_interface:
-- drv_remove_interface(local, &sdata->vif);
-+
- err_stop:
- if (!local->open_count)
- drv_stop(local);
-@@ -718,6 +695,70 @@ static void ieee80211_if_setup(struct ne
- dev->destructor = free_netdev;
}
-+static void ieee80211_wds_rx_queued_mgmt(struct ieee80211_sub_if_data *sdata,
-+ struct sk_buff *skb)
-+{
-+ struct ieee80211_local *local = sdata->local;
-+ struct ieee80211_rx_status *rx_status;
-+ struct ieee802_11_elems elems;
-+ struct ieee80211_mgmt *mgmt;
-+ struct sta_info *sta;
-+ size_t baselen;
-+ u32 rates = 0;
-+ u16 stype;
-+ bool new = false;
-+ enum ieee80211_band band = local->hw.conf.channel->band;
-+ struct ieee80211_supported_band *sband = local->hw.wiphy->bands[band];
-+
-+ rx_status = IEEE80211_SKB_RXCB(skb);
-+ mgmt = (struct ieee80211_mgmt *) skb->data;
-+ stype = le16_to_cpu(mgmt->frame_control) & IEEE80211_FCTL_STYPE;
-+
-+ if (stype != IEEE80211_STYPE_BEACON)
-+ return;
-+
-+ baselen = (u8 *) mgmt->u.probe_resp.variable - (u8 *) mgmt;
-+ if (baselen > skb->len)
-+ return;
-+
-+ ieee802_11_parse_elems(mgmt->u.probe_resp.variable,
-+ skb->len - baselen, &elems);
-+
-+ rates = ieee80211_sta_get_rates(local, &elems, band);
-+
-+ rcu_read_lock();
-+
-+ sta = sta_info_get(sdata, sdata->u.wds.remote_addr);
-+
-+ if (!sta) {
-+ rcu_read_unlock();
-+ sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
-+ GFP_KERNEL);
-+ if (!sta)
-+ return;
-+
-+ new = true;
+--- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
+@@ -967,7 +967,7 @@ static bool ar9003_hw_init_cal(struct at
+ struct ath9k_hw_cal_data *caldata = ah->caldata;
+ bool txiqcal_done = false, txclcal_done = false;
+ bool is_reusable = true, status = true;
+- bool run_rtt_cal = false, run_agc_cal;
++ bool run_rtt_cal = false, run_agc_cal, sep_iq_cal = false;
+ bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT);
+ u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL |
+ AR_PHY_AGC_CONTROL_FLTR_CAL |
+@@ -977,6 +977,8 @@ static bool ar9003_hw_init_cal(struct at
+ AR_PHY_CL_TAB_1,
+ AR_PHY_CL_TAB_2 };
+
++ ar9003_hw_set_chain_masks(ah, ah->caps.rx_chainmask, ah->caps.tx_chainmask);
++
+ if (rtt) {
+ if (!ar9003_hw_rtt_restore(ah, chan))
+ run_rtt_cal = true;
+@@ -1013,7 +1015,8 @@ static bool ar9003_hw_init_cal(struct at
+ }
+ }
+
+- if (!(ah->enabled_cals & TX_IQ_CAL))
++ if ((IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan)) ||
++ !(ah->enabled_cals & TX_IQ_CAL))
+ goto skip_tx_iqcal;
+
+ /* Do Tx IQ Calibration */
+@@ -1033,21 +1036,22 @@ static bool ar9003_hw_init_cal(struct at
+ REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
+ AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
+ txiqcal_done = run_agc_cal = true;
+- goto skip_tx_iqcal;
+- } else if (caldata && !caldata->done_txiqcal_once)
++ } else if (caldata && !caldata->done_txiqcal_once) {
+ run_agc_cal = true;
++ sep_iq_cal = true;
+ }
+
++skip_tx_iqcal:
+ if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
+ ar9003_mci_init_cal_req(ah, &is_reusable);
+
+- if (!(IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))) {
++ if (sep_iq_cal) {
+ txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
+ REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
+ udelay(5);
+ REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
+ }
+
+-skip_tx_iqcal:
+ if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
+ /* Calibrate the AGC */
+ REG_WRITE(ah, AR_PHY_AGC_CONTROL,
+--- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
+@@ -744,6 +744,186 @@ static const u32 ar9300Modes_high_ob_db_
+ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
+ };
+
++static const u32 ar9300Modes_mixed_ob_db_tx_gain_table_2p2[][5] = {
++ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
++ {0x0000a2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
++ {0x0000a2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
++ {0x0000a2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
++ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
++ {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
++ {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
++ {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
++ {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
++ {0x0000a514, 0x1c000223, 0x1c000223, 0x11000400, 0x11000400},
++ {0x0000a518, 0x21002220, 0x21002220, 0x15000402, 0x15000402},
++ {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404},
++ {0x0000a520, 0x2b022220, 0x2b022220, 0x1b000603, 0x1b000603},
++ {0x0000a524, 0x2f022222, 0x2f022222, 0x1f000a02, 0x1f000a02},
++ {0x0000a528, 0x34022225, 0x34022225, 0x23000a04, 0x23000a04},
++ {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x26000a20, 0x26000a20},
++ {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2a000e20, 0x2a000e20},
++ {0x0000a534, 0x4202242a, 0x4202242a, 0x2e000e22, 0x2e000e22},
++ {0x0000a538, 0x4702244a, 0x4702244a, 0x31000e24, 0x31000e24},
++ {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x34001640, 0x34001640},
++ {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38001660, 0x38001660},
++ {0x0000a544, 0x52022470, 0x52022470, 0x3b001861, 0x3b001861},
++ {0x0000a548, 0x55022490, 0x55022490, 0x3e001a81, 0x3e001a81},
++ {0x0000a54c, 0x59022492, 0x59022492, 0x42001a83, 0x42001a83},
++ {0x0000a550, 0x5d022692, 0x5d022692, 0x44001c84, 0x44001c84},
++ {0x0000a554, 0x61022892, 0x61022892, 0x48001ce3, 0x48001ce3},
++ {0x0000a558, 0x65024890, 0x65024890, 0x4c001ce5, 0x4c001ce5},
++ {0x0000a55c, 0x69024892, 0x69024892, 0x50001ce9, 0x50001ce9},
++ {0x0000a560, 0x6e024c92, 0x6e024c92, 0x54001ceb, 0x54001ceb},
++ {0x0000a564, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
++ {0x0000a568, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
++ {0x0000a56c, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
++ {0x0000a570, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
++ {0x0000a574, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
++ {0x0000a578, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
++ {0x0000a57c, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
++ {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
++ {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
++ {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
++ {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
++ {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202},
++ {0x0000a594, 0x1c800223, 0x1c800223, 0x11800400, 0x11800400},
++ {0x0000a598, 0x21802220, 0x21802220, 0x15800402, 0x15800402},
++ {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404},
++ {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800603, 0x1b800603},
++ {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800a02, 0x1f800a02},
++ {0x0000a5a8, 0x34822225, 0x34822225, 0x23800a04, 0x23800a04},
++ {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x26800a20, 0x26800a20},
++ {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2a800e20, 0x2a800e20},
++ {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2e800e22, 0x2e800e22},
++ {0x0000a5b8, 0x4782244a, 0x4782244a, 0x31800e24, 0x31800e24},
++ {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x34801640, 0x34801640},
++ {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38801660, 0x38801660},
++ {0x0000a5c4, 0x52822470, 0x52822470, 0x3b801861, 0x3b801861},
++ {0x0000a5c8, 0x55822490, 0x55822490, 0x3e801a81, 0x3e801a81},
++ {0x0000a5cc, 0x59822492, 0x59822492, 0x42801a83, 0x42801a83},
++ {0x0000a5d0, 0x5d822692, 0x5d822692, 0x44801c84, 0x44801c84},
++ {0x0000a5d4, 0x61822892, 0x61822892, 0x48801ce3, 0x48801ce3},
++ {0x0000a5d8, 0x65824890, 0x65824890, 0x4c801ce5, 0x4c801ce5},
++ {0x0000a5dc, 0x69824892, 0x69824892, 0x50801ce9, 0x50801ce9},
++ {0x0000a5e0, 0x6e824c92, 0x6e824c92, 0x54801ceb, 0x54801ceb},
++ {0x0000a5e4, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
++ {0x0000a5e8, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
++ {0x0000a5ec, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
++ {0x0000a5f0, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
++ {0x0000a5f4, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
++ {0x0000a5f8, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
++ {0x0000a5fc, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
++ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a614, 0x02004000, 0x02004000, 0x01404000, 0x01404000},
++ {0x0000a618, 0x02004801, 0x02004801, 0x01404501, 0x01404501},
++ {0x0000a61c, 0x02808a02, 0x02808a02, 0x02008501, 0x02008501},
++ {0x0000a620, 0x0380ce03, 0x0380ce03, 0x0280ca03, 0x0280ca03},
++ {0x0000a624, 0x04411104, 0x04411104, 0x03010c04, 0x03010c04},
++ {0x0000a628, 0x04411104, 0x04411104, 0x04014c04, 0x04014c04},
++ {0x0000a62c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
++ {0x0000a630, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
++ {0x0000a634, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
++ {0x0000a638, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
++ {0x0000a63c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
++ {0x0000b2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
++ {0x0000b2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
++ {0x0000b2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
++ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x0000c2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
++ {0x0000c2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
++ {0x0000c2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
++ {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x00016044, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
++ {0x00016048, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
++ {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++ {0x00016444, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
++ {0x00016448, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
++ {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++ {0x00016844, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
++ {0x00016848, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
++ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++};
+
-+ sta->last_rx = jiffies;
-+ sta->sta.supp_rates[local->hw.conf.channel->band] = rates;
-+
-+ if (elems.ht_cap_elem)
-+ ieee80211_ht_cap_ie_to_sta_ht_cap(sband,
-+ elems.ht_cap_elem, &sta->sta.ht_cap);
-+
-+ if (elems.wmm_param)
-+ set_sta_flags(sta, WLAN_STA_WME);
++static const u32 ar9300Modes_type5_tx_gain_table_2p2[][5] = {
++ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
++ {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++ {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++ {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
++ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
++ {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
++ {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
++ {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
++ {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
++ {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
++ {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
++ {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
++ {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
++ {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
++ {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
++ {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
++ {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
++ {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
++ {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
++ {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
++ {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
++ {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
++ {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
++ {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
++ {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
++ {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
++ {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
++ {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
++ {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
++ {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++ {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++ {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++ {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
++ {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
++ {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
++ {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
++ {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
++ {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
++ {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++ {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++ {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
++ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++ {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++ {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
++ {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
++ {0x00016048, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
++ {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++ {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
++ {0x00016448, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
++ {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++ {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
++ {0x00016848, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
++ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++};
+
-+ if (new) {
-+ sta->flags = WLAN_STA_AUTHORIZED;
-+ rate_control_rate_init(sta);
-+ sta_info_insert_rcu(sta);
-+ }
+ static const u32 ar9300Common_rx_gain_table_2p2[][2] = {
+ /* Addr allmodes */
+ {0x0000a000, 0x00010000},
+--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
++++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
+@@ -507,28 +507,59 @@ static void ar9003_tx_gain_table_mode4(s
+ else if (AR_SREV_9580(ah))
+ INIT_INI_ARRAY(&ah->iniModesTxGain,
+ ar9580_1p0_mixed_ob_db_tx_gain_table);
++ else
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9300Modes_mixed_ob_db_tx_gain_table_2p2);
++}
+
-+ rcu_read_unlock();
++static void ar9003_tx_gain_table_mode5(struct ath_hw *ah)
++{
++ if (AR_SREV_9485_11(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9485Modes_green_ob_db_tx_gain_1_1);
++ else if (AR_SREV_9340(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9340Modes_ub124_tx_gain_table_1p0);
++ else if (AR_SREV_9580(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9580_1p0_type5_tx_gain_table);
++ else if (AR_SREV_9300_22(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9300Modes_type5_tx_gain_table_2p2);
+}
+
- static void ieee80211_iface_work(struct work_struct *work)
++static void ar9003_tx_gain_table_mode6(struct ath_hw *ah)
++{
++ if (AR_SREV_9340(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9340Modes_low_ob_db_and_spur_tx_gain_table_1p0);
++ else if (AR_SREV_9485_11(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9485Modes_green_spur_ob_db_tx_gain_1_1);
++ else if (AR_SREV_9580(ah))
++ INIT_INI_ARRAY(&ah->iniModesTxGain,
++ ar9580_1p0_type6_tx_gain_table);
+ }
+
++typedef void (*ath_txgain_tab)(struct ath_hw *ah);
++
+ static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
{
- struct ieee80211_sub_if_data *sdata =
-@@ -822,6 +863,9 @@ static void ieee80211_iface_work(struct
- break;
- ieee80211_mesh_rx_queued_mgmt(sdata, skb);
- break;
-+ case NL80211_IFTYPE_WDS:
-+ ieee80211_wds_rx_queued_mgmt(sdata, skb);
-+ break;
- default:
- WARN(1, "frame for unexpected interface type");
- break;
---- a/net/mac80211/rx.c
-+++ b/net/mac80211/rx.c
-@@ -2163,7 +2163,8 @@ ieee80211_rx_h_action(struct ieee80211_r
- */
- if (sdata->vif.type != NL80211_IFTYPE_STATION &&
- sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
-- sdata->vif.type != NL80211_IFTYPE_AP)
-+ sdata->vif.type != NL80211_IFTYPE_AP &&
-+ sdata->vif.type != NL80211_IFTYPE_WDS)
- break;
+- switch (ar9003_hw_get_tx_gain_idx(ah)) {
+- case 0:
+- default:
+- ar9003_tx_gain_table_mode0(ah);
+- break;
+- case 1:
+- ar9003_tx_gain_table_mode1(ah);
+- break;
+- case 2:
+- ar9003_tx_gain_table_mode2(ah);
+- break;
+- case 3:
+- ar9003_tx_gain_table_mode3(ah);
+- break;
+- case 4:
+- ar9003_tx_gain_table_mode4(ah);
+- break;
+- }
++ static const ath_txgain_tab modes[] = {
++ ar9003_tx_gain_table_mode0,
++ ar9003_tx_gain_table_mode1,
++ ar9003_tx_gain_table_mode2,
++ ar9003_tx_gain_table_mode3,
++ ar9003_tx_gain_table_mode4,
++ ar9003_tx_gain_table_mode5,
++ ar9003_tx_gain_table_mode6,
++ };
++ int idx = ar9003_hw_get_tx_gain_idx(ah);
++
++ if (idx >= ARRAY_SIZE(modes))
++ idx = 0;
++
++ modes[idx](ah);
+ }
- /* verify action_code is present */
-@@ -2378,13 +2379,14 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_
+ static void ar9003_rx_gain_table_mode0(struct ath_hw *ah)
+@@ -673,7 +704,7 @@ void ar9003_hw_attach_ops(struct ath_hw
+ struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
+ struct ath_hw_ops *ops = ath9k_hw_ops(ah);
- if (!ieee80211_vif_is_mesh(&sdata->vif) &&
- sdata->vif.type != NL80211_IFTYPE_ADHOC &&
-- sdata->vif.type != NL80211_IFTYPE_STATION)
-+ sdata->vif.type != NL80211_IFTYPE_STATION &&
-+ sdata->vif.type != NL80211_IFTYPE_WDS)
- return RX_DROP_MONITOR;
+- priv_ops->init_mode_regs = ar9003_hw_init_mode_regs;
++ ar9003_hw_init_mode_regs(ah);
+ priv_ops->init_mode_gain_regs = ar9003_hw_init_mode_gain_regs;
- switch (stype) {
- case cpu_to_le16(IEEE80211_STYPE_BEACON):
- case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
-- /* process for all: mesh, mlme, ibss */
-+ /* process for all: mesh, mlme, ibss, wds */
- break;
- case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
- case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
-@@ -2727,10 +2729,16 @@ static int prepare_for_handlers(struct i
- }
- break;
- case NL80211_IFTYPE_WDS:
-- if (bssid || !ieee80211_is_data(hdr->frame_control))
-- return 0;
- if (compare_ether_addr(sdata->u.wds.remote_addr, hdr->addr2))
- return 0;
+ ops->config_pci_powersave = ar9003_hw_configpcipowersave;
+--- a/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
+@@ -1172,6 +1172,106 @@ static const u32 ar9340Modes_mixed_ob_db
+ {0x00016448, 0x24925666, 0x24925666, 0x8e481266, 0x8e481266},
+ };
+
++static const u32 ar9340Modes_low_ob_db_and_spur_tx_gain_table_1p0[][5] = {
++ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
++ {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03eaac5a, 0x03eaac5a},
++ {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03f330ac, 0x03f330ac},
++ {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03fc3f00, 0x03fc3f00},
++ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ffc000, 0x03ffc000},
++ {0x0000a394, 0x00000444, 0x00000444, 0x00000404, 0x00000404},
++ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
++ {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a504, 0x06000003, 0x06000003, 0x02000001, 0x02000001},
++ {0x0000a508, 0x0a000020, 0x0a000020, 0x05000003, 0x05000003},
++ {0x0000a50c, 0x10000023, 0x10000023, 0x0a000005, 0x0a000005},
++ {0x0000a510, 0x16000220, 0x16000220, 0x0e000201, 0x0e000201},
++ {0x0000a514, 0x1c000223, 0x1c000223, 0x11000203, 0x11000203},
++ {0x0000a518, 0x21002220, 0x21002220, 0x14000401, 0x14000401},
++ {0x0000a51c, 0x27002223, 0x27002223, 0x18000403, 0x18000403},
++ {0x0000a520, 0x2b022220, 0x2b022220, 0x1b000602, 0x1b000602},
++ {0x0000a524, 0x2f022222, 0x2f022222, 0x1f000802, 0x1f000802},
++ {0x0000a528, 0x34022225, 0x34022225, 0x21000620, 0x21000620},
++ {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x25000820, 0x25000820},
++ {0x0000a530, 0x3e02222c, 0x3e02222c, 0x29000822, 0x29000822},
++ {0x0000a534, 0x4202242a, 0x4202242a, 0x2d000824, 0x2d000824},
++ {0x0000a538, 0x4702244a, 0x4702244a, 0x30000828, 0x30000828},
++ {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x3400082a, 0x3400082a},
++ {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38000849, 0x38000849},
++ {0x0000a544, 0x5302266c, 0x5302266c, 0x3b000a2c, 0x3b000a2c},
++ {0x0000a548, 0x5702286c, 0x5702286c, 0x3e000e2b, 0x3e000e2b},
++ {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x42000e2d, 0x42000e2d},
++ {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4500124a, 0x4500124a},
++ {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4900124c, 0x4900124c},
++ {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x4c00126c, 0x4c00126c},
++ {0x0000a55c, 0x7002708c, 0x7002708c, 0x4f00128c, 0x4f00128c},
++ {0x0000a560, 0x7302b08a, 0x7302b08a, 0x52001290, 0x52001290},
++ {0x0000a564, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
++ {0x0000a568, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
++ {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
++ {0x0000a570, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
++ {0x0000a574, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
++ {0x0000a578, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
++ {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
++ {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
++ {0x0000a584, 0x06800003, 0x06800003, 0x02800001, 0x02800001},
++ {0x0000a588, 0x0a800020, 0x0a800020, 0x05800003, 0x05800003},
++ {0x0000a58c, 0x10800023, 0x10800023, 0x0a800005, 0x0a800005},
++ {0x0000a590, 0x16800220, 0x16800220, 0x0e800201, 0x0e800201},
++ {0x0000a594, 0x1c800223, 0x1c800223, 0x11800203, 0x11800203},
++ {0x0000a598, 0x21820220, 0x21820220, 0x14800401, 0x14800401},
++ {0x0000a59c, 0x27820223, 0x27820223, 0x18800403, 0x18800403},
++ {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800602, 0x1b800602},
++ {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800802, 0x1f800802},
++ {0x0000a5a8, 0x34822225, 0x34822225, 0x21800620, 0x21800620},
++ {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x25800820, 0x25800820},
++ {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x29800822, 0x29800822},
++ {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2d800824, 0x2d800824},
++ {0x0000a5b8, 0x4782244a, 0x4782244a, 0x30800828, 0x30800828},
++ {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x3480082a, 0x3480082a},
++ {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38800849, 0x38800849},
++ {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3b800a2c, 0x3b800a2c},
++ {0x0000a5c8, 0x5782286c, 0x5782286c, 0x3e800e2b, 0x3e800e2b},
++ {0x0000a5cc, 0x5c84286b, 0x5c84286b, 0x42800e2d, 0x42800e2d},
++ {0x0000a5d0, 0x61842a6c, 0x61842a6c, 0x4580124a, 0x4580124a},
++ {0x0000a5d4, 0x66862a6c, 0x66862a6c, 0x4980124c, 0x4980124c},
++ {0x0000a5d8, 0x6b862e6c, 0x6b862e6c, 0x4c80126c, 0x4c80126c},
++ {0x0000a5dc, 0x7086308c, 0x7086308c, 0x4f80128c, 0x4f80128c},
++ {0x0000a5e0, 0x738a308a, 0x738a308a, 0x52801290, 0x52801290},
++ {0x0000a5e4, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
++ {0x0000a5e8, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
++ {0x0000a5ec, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
++ {0x0000a5f0, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
++ {0x0000a5f4, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
++ {0x0000a5f8, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
++ {0x0000a5fc, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
++ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a614, 0x01404000, 0x01404000, 0x01404501, 0x01404501},
++ {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
++ {0x0000a61c, 0x02008802, 0x02008802, 0x01404501, 0x01404501},
++ {0x0000a620, 0x0300cc03, 0x0300cc03, 0x03c0cf02, 0x03c0cf02},
++ {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03c0cf03, 0x03c0cf03},
++ {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04011004, 0x04011004},
++ {0x0000a62c, 0x03810c03, 0x03810c03, 0x05419405, 0x05419405},
++ {0x0000a630, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
++ {0x0000a634, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
++ {0x0000a638, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
++ {0x0000a63c, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
++ {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03eaac5a, 0x03eaac5a},
++ {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03f330ac, 0x03f330ac},
++ {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03fc3f00, 0x03fc3f00},
++ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ffc000, 0x03ffc000},
++ {0x00016044, 0x022492db, 0x022492db, 0x022492db, 0x022492db},
++ {0x00016048, 0x24925666, 0x24925666, 0x24925266, 0x24925266},
++ {0x00016280, 0x01000015, 0x01000015, 0x01001015, 0x01001015},
++ {0x00016288, 0xf0318000, 0xf0318000, 0xf0318000, 0xf0318000},
++ {0x00016444, 0x022492db, 0x022492db, 0x022492db, 0x022492db},
++ {0x00016448, 0x24925666, 0x24925666, 0x24925266, 0x24925266},
++};
+
-+ if (ieee80211_is_data(hdr->frame_control) ||
-+ ieee80211_is_action(hdr->frame_control)) {
-+ if (compare_ether_addr(sdata->vif.addr, hdr->addr1))
-+ return 0;
-+ } else if (!ieee80211_is_beacon(hdr->frame_control))
-+ return 0;
+ static const u32 ar9340_1p0_mac_core[][2] = {
+ /* Addr allmodes */
+ {0x00000008, 0x00000000},
+--- a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
+@@ -260,6 +260,79 @@ static const u32 ar9485Modes_high_power_
+ {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
+ };
+
++static const u32 ar9485Modes_green_ob_db_tx_gain_1_1[][5] = {
++ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
++ {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
++ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
++ {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
++ {0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
++ {0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
++ {0x0000a508, 0x0c002e00, 0x0c002e00, 0x06000203, 0x06000203},
++ {0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
++ {0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
++ {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
++ {0x0000a518, 0x25020ec0, 0x25020ec0, 0x15000604, 0x15000604},
++ {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x18000605, 0x18000605},
++ {0x0000a520, 0x2f001f04, 0x2f001f04, 0x1c000a04, 0x1c000a04},
++ {0x0000a524, 0x35001fc4, 0x35001fc4, 0x21000a06, 0x21000a06},
++ {0x0000a528, 0x3c022f04, 0x3c022f04, 0x29000a24, 0x29000a24},
++ {0x0000a52c, 0x41023e85, 0x41023e85, 0x2f000e21, 0x2f000e21},
++ {0x0000a530, 0x48023ec6, 0x48023ec6, 0x31000e20, 0x31000e20},
++ {0x0000a534, 0x4d023f01, 0x4d023f01, 0x33000e20, 0x33000e20},
++ {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
++ {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
++ {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
++ {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
++ {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
++ {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
++ {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
++ {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
++ {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
++ {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
++ {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
++ {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
++ {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
++ {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
++ {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
++ {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
++ {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
++ {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
++ {0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b50c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b510, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b514, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b518, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b51c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b520, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b524, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b528, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b52c, 0x0000002a, 0x0000002a, 0x0000002a, 0x0000002a},
++ {0x0000b530, 0x0000003a, 0x0000003a, 0x0000003a, 0x0000003a},
++ {0x0000b534, 0x0000004a, 0x0000004a, 0x0000004a, 0x0000004a},
++ {0x0000b538, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b53c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b540, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b544, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b548, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b54c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b550, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b554, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b558, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b55c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
++ {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
++};
++
+ static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
+ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
+ {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
+@@ -450,6 +523,79 @@ static const u32 ar9485Modes_low_ob_db_t
+
+ #define ar9485_modes_lowest_ob_db_tx_gain_1_1 ar9485Modes_low_ob_db_tx_gain_1_1
+
++static const u32 ar9485Modes_green_spur_ob_db_tx_gain_1_1[][5] = {
++ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
++ {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
++ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
++ {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
++ {0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
++ {0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
++ {0x0000a508, 0x0c002e00, 0x0c002e00, 0x07000203, 0x07000203},
++ {0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
++ {0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
++ {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
++ {0x0000a518, 0x25020ec0, 0x25020ec0, 0x14000406, 0x14000406},
++ {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1800040a, 0x1800040a},
++ {0x0000a520, 0x2f001f04, 0x2f001f04, 0x1c000460, 0x1c000460},
++ {0x0000a524, 0x35001fc4, 0x35001fc4, 0x22000463, 0x22000463},
++ {0x0000a528, 0x3c022f04, 0x3c022f04, 0x26000465, 0x26000465},
++ {0x0000a52c, 0x41023e85, 0x41023e85, 0x2e0006e0, 0x2e0006e0},
++ {0x0000a530, 0x48023ec6, 0x48023ec6, 0x310006e0, 0x310006e0},
++ {0x0000a534, 0x4d023f01, 0x4d023f01, 0x330006e0, 0x330006e0},
++ {0x0000a538, 0x53023f4b, 0x53023f4b, 0x3e0008e3, 0x3e0008e3},
++ {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x410008e5, 0x410008e5},
++ {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x430008e6, 0x430008e6},
++ {0x0000a544, 0x6502feca, 0x6502feca, 0x4a0008ec, 0x4a0008ec},
++ {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4e0008f1, 0x4e0008f1},
++ {0x0000a54c, 0x7203feca, 0x7203feca, 0x520008f3, 0x520008f3},
++ {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x54000eed, 0x54000eed},
++ {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x58000ef1, 0x58000ef1},
++ {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5c000ef3, 0x5c000ef3},
++ {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x60000ef5, 0x60000ef5},
++ {0x0000a560, 0x900fff0b, 0x900fff0b, 0x62000ef6, 0x62000ef6},
++ {0x0000a564, 0x960fffcb, 0x960fffcb, 0x62000ef6, 0x62000ef6},
++ {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
++ {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
++ {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
++ {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
++ {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
++ {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
++ {0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b50c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b510, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b514, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b518, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b51c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b520, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b524, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b528, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
++ {0x0000b52c, 0x0000002a, 0x0000002a, 0x0000002a, 0x0000002a},
++ {0x0000b530, 0x0000003a, 0x0000003a, 0x0000003a, 0x0000003a},
++ {0x0000b534, 0x0000004a, 0x0000004a, 0x0000004a, 0x0000004a},
++ {0x0000b538, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b53c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b540, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b544, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b548, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b54c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b550, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b554, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b558, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b55c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
++ {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
++ {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
++};
++
+ static const u32 ar9485_1_1[][2] = {
+ /* Addr allmodes */
+ {0x0000a580, 0x00000000},
+--- a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
++++ b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
+@@ -685,6 +685,82 @@ static const u32 ar9580_1p0_mixed_ob_db_
+
+ #define ar9580_1p0_high_ob_db_tx_gain_table ar9300Modes_high_ob_db_tx_gain_table_2p2
+
++#define ar9580_1p0_type5_tx_gain_table ar9300Modes_type5_tx_gain_table_2p2
++
++static const u32 ar9580_1p0_type6_tx_gain_table[][5] = {
++ /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
++ {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++ {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++ {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
++ {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
++ {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
++ {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
++ {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
++ {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
++ {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
++ {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
++ {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
++ {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
++ {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
++ {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
++ {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
++ {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
++ {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
++ {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
++ {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
++ {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
++ {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
++ {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
++ {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
++ {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
++ {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
++ {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
++ {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
++ {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
++ {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
++ {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
++ {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++ {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++ {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
++ {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
++ {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
++ {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
++ {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
++ {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
++ {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
++ {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
++ {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++ {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++ {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
++ {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
++ {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
++ {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
++ {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
++ {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
++ {0x00016048, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
++ {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++ {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
++ {0x00016448, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
++ {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++ {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
++ {0x00016848, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
++ {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
++};
+
+ static const u32 ar9580_1p0_soc_preamble[][2] = {
+ /* Addr allmodes */
+ {0x000040a4, 0x00a0c1c9},
+--- a/drivers/net/wireless/ath/ath9k/reg.h
++++ b/drivers/net/wireless/ath/ath9k/reg.h
+@@ -789,6 +789,7 @@
+ #define AR_SREV_REVISION_9271_11 1
+ #define AR_SREV_VERSION_9300 0x1c0
+ #define AR_SREV_REVISION_9300_20 2 /* 2.0 and 2.1 */
++#define AR_SREV_REVISION_9300_22 3
+ #define AR_SREV_VERSION_9330 0x200
+ #define AR_SREV_REVISION_9330_10 0
+ #define AR_SREV_REVISION_9330_11 1
+@@ -869,6 +870,9 @@
+ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9300))
+ #define AR_SREV_9300_20_OR_LATER(_ah) \
+ ((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9300)
++#define AR_SREV_9300_22(_ah) \
++ (AR_SREV_9300(ah) && \
++ ((_ah)->hw_version.macRev == AR_SREV_REVISION_9300_22))
+
+ #define AR_SREV_9330(_ah) \
+ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9330))
+--- a/net/mac80211/mlme.c
++++ b/net/mac80211/mlme.c
+@@ -199,11 +199,11 @@ static u32 ieee80211_config_ht_tx(struct
+ case NL80211_CHAN_WIDTH_40:
+ if (sdata->vif.bss_conf.chandef.chan->center_freq >
+ sdata->vif.bss_conf.chandef.center_freq1 &&
+- chan->flags & IEEE80211_CHAN_NO_HT40PLUS)
++ chan->flags & IEEE80211_CHAN_NO_HT40MINUS)
+ disable_40 = true;
+ if (sdata->vif.bss_conf.chandef.chan->center_freq <
+ sdata->vif.bss_conf.chandef.center_freq1 &&
+- chan->flags & IEEE80211_CHAN_NO_HT40MINUS)
++ chan->flags & IEEE80211_CHAN_NO_HT40PLUS)
+ disable_40 = true;
break;
default:
- /* should never get here */
---- a/net/mac80211/sta_info.h
-+++ b/net/mac80211/sta_info.h
-@@ -31,7 +31,6 @@
- * frames.
- * @WLAN_STA_ASSOC_AP: We're associated to that station, it is an AP.
- * @WLAN_STA_WME: Station is a QoS-STA.
-- * @WLAN_STA_WDS: Station is one of our WDS peers.
- * @WLAN_STA_CLEAR_PS_FILT: Clear PS filter in hardware (using the
- * IEEE80211_TX_CTL_CLEAR_PS_FILT control flag) when the next
- * frame to this station is transmitted.
-@@ -54,7 +53,6 @@ enum ieee80211_sta_info_flags {
- WLAN_STA_SHORT_PREAMBLE = 1<<4,
- WLAN_STA_ASSOC_AP = 1<<5,
- WLAN_STA_WME = 1<<6,
-- WLAN_STA_WDS = 1<<7,
- WLAN_STA_CLEAR_PS_FILT = 1<<9,
- WLAN_STA_MFP = 1<<10,
- WLAN_STA_BLOCK_BA = 1<<11,
---- a/net/mac80211/status.c
-+++ b/net/mac80211/status.c
-@@ -278,17 +278,19 @@ void ieee80211_tx_status(struct ieee8021
- }
+--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
++++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
+@@ -18,6 +18,7 @@
+ #include "hw-ops.h"
+ #include "../regd.h"
+ #include "ar9002_phy.h"
++#include "ar5008_initvals.h"
+
+ /* All code below is for AR5008, AR9001, AR9002 */
+
+@@ -43,23 +44,16 @@ static const int m2ThreshLowExt_off = 12
+ static const int m1ThreshExt_off = 127;
+ static const int m2ThreshExt_off = 127;
+
++static const struct ar5416IniArray bank0 = STATIC_INI_ARRAY(ar5416Bank0);
++static const struct ar5416IniArray bank1 = STATIC_INI_ARRAY(ar5416Bank1);
++static const struct ar5416IniArray bank2 = STATIC_INI_ARRAY(ar5416Bank2);
++static const struct ar5416IniArray bank3 = STATIC_INI_ARRAY(ar5416Bank3);
++static const struct ar5416IniArray bank7 = STATIC_INI_ARRAY(ar5416Bank7);
+
+-static void ar5008_rf_bank_setup(u32 *bank, struct ar5416IniArray *array,
+- int col)
+-{
+- int i;
+-
+- for (i = 0; i < array->ia_rows; i++)
+- bank[i] = INI_RA(array, i, col);
+-}
+-
+-
+-#define REG_WRITE_RF_ARRAY(iniarray, regData, regWr) \
+- ar5008_write_rf_array(ah, iniarray, regData, &(regWr))
+-
+-static void ar5008_write_rf_array(struct ath_hw *ah, struct ar5416IniArray *array,
+- u32 *data, unsigned int *writecnt)
++static void ar5008_write_bank6(struct ath_hw *ah, unsigned int *writecnt)
+ {
++ struct ar5416IniArray *array = &ah->iniBank6;
++ u32 *data = ah->analogBank6Data;
+ int r;
- if (!acked && ieee80211_is_back_req(fc)) {
-+ u16 control;
-+
- /*
-- * BAR failed, let's tear down the BA session as a
-- * last resort as some STAs (Intel 5100 on Windows)
-- * can get stuck when the BA window isn't flushed
-- * correctly.
-+ * BAR failed, store the last SSN and retry sending
-+ * the BAR when the next unicast transmission on the
-+ * same TID succeeds.
- */
- bar = (struct ieee80211_bar *) skb->data;
-- if (!(bar->control & IEEE80211_BAR_CTRL_MULTI_TID)) {
-+ control = le16_to_cpu(bar->control);
-+ if (!(control & IEEE80211_BAR_CTRL_MULTI_TID)) {
- u16 ssn = le16_to_cpu(bar->start_seq_num);
+ ENABLE_REGWRITE_BUFFER(ah);
+@@ -165,7 +159,7 @@ static void ar5008_hw_force_bias(struct
+ ar5008_hw_phy_modify_rx_buffer(ah->analogBank6Data, tmp_reg, 3, 181, 3);
-- tid = (bar->control &
-+ tid = (control &
- IEEE80211_BAR_CTRL_TID_INFO_MASK) >>
- IEEE80211_BAR_CTRL_TID_INFO_SHIFT;
+ /* write Bank 6 with new params */
+- REG_WRITE_RF_ARRAY(&ah->iniBank6, ah->analogBank6Data, reg_writes);
++ ar5008_write_bank6(ah, ®_writes);
+ }
---- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
-+++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
-@@ -704,8 +704,10 @@ static void ar5008_hw_override_ini(struc
- REG_WRITE(ah, AR_PCU_MISC_MODE2, val);
- }
+ /**
+@@ -469,31 +463,16 @@ static void ar5008_hw_spur_mitigate(stru
+ */
+ static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah)
+ {
+-#define ATH_ALLOC_BANK(bank, size) do { \
+- bank = devm_kzalloc(ah->dev, sizeof(u32) * size, GFP_KERNEL); \
+- if (!bank) \
+- goto error; \
+- } while (0);
+-
+- struct ath_common *common = ath9k_hw_common(ah);
++ int size = ah->iniBank6.ia_rows * sizeof(u32);
+
+ if (AR_SREV_9280_20_OR_LATER(ah))
+ return 0;
+
+- ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);
+- ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
+- ATH_ALLOC_BANK(ah->analogBank2Data, ah->iniBank2.ia_rows);
+- ATH_ALLOC_BANK(ah->analogBank3Data, ah->iniBank3.ia_rows);
+- ATH_ALLOC_BANK(ah->analogBank6Data, ah->iniBank6.ia_rows);
+- ATH_ALLOC_BANK(ah->analogBank6TPCData, ah->iniBank6TPC.ia_rows);
+- ATH_ALLOC_BANK(ah->analogBank7Data, ah->iniBank7.ia_rows);
+- ATH_ALLOC_BANK(ah->bank6Temp, ah->iniBank6.ia_rows);
++ ah->analogBank6Data = devm_kzalloc(ah->dev, size, GFP_KERNEL);
++ if (!ah->analogBank6Data)
++ return -ENOMEM;
+
+ return 0;
+-#undef ATH_ALLOC_BANK
+-error:
+- ath_err(common, "Cannot allocate RF banks\n");
+- return -ENOMEM;
+ }
+
+
+@@ -517,6 +496,7 @@ static bool ar5008_hw_set_rf_regs(struct
+ u32 ob5GHz = 0, db5GHz = 0;
+ u32 ob2GHz = 0, db2GHz = 0;
+ int regWrites = 0;
++ int i;
-- if (!AR_SREV_5416_20_OR_LATER(ah) ||
-- AR_SREV_9280_20_OR_LATER(ah))
-+ REG_SET_BIT(ah, AR_PHY_CCK_DETECT,
-+ AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
-+
-+ if (AR_SREV_9280_20_OR_LATER(ah))
- return;
/*
- * Disable BB clock gating
-@@ -802,7 +804,8 @@ static int ar5008_hw_process_ini(struct
-
- /* Write ADDAC shifts */
- REG_WRITE(ah, AR_PHY_ADC_SERIAL_CTL, AR_PHY_SEL_EXTERNAL_RADIO);
-- ah->eep_ops->set_addac(ah, chan);
-+ if (ah->eep_ops->set_addac)
-+ ah->eep_ops->set_addac(ah, chan);
-
- if (AR_SREV_5416_22_OR_LATER(ah)) {
- REG_WRITE_ARRAY(&ah->iniAddac, 1, regWrites);
-@@ -1007,24 +1010,6 @@ static void ar5008_restore_chainmask(str
+ * Software does not need to program bank data
+@@ -529,25 +509,8 @@ static bool ar5008_hw_set_rf_regs(struct
+ /* Setup rf parameters */
+ eepMinorRev = ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV);
+
+- /* Setup Bank 0 Write */
+- ar5008_rf_bank_setup(ah->analogBank0Data, &ah->iniBank0, 1);
+-
+- /* Setup Bank 1 Write */
+- ar5008_rf_bank_setup(ah->analogBank1Data, &ah->iniBank1, 1);
+-
+- /* Setup Bank 2 Write */
+- ar5008_rf_bank_setup(ah->analogBank2Data, &ah->iniBank2, 1);
+-
+- /* Setup Bank 6 Write */
+- ar5008_rf_bank_setup(ah->analogBank3Data, &ah->iniBank3,
+- modesIndex);
+- {
+- int i;
+- for (i = 0; i < ah->iniBank6TPC.ia_rows; i++) {
+- ah->analogBank6Data[i] =
+- INI_RA(&ah->iniBank6TPC, i, modesIndex);
+- }
+- }
++ for (i = 0; i < ah->iniBank6.ia_rows; i++)
++ ah->analogBank6Data[i] = INI_RA(&ah->iniBank6, i, modesIndex);
+
+ /* Only the 5 or 2 GHz OB/DB need to be set for a mode */
+ if (eepMinorRev >= 2) {
+@@ -568,22 +531,13 @@ static bool ar5008_hw_set_rf_regs(struct
+ }
}
+
+- /* Setup Bank 7 Setup */
+- ar5008_rf_bank_setup(ah->analogBank7Data, &ah->iniBank7, 1);
+-
+ /* Write Analog registers */
+- REG_WRITE_RF_ARRAY(&ah->iniBank0, ah->analogBank0Data,
+- regWrites);
+- REG_WRITE_RF_ARRAY(&ah->iniBank1, ah->analogBank1Data,
+- regWrites);
+- REG_WRITE_RF_ARRAY(&ah->iniBank2, ah->analogBank2Data,
+- regWrites);
+- REG_WRITE_RF_ARRAY(&ah->iniBank3, ah->analogBank3Data,
+- regWrites);
+- REG_WRITE_RF_ARRAY(&ah->iniBank6TPC, ah->analogBank6Data,
+- regWrites);
+- REG_WRITE_RF_ARRAY(&ah->iniBank7, ah->analogBank7Data,
+- regWrites);
++ REG_WRITE_ARRAY(&bank0, 1, regWrites);
++ REG_WRITE_ARRAY(&bank1, 1, regWrites);
++ REG_WRITE_ARRAY(&bank2, 1, regWrites);
++ REG_WRITE_ARRAY(&bank3, modesIndex, regWrites);
++ ar5008_write_bank6(ah, ®Writes);
++ REG_WRITE_ARRAY(&bank7, 1, regWrites);
+
+ return true;
}
+--- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
++++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
+@@ -23,13 +23,13 @@
--static void ar5008_set_diversity(struct ath_hw *ah, bool value)
--{
-- u32 v = REG_READ(ah, AR_PHY_CCK_DETECT);
-- if (value)
-- v |= AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
-- else
-- v &= ~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
-- REG_WRITE(ah, AR_PHY_CCK_DETECT, v);
--}
--
--static u32 ar9100_hw_compute_pll_control(struct ath_hw *ah,
-- struct ath9k_channel *chan)
--{
-- if (chan && IS_CHAN_5GHZ(chan))
-- return 0x1450;
-- return 0x1458;
--}
--
- static u32 ar9160_hw_compute_pll_control(struct ath_hw *ah,
- struct ath9k_channel *chan)
+ /* General hardware code for the A5008/AR9001/AR9002 hadware families */
+
+-static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
++static int ar9002_hw_init_mode_regs(struct ath_hw *ah)
{
-@@ -1654,7 +1639,6 @@ void ar5008_hw_attach_phy_ops(struct ath
- priv_ops->rfbus_req = ar5008_hw_rfbus_req;
- priv_ops->rfbus_done = ar5008_hw_rfbus_done;
- priv_ops->restore_chainmask = ar5008_restore_chainmask;
-- priv_ops->set_diversity = ar5008_set_diversity;
- priv_ops->do_getnf = ar5008_hw_do_getnf;
- priv_ops->set_radar_params = ar5008_hw_set_radar_params;
-
-@@ -1664,9 +1648,7 @@ void ar5008_hw_attach_phy_ops(struct ath
- } else
- priv_ops->ani_control = ar5008_hw_ani_control_old;
-
-- if (AR_SREV_9100(ah))
-- priv_ops->compute_pll_control = ar9100_hw_compute_pll_control;
-- else if (AR_SREV_9160_10_OR_LATER(ah))
-+ if (AR_SREV_9100(ah) || AR_SREV_9160_10_OR_LATER(ah))
- priv_ops->compute_pll_control = ar9160_hw_compute_pll_control;
- else
- priv_ops->compute_pll_control = ar5008_hw_compute_pll_control;
---- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
-@@ -592,6 +592,9 @@ static void ar9003_hw_override_ini(struc
- val = REG_READ(ah, AR_PCU_MISC_MODE2) & (~AR_ADHOC_MCAST_KEYID_ENABLE);
- REG_WRITE(ah, AR_PCU_MISC_MODE2,
- val | AR_AGG_WEP_ENABLE_FIX | AR_AGG_WEP_ENABLE);
-+
-+ REG_SET_BIT(ah, AR_PHY_CCK_DETECT,
-+ AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV);
+ if (AR_SREV_9271(ah)) {
+ INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271);
+ INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271);
+ INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg);
+- return;
++ return 0;
+ }
+
+ if (ah->config.pcie_clock_req)
+@@ -67,12 +67,10 @@ static void ar9002_hw_init_mode_regs(str
+ } else if (AR_SREV_9100_OR_LATER(ah)) {
+ INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100);
+ INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100);
+- INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100);
+ INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100);
+ } else {
+ INIT_INI_ARRAY(&ah->iniModes, ar5416Modes);
+ INIT_INI_ARRAY(&ah->iniCommon, ar5416Common);
+- INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC);
+ INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac);
+ }
+
+@@ -80,20 +78,11 @@ static void ar9002_hw_init_mode_regs(str
+ /* Common for AR5416, AR913x, AR9160 */
+ INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain);
+
+- INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0);
+- INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1);
+- INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2);
+- INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3);
+- INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7);
+-
+- /* Common for AR5416, AR9160 */
+- if (!AR_SREV_9100(ah))
+- INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6);
+-
+ /* Common for AR913x, AR9160 */
+ if (!AR_SREV_5416(ah))
+- INIT_INI_ARRAY(&ah->iniBank6TPC,
+- ar5416Bank6TPC_9100);
++ INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6TPC_9100);
++ else
++ INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6TPC);
+ }
+
+ /* iniAddac needs to be modified for these chips */
+@@ -104,7 +93,7 @@ static void ar9002_hw_init_mode_regs(str
+
+ data = devm_kzalloc(ah->dev, size, GFP_KERNEL);
+ if (!data)
+- return;
++ return -ENOMEM;
+
+ memcpy(data, addac->ia_array, size);
+ addac->ia_array = data;
+@@ -120,6 +109,7 @@ static void ar9002_hw_init_mode_regs(str
+ INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
+ ar9287Common_japan_2484_cck_fir_coeff_9287_1_1);
+ }
++ return 0;
}
- static void ar9003_hw_prog_ini(struct ath_hw *ah,
-@@ -785,16 +788,6 @@ static void ar9003_hw_rfbus_done(struct
- REG_WRITE(ah, AR_PHY_RFBUS_REQ, 0);
+ static void ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah)
+@@ -415,7 +405,10 @@ int ar9002_hw_attach_ops(struct ath_hw *
+ struct ath_hw_ops *ops = ath9k_hw_ops(ah);
+ int ret;
+
+- priv_ops->init_mode_regs = ar9002_hw_init_mode_regs;
++ ret = ar9002_hw_init_mode_regs(ah);
++ if (ret)
++ return ret;
++
+ priv_ops->init_mode_gain_regs = ar9002_hw_init_mode_gain_regs;
+
+ ops->config_pci_powersave = ar9002_hw_configpcipowersave;
+--- a/drivers/net/wireless/ath/ath9k/hw.c
++++ b/drivers/net/wireless/ath/ath9k/hw.c
+@@ -54,11 +54,6 @@ static void ath9k_hw_init_cal_settings(s
+ ath9k_hw_private_ops(ah)->init_cal_settings(ah);
}
--static void ar9003_hw_set_diversity(struct ath_hw *ah, bool value)
+-static void ath9k_hw_init_mode_regs(struct ath_hw *ah)
-{
-- u32 v = REG_READ(ah, AR_PHY_CCK_DETECT);
-- if (value)
-- v |= AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
-- else
-- v &= ~AR_PHY_CCK_DETECT_BB_ENABLE_ANT_FAST_DIV;
-- REG_WRITE(ah, AR_PHY_CCK_DETECT, v);
+- ath9k_hw_private_ops(ah)->init_mode_regs(ah);
-}
-
- static bool ar9003_hw_ani_control(struct ath_hw *ah,
- enum ath9k_ani_cmd cmd, int param)
+ static u32 ath9k_hw_compute_pll_control(struct ath_hw *ah,
+ struct ath9k_channel *chan)
{
-@@ -1277,7 +1270,6 @@ void ar9003_hw_attach_phy_ops(struct ath
- priv_ops->set_delta_slope = ar9003_hw_set_delta_slope;
- priv_ops->rfbus_req = ar9003_hw_rfbus_req;
- priv_ops->rfbus_done = ar9003_hw_rfbus_done;
-- priv_ops->set_diversity = ar9003_hw_set_diversity;
- priv_ops->ani_control = ar9003_hw_ani_control;
- priv_ops->do_getnf = ar9003_hw_do_getnf;
- priv_ops->ani_cache_ini_regs = ar9003_hw_ani_cache_ini_regs;
---- a/drivers/net/wireless/ath/ath9k/eeprom.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom.c
-@@ -456,12 +456,7 @@ void ath9k_hw_get_gain_boundaries_pdadcs
- pPdGainBoundaries[i] =
- min((u16)MAX_RATE_POWER, pPdGainBoundaries[i]);
-
-- if ((i == 0) && !AR_SREV_5416_20_OR_LATER(ah)) {
-- minDelta = pPdGainBoundaries[0] - 23;
-- pPdGainBoundaries[0] = 23;
-- } else {
-- minDelta = 0;
-- }
-+ minDelta = 0;
-
- if (i == 0) {
- if (AR_SREV_9280_20_OR_LATER(ah))
---- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c
-@@ -405,12 +405,7 @@ static void ath9k_hw_set_4k_power_cal_ta
- REG_RMW_FIELD(ah, AR_PHY_TPCRG1, AR_PHY_TPCRG1_PD_GAIN_3, 0);
-
- for (i = 0; i < AR5416_EEP4K_MAX_CHAINS; i++) {
-- if (AR_SREV_5416_20_OR_LATER(ah) &&
-- (ah->rxchainmask == 5 || ah->txchainmask == 5) &&
-- (i != 0)) {
-- regChainOffset = (i == 1) ? 0x2000 : 0x1000;
-- } else
-- regChainOffset = i * 0x1000;
-+ regChainOffset = i * 0x1000;
-
- if (pEepData->baseEepHeader.txMask & (1 << i)) {
- pRawDataset = pEepData->calPierData2G[i];
-@@ -423,19 +418,17 @@ static void ath9k_hw_set_4k_power_cal_ta
-
- ENABLE_REGWRITE_BUFFER(ah);
-
-- if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) {
-- REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset,
-- SM(pdGainOverlap_t2,
-- AR_PHY_TPCRG5_PD_GAIN_OVERLAP)
-- | SM(gainBoundaries[0],
-- AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1)
-- | SM(gainBoundaries[1],
-- AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2)
-- | SM(gainBoundaries[2],
-- AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3)
-- | SM(gainBoundaries[3],
-- AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
-- }
-+ REG_WRITE(ah, AR_PHY_TPCRG5 + regChainOffset,
-+ SM(pdGainOverlap_t2,
-+ AR_PHY_TPCRG5_PD_GAIN_OVERLAP)
-+ | SM(gainBoundaries[0],
-+ AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_1)
-+ | SM(gainBoundaries[1],
-+ AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_2)
-+ | SM(gainBoundaries[2],
-+ AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_3)
-+ | SM(gainBoundaries[3],
-+ AR_PHY_TPCRG5_PD_GAIN_BOUNDARY_4));
-
- regOffset = AR_PHY_BASE + (672 << 2) + regChainOffset;
- for (j = 0; j < 32; j++) {
-@@ -715,10 +708,8 @@ static void ath9k_hw_4k_set_txpower(stru
- if (test)
- return;
-
-- if (AR_SREV_9280_20_OR_LATER(ah)) {
-- for (i = 0; i < Ar5416RateSize; i++)
-- ratesArray[i] -= AR5416_PWR_TABLE_OFFSET_DB * 2;
-- }
-+ for (i = 0; i < Ar5416RateSize; i++)
-+ ratesArray[i] -= AR5416_PWR_TABLE_OFFSET_DB * 2;
+@@ -208,7 +203,7 @@ void ath9k_hw_synth_delay(struct ath_hw
+ udelay(hw_delay + BASE_ACTIVATE_DELAY);
+ }
- ENABLE_REGWRITE_BUFFER(ah);
+-void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array,
++void ath9k_hw_write_array(struct ath_hw *ah, const struct ar5416IniArray *array,
+ int column, unsigned int *writecnt)
+ {
+ int r;
+@@ -554,10 +549,8 @@ static int ath9k_hw_post_init(struct ath
+ ah->eep_ops->get_eeprom_ver(ah),
+ ah->eep_ops->get_eeprom_rev(ah));
+
+- if (ah->config.enable_ani) {
+- ath9k_hw_ani_setup(ah);
++ if (ah->config.enable_ani)
+ ath9k_hw_ani_init(ah);
+- }
-@@ -788,28 +779,6 @@ static void ath9k_hw_4k_set_txpower(stru
- REGWRITE_BUFFER_FLUSH(ah);
+ return 0;
}
+@@ -670,8 +663,6 @@ static int __ath9k_hw_init(struct ath_hw
+ if (!AR_SREV_9300_20_OR_LATER(ah))
+ ah->ani_function &= ~ATH9K_ANI_MRC_CCK;
--static void ath9k_hw_4k_set_addac(struct ath_hw *ah,
-- struct ath9k_channel *chan)
--{
-- struct modal_eep_4k_header *pModal;
-- struct ar5416_eeprom_4k *eep = &ah->eeprom.map4k;
-- u8 biaslevel;
+- ath9k_hw_init_mode_regs(ah);
-
-- if (ah->hw_version.macVersion != AR_SREV_VERSION_9160)
-- return;
+ if (!ah->is_pciexpress)
+ ath9k_hw_disablepcie(ah);
+
+--- a/drivers/net/wireless/ath/ath9k/hw.h
++++ b/drivers/net/wireless/ath/ath9k/hw.h
+@@ -599,7 +599,6 @@ struct ath_hw_radar_conf {
+ * @init_cal_settings: setup types of calibrations supported
+ * @init_cal: starts actual calibration
+ *
+- * @init_mode_regs: Initializes mode registers
+ * @init_mode_gain_regs: Initialize TX/RX gain registers
+ *
+ * @rf_set_freq: change frequency
+@@ -618,7 +617,6 @@ struct ath_hw_private_ops {
+ void (*init_cal_settings)(struct ath_hw *ah);
+ bool (*init_cal)(struct ath_hw *ah, struct ath9k_channel *chan);
+
+- void (*init_mode_regs)(struct ath_hw *ah);
+ void (*init_mode_gain_regs)(struct ath_hw *ah);
+ void (*setup_calibration)(struct ath_hw *ah,
+ struct ath9k_cal_list *currCal);
+@@ -810,14 +808,7 @@ struct ath_hw {
+ struct ath_hw_ops ops;
+
+ /* Used to program the radio on non single-chip devices */
+- u32 *analogBank0Data;
+- u32 *analogBank1Data;
+- u32 *analogBank2Data;
+- u32 *analogBank3Data;
+ u32 *analogBank6Data;
+- u32 *analogBank6TPCData;
+- u32 *analogBank7Data;
+- u32 *bank6Temp;
+
+ int coverage_class;
+ u32 slottime;
+@@ -826,10 +817,6 @@ struct ath_hw {
+ /* ANI */
+ u32 proc_phyerr;
+ u32 aniperiod;
+- int totalSizeDesired[5];
+- int coarse_high[5];
+- int coarse_low[5];
+- int firpwr[5];
+ enum ath9k_ani_cmd ani_function;
+ u32 ani_skip_count;
+
+@@ -852,14 +839,8 @@ struct ath_hw {
+
+ struct ar5416IniArray iniModes;
+ struct ar5416IniArray iniCommon;
+- struct ar5416IniArray iniBank0;
+ struct ar5416IniArray iniBB_RfGain;
+- struct ar5416IniArray iniBank1;
+- struct ar5416IniArray iniBank2;
+- struct ar5416IniArray iniBank3;
+ struct ar5416IniArray iniBank6;
+- struct ar5416IniArray iniBank6TPC;
+- struct ar5416IniArray iniBank7;
+ struct ar5416IniArray iniAddac;
+ struct ar5416IniArray iniPcieSerdes;
+ #ifdef CONFIG_PM_SLEEP
+@@ -975,7 +956,7 @@ void ath9k_hw_setantenna(struct ath_hw *
+ void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan,
+ int hw_delay);
+ bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout);
+-void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array,
++void ath9k_hw_write_array(struct ath_hw *ah, const struct ar5416IniArray *array,
+ int column, unsigned int *writecnt);
+ u32 ath9k_hw_reverse_bits(u32 val, u32 n);
+ u16 ath9k_hw_computetxtime(struct ath_hw *ah,
+@@ -1062,6 +1043,7 @@ void ar9003_paprd_setup_gain_table(struc
+ int ar9003_paprd_init_table(struct ath_hw *ah);
+ bool ar9003_paprd_is_done(struct ath_hw *ah);
+ bool ar9003_is_paprd_enabled(struct ath_hw *ah);
++void ar9003_hw_set_chain_masks(struct ath_hw *ah, u8 rx, u8 tx);
+
+ /* Hardware family op attach helpers */
+ int ar5008_hw_attach_phy_ops(struct ath_hw *ah);
+--- a/net/mac80211/tx.c
++++ b/net/mac80211/tx.c
+@@ -1677,10 +1677,10 @@ netdev_tx_t ieee80211_monitor_start_xmit
+ chanctx_conf =
+ rcu_dereference(tmp_sdata->vif.chanctx_conf);
+ }
+- if (!chanctx_conf)
+- goto fail_rcu;
-
-- if (ah->eep_ops->get_eeprom_rev(ah) < AR5416_EEP_MINOR_VER_7)
+- chan = chanctx_conf->def.chan;
++ if (chanctx_conf)
++ chan = chanctx_conf->def.chan;
++ else
++ chan = local->_oper_channel;
+
+ /*
+ * Frame injection is not allowed if beaconing is not allowed
+--- a/drivers/net/wireless/ath/ath9k/ani.c
++++ b/drivers/net/wireless/ath/ath9k/ani.c
+@@ -152,7 +152,8 @@ static void ath9k_hw_set_ofdm_nil(struct
+ ath_dbg(common, ANI, "**** ofdmlevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
+ aniState->ofdmNoiseImmunityLevel,
+ immunityLevel, BEACON_RSSI(ah),
+- aniState->rssiThrLow, aniState->rssiThrHigh);
++ ATH9K_ANI_RSSI_THR_LOW,
++ ATH9K_ANI_RSSI_THR_HIGH);
+
+ if (!scan)
+ aniState->ofdmNoiseImmunityLevel = immunityLevel;
+@@ -173,7 +174,7 @@ static void ath9k_hw_set_ofdm_nil(struct
+
+ weak_sig = entry_ofdm->ofdm_weak_signal_on;
+ if (ah->opmode == NL80211_IFTYPE_STATION &&
+- BEACON_RSSI(ah) <= aniState->rssiThrHigh)
++ BEACON_RSSI(ah) <= ATH9K_ANI_RSSI_THR_HIGH)
+ weak_sig = true;
+
+ if (aniState->ofdmWeakSigDetect != weak_sig)
+@@ -216,11 +217,11 @@ static void ath9k_hw_set_cck_nil(struct
+
+ ath_dbg(common, ANI, "**** ccklevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
+ aniState->cckNoiseImmunityLevel, immunityLevel,
+- BEACON_RSSI(ah), aniState->rssiThrLow,
+- aniState->rssiThrHigh);
++ BEACON_RSSI(ah), ATH9K_ANI_RSSI_THR_LOW,
++ ATH9K_ANI_RSSI_THR_HIGH);
+
+ if (ah->opmode == NL80211_IFTYPE_STATION &&
+- BEACON_RSSI(ah) <= aniState->rssiThrLow &&
++ BEACON_RSSI(ah) <= ATH9K_ANI_RSSI_THR_LOW &&
+ immunityLevel > ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI)
+ immunityLevel = ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI;
+
+@@ -418,9 +419,6 @@ void ath9k_hw_ani_monitor(struct ath_hw
+ return;
+
+ aniState = &ah->curchan->ani;
+- if (WARN_ON(!aniState))
- return;
-
-- pModal = &eep->modalHeader;
--
-- if (pModal->xpaBiasLvl != 0xff) {
-- biaslevel = pModal->xpaBiasLvl;
-- INI_RA(&ah->iniAddac, 7, 1) =
-- (INI_RA(&ah->iniAddac, 7, 1) & (~0x18)) | biaslevel << 3;
+ if (!ath9k_hw_ani_read_counters(ah))
+ return;
+
+@@ -489,23 +487,6 @@ void ath9k_hw_disable_mib_counters(struc
+ }
+ EXPORT_SYMBOL(ath9k_hw_disable_mib_counters);
+
+-void ath9k_hw_ani_setup(struct ath_hw *ah)
+-{
+- int i;
+-
+- static const int totalSizeDesired[] = { -55, -55, -55, -55, -62 };
+- static const int coarseHigh[] = { -14, -14, -14, -14, -12 };
+- static const int coarseLow[] = { -64, -64, -64, -64, -70 };
+- static const int firpwr[] = { -78, -78, -78, -78, -80 };
+-
+- for (i = 0; i < 5; i++) {
+- ah->totalSizeDesired[i] = totalSizeDesired[i];
+- ah->coarse_high[i] = coarseHigh[i];
+- ah->coarse_low[i] = coarseLow[i];
+- ah->firpwr[i] = firpwr[i];
- }
-}
-
- static void ath9k_hw_4k_set_gain(struct ath_hw *ah,
- struct modal_eep_4k_header *pModal,
- struct ar5416_eeprom_4k *eep,
-@@ -877,6 +846,7 @@ static void ath9k_hw_4k_set_board_values
- u8 txRxAttenLocal;
- u8 ob[5], db1[5], db2[5];
- u8 ant_div_control1, ant_div_control2;
-+ u8 bb_desired_scale;
- u32 regVal;
-
- pModal = &eep->modalHeader;
-@@ -1096,30 +1066,29 @@ static void ath9k_hw_4k_set_board_values
- AR_PHY_SETTLING_SWITCH,
- pModal->swSettleHt40);
- }
-- if (AR_SREV_9271(ah) || AR_SREV_9285(ah)) {
-- u8 bb_desired_scale = (pModal->bb_scale_smrt_antenna &
-- EEP_4K_BB_DESIRED_SCALE_MASK);
-- if ((pBase->txGainType == 0) && (bb_desired_scale != 0)) {
-- u32 pwrctrl, mask, clr;
--
-- mask = BIT(0)|BIT(5)|BIT(10)|BIT(15)|BIT(20)|BIT(25);
-- pwrctrl = mask * bb_desired_scale;
-- clr = mask * 0x1f;
-- REG_RMW(ah, AR_PHY_TX_PWRCTRL8, pwrctrl, clr);
-- REG_RMW(ah, AR_PHY_TX_PWRCTRL10, pwrctrl, clr);
-- REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL12, pwrctrl, clr);
--
-- mask = BIT(0)|BIT(5)|BIT(15);
-- pwrctrl = mask * bb_desired_scale;
-- clr = mask * 0x1f;
-- REG_RMW(ah, AR_PHY_TX_PWRCTRL9, pwrctrl, clr);
--
-- mask = BIT(0)|BIT(5);
-- pwrctrl = mask * bb_desired_scale;
-- clr = mask * 0x1f;
-- REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL11, pwrctrl, clr);
-- REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL13, pwrctrl, clr);
-- }
-+
-+ bb_desired_scale = (pModal->bb_scale_smrt_antenna &
-+ EEP_4K_BB_DESIRED_SCALE_MASK);
-+ if ((pBase->txGainType == 0) && (bb_desired_scale != 0)) {
-+ u32 pwrctrl, mask, clr;
-+
-+ mask = BIT(0)|BIT(5)|BIT(10)|BIT(15)|BIT(20)|BIT(25);
-+ pwrctrl = mask * bb_desired_scale;
-+ clr = mask * 0x1f;
-+ REG_RMW(ah, AR_PHY_TX_PWRCTRL8, pwrctrl, clr);
-+ REG_RMW(ah, AR_PHY_TX_PWRCTRL10, pwrctrl, clr);
-+ REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL12, pwrctrl, clr);
-+
-+ mask = BIT(0)|BIT(5)|BIT(15);
-+ pwrctrl = mask * bb_desired_scale;
-+ clr = mask * 0x1f;
-+ REG_RMW(ah, AR_PHY_TX_PWRCTRL9, pwrctrl, clr);
-+
-+ mask = BIT(0)|BIT(5);
-+ pwrctrl = mask * bb_desired_scale;
-+ clr = mask * 0x1f;
-+ REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL11, pwrctrl, clr);
-+ REG_RMW(ah, AR_PHY_CH0_TX_PWRCTRL13, pwrctrl, clr);
- }
- }
+ void ath9k_hw_ani_init(struct ath_hw *ah)
+ {
+ struct ath_common *common = ath9k_hw_common(ah);
+@@ -531,8 +512,6 @@ void ath9k_hw_ani_init(struct ath_hw *ah
+
+ ani->ofdmsTurn = true;
+
+- ani->rssiThrHigh = ATH9K_ANI_RSSI_THR_HIGH;
+- ani->rssiThrLow = ATH9K_ANI_RSSI_THR_LOW;
+ ani->ofdmWeakSigDetect = ATH9K_ANI_USE_OFDM_WEAK_SIG;
+ ani->cckNoiseImmunityLevel = ATH9K_ANI_CCK_DEF_LEVEL;
+ ani->ofdmNoiseImmunityLevel = ATH9K_ANI_OFDM_DEF_LEVEL;
+--- a/drivers/net/wireless/ath/ath9k/ani.h
++++ b/drivers/net/wireless/ath/ath9k/ani.h
+@@ -104,7 +104,6 @@ struct ath9k_ani_default {
+ };
-@@ -1161,7 +1130,6 @@ const struct eeprom_ops eep_4k_ops = {
- .get_eeprom_ver = ath9k_hw_4k_get_eeprom_ver,
- .get_eeprom_rev = ath9k_hw_4k_get_eeprom_rev,
- .set_board_values = ath9k_hw_4k_set_board_values,
-- .set_addac = ath9k_hw_4k_set_addac,
- .set_txpower = ath9k_hw_4k_set_txpower,
- .get_spur_channel = ath9k_hw_4k_get_spur_channel
+ struct ar5416AniState {
+- struct ath9k_channel *c;
+ u8 noiseImmunityLevel;
+ u8 ofdmNoiseImmunityLevel;
+ u8 cckNoiseImmunityLevel;
+@@ -113,15 +112,9 @@ struct ar5416AniState {
+ u8 spurImmunityLevel;
+ u8 firstepLevel;
+ u8 ofdmWeakSigDetect;
+- u8 cckWeakSigThreshold;
+ u32 listenTime;
+- int32_t rssiThrLow;
+- int32_t rssiThrHigh;
+ u32 ofdmPhyErrCount;
+ u32 cckPhyErrCount;
+- int16_t pktRssi[2];
+- int16_t ofdmErrRssi[2];
+- int16_t cckErrRssi[2];
+ struct ath9k_ani_default iniDef;
};
---- a/drivers/net/wireless/ath/ath9k/eeprom_9287.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom_9287.c
-@@ -851,10 +851,8 @@ static void ath9k_hw_ar9287_set_txpower(
- if (test)
- return;
-- if (AR_SREV_9280_20_OR_LATER(ah)) {
-- for (i = 0; i < Ar5416RateSize; i++)
-- ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2;
-- }
-+ for (i = 0; i < Ar5416RateSize; i++)
-+ ratesArray[i] -= AR9287_PWR_TABLE_OFFSET_DB * 2;
+@@ -147,7 +140,6 @@ struct ar5416Stats {
- ENABLE_REGWRITE_BUFFER(ah);
+ void ath9k_enable_mib_counters(struct ath_hw *ah);
+ void ath9k_hw_disable_mib_counters(struct ath_hw *ah);
+-void ath9k_hw_ani_setup(struct ath_hw *ah);
+ void ath9k_hw_ani_init(struct ath_hw *ah);
+
+ #endif /* ANI_H */
+--- a/drivers/net/wireless/ath/ath9k/calib.h
++++ b/drivers/net/wireless/ath/ath9k/calib.h
+@@ -33,6 +33,12 @@ struct ar5416IniArray {
+ u32 ia_columns;
+ };
+
++#define STATIC_INI_ARRAY(array) { \
++ .ia_array = (u32 *)(array), \
++ .ia_rows = ARRAY_SIZE(array), \
++ .ia_columns = ARRAY_SIZE(array[0]), \
++ }
++
+ #define INIT_INI_ARRAY(iniarray, array) do { \
+ (iniarray)->ia_array = (u32 *)(array); \
+ (iniarray)->ia_rows = ARRAY_SIZE(array); \
+--- a/drivers/net/wireless/ath/ath9k/xmit.c
++++ b/drivers/net/wireless/ath/ath9k/xmit.c
+@@ -378,7 +378,7 @@ static void ath_tx_count_frames(struct a
-@@ -944,11 +942,6 @@ static void ath9k_hw_ar9287_set_txpower(
- REGWRITE_BUFFER_FLUSH(ah);
+ static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
+ struct ath_buf *bf, struct list_head *bf_q,
+- struct ath_tx_status *ts, int txok, bool retry)
++ struct ath_tx_status *ts, int txok)
+ {
+ struct ath_node *an = NULL;
+ struct sk_buff *skb;
+@@ -490,7 +490,7 @@ static void ath_tx_complete_aggr(struct
+ } else if (!isaggr && txok) {
+ /* transmit completion */
+ acked_cnt++;
+- } else if ((tid->state & AGGR_CLEANUP) || !retry) {
++ } else if (tid->state & AGGR_CLEANUP) {
+ /*
+ * cleanup in progress, just fail
+ * the un-acked sub-frames
+@@ -604,6 +604,37 @@ static void ath_tx_complete_aggr(struct
+ ath9k_queue_reset(sc, RESET_TYPE_TX_ERROR);
}
--static void ath9k_hw_ar9287_set_addac(struct ath_hw *ah,
-- struct ath9k_channel *chan)
++static bool bf_is_ampdu_not_probing(struct ath_buf *bf)
++{
++ struct ieee80211_tx_info *info = IEEE80211_SKB_CB(bf->bf_mpdu);
++ return bf_isampdu(bf) && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
++}
++
++static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
++ struct ath_tx_status *ts, struct ath_buf *bf,
++ struct list_head *bf_head)
++{
++ bool txok, flush;
++
++ txok = !(ts->ts_status & ATH9K_TXERR_MASK);
++ flush = !!(ts->ts_status & ATH9K_TX_FLUSH);
++ txq->axq_tx_inprogress = false;
++
++ txq->axq_depth--;
++ if (bf_is_ampdu_not_probing(bf))
++ txq->axq_ampdu_depth--;
++
++ if (!bf_isampdu(bf)) {
++ if (!flush)
++ ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok);
++ ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok);
++ } else
++ ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok);
++
++ if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) && !flush)
++ ath_txq_schedule(sc, txq);
++}
++
+ static bool ath_lookup_legacy(struct ath_buf *bf)
+ {
+ struct sk_buff *skb;
+@@ -1331,23 +1362,6 @@ void ath_tx_aggr_resume(struct ath_softc
+ /* Queue Management */
+ /********************/
+
+-static void ath_txq_drain_pending_buffers(struct ath_softc *sc,
+- struct ath_txq *txq)
-{
+- struct ath_atx_ac *ac, *ac_tmp;
+- struct ath_atx_tid *tid, *tid_tmp;
+-
+- list_for_each_entry_safe(ac, ac_tmp, &txq->axq_acq, list) {
+- list_del(&ac->list);
+- ac->sched = false;
+- list_for_each_entry_safe(tid, tid_tmp, &ac->tid_q, list) {
+- list_del(&tid->list);
+- tid->sched = false;
+- ath_tid_drain(sc, txq, tid);
+- }
+- }
-}
-
- static void ath9k_hw_ar9287_set_board_values(struct ath_hw *ah,
- struct ath9k_channel *chan)
+ struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
{
-@@ -1100,7 +1093,6 @@ const struct eeprom_ops eep_ar9287_ops =
- .get_eeprom_ver = ath9k_hw_ar9287_get_eeprom_ver,
- .get_eeprom_rev = ath9k_hw_ar9287_get_eeprom_rev,
- .set_board_values = ath9k_hw_ar9287_set_board_values,
-- .set_addac = ath9k_hw_ar9287_set_addac,
- .set_txpower = ath9k_hw_ar9287_set_txpower,
- .get_spur_channel = ath9k_hw_ar9287_get_spur_channel
- };
---- a/drivers/net/wireless/ath/ath9k/eeprom_def.c
-+++ b/drivers/net/wireless/ath/ath9k/eeprom_def.c
-@@ -547,8 +547,7 @@ static void ath9k_hw_def_set_board_value
- break;
- }
-
-- if (AR_SREV_5416_20_OR_LATER(ah) &&
-- (ah->rxchainmask == 5 || ah->txchainmask == 5) && (i != 0))
-+ if ((ah->rxchainmask == 5 || ah->txchainmask == 5) && (i != 0))
- regChainOffset = (i == 1) ? 0x2000 : 0x1000;
- else
- regChainOffset = i * 0x1000;
-@@ -565,9 +564,8 @@ static void ath9k_hw_def_set_board_value
- SM(pModal->iqCalQCh[i],
- AR_PHY_TIMING_CTRL4_IQCORR_Q_Q_COFF));
-
-- if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah))
-- ath9k_hw_def_set_gain(ah, pModal, eep, txRxAttenLocal,
-- regChainOffset, i);
-+ ath9k_hw_def_set_gain(ah, pModal, eep, txRxAttenLocal,
-+ regChainOffset, i);
- }
-
- if (AR_SREV_9280_20_OR_LATER(ah)) {
-@@ -893,8 +891,7 @@ static void ath9k_hw_set_def_power_cal_t
- xpdGainValues[2]);
-
- for (i = 0; i < AR5416_MAX_CHAINS; i++) {
-- if (AR_SREV_5416_20_OR_LATER(ah) &&
-- (ah->rxchainmask == 5 || ah->txchainmask == 5) &&
-+ if ((ah->rxchainmask == 5 || ah->txchainmask == 5) &&
- (i != 0)) {
- regChainOffset = (i == 1) ? 0x2000 : 0x1000;
- } else
-@@ -935,27 +932,24 @@ static void ath9k_hw_set_def_power_cal_t
-
- ENABLE_REGWRITE_BUFFER(ah);
-
-- if ((i == 0) || AR_SREV_5416_20_OR_LATER(ah)) {
-- if (OLC_FOR_AR9280_20_LATER) {
-- REG_WRITE(ah,
-- AR_PHY_TPCRG5 + regChainOffset,
-- SM(0x6,
-- AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
-- SM_PD_GAIN(1) | SM_PD_GAIN(2) |
-- SM_PD_GAIN(3) | SM_PD_GAIN(4));
-- } else {
-- REG_WRITE(ah,
-- AR_PHY_TPCRG5 + regChainOffset,
-- SM(pdGainOverlap_t2,
-- AR_PHY_TPCRG5_PD_GAIN_OVERLAP)|
-- SM_PDGAIN_B(0, 1) |
-- SM_PDGAIN_B(1, 2) |
-- SM_PDGAIN_B(2, 3) |
-- SM_PDGAIN_B(3, 4));
-- }
-+ if (OLC_FOR_AR9280_20_LATER) {
-+ REG_WRITE(ah,
-+ AR_PHY_TPCRG5 + regChainOffset,
-+ SM(0x6,
-+ AR_PHY_TPCRG5_PD_GAIN_OVERLAP) |
-+ SM_PD_GAIN(1) | SM_PD_GAIN(2) |
-+ SM_PD_GAIN(3) | SM_PD_GAIN(4));
-+ } else {
-+ REG_WRITE(ah,
-+ AR_PHY_TPCRG5 + regChainOffset,
-+ SM(pdGainOverlap_t2,
-+ AR_PHY_TPCRG5_PD_GAIN_OVERLAP)|
-+ SM_PDGAIN_B(0, 1) |
-+ SM_PDGAIN_B(1, 2) |
-+ SM_PDGAIN_B(2, 3) |
-+ SM_PDGAIN_B(3, 4));
- }
+ struct ath_hw *ah = sc->sc_ah;
+@@ -1470,14 +1484,8 @@ int ath_cabq_update(struct ath_softc *sc
+ return 0;
+ }
+-static bool bf_is_ampdu_not_probing(struct ath_buf *bf)
+-{
+- struct ieee80211_tx_info *info = IEEE80211_SKB_CB(bf->bf_mpdu);
+- return bf_isampdu(bf) && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
+-}
-
- ath9k_adjust_pdadc_values(ah, pwr_table_offset,
- diff, pdadcValues);
+ static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq,
+- struct list_head *list, bool retry_tx)
++ struct list_head *list)
+ {
+ struct ath_buf *bf, *lastbf;
+ struct list_head bf_head;
+@@ -1499,16 +1507,7 @@ static void ath_drain_txq_list(struct at
---- a/drivers/net/wireless/ath/ath9k/init.c
-+++ b/drivers/net/wireless/ath/ath9k/init.c
-@@ -506,7 +506,6 @@ static void ath9k_init_misc(struct ath_s
- sc->sc_flags |= SC_OP_RXAGGR;
+ lastbf = bf->bf_lastbf;
+ list_cut_position(&bf_head, list, &lastbf->list);
+-
+- txq->axq_depth--;
+- if (bf_is_ampdu_not_probing(bf))
+- txq->axq_ampdu_depth--;
+-
+- if (bf_isampdu(bf))
+- ath_tx_complete_aggr(sc, txq, bf, &bf_head, &ts, 0,
+- retry_tx);
+- else
+- ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0);
++ ath_tx_process_buffer(sc, txq, &ts, bf, &bf_head);
}
+ }
-- ath9k_hw_set_diversity(sc->sc_ah, true);
- sc->rx.defant = ath9k_hw_getdefantenna(sc->sc_ah);
+@@ -1518,7 +1517,7 @@ static void ath_drain_txq_list(struct at
+ * This assumes output has been stopped and
+ * we do not need to block ath_tx_tasklet.
+ */
+-void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
++void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq)
+ {
+ ath_txq_lock(sc, txq);
- memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
---- a/drivers/net/wireless/ath/ath9k/reg.h
-+++ b/drivers/net/wireless/ath/ath9k/reg.h
-@@ -800,10 +800,6 @@
- #define AR_SREV_5416(_ah) \
- (((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \
- ((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCIE))
--#define AR_SREV_5416_20_OR_LATER(_ah) \
-- (((AR_SREV_5416(_ah)) && \
-- ((_ah)->hw_version.macRev >= AR_SREV_REVISION_5416_20)) || \
-- ((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9100))
- #define AR_SREV_5416_22_OR_LATER(_ah) \
- (((AR_SREV_5416(_ah)) && \
- ((_ah)->hw_version.macRev >= AR_SREV_REVISION_5416_22)) || \
---- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c
-@@ -869,6 +869,7 @@ static bool ar9002_hw_init_cal(struct at
- ar9002_hw_pa_cal(ah, true);
-
- /* Do NF Calibration after DC offset and other calibrations */
-+ ath9k_hw_loadnf(ah, chan);
- ath9k_hw_start_nfcal(ah, true);
-
- if (ah->caldata)
---- a/net/mac80211/ieee80211_i.h
-+++ b/net/mac80211/ieee80211_i.h
-@@ -671,7 +671,6 @@ enum queue_stop_reason {
- IEEE80211_QUEUE_STOP_REASON_AGGREGATION,
- IEEE80211_QUEUE_STOP_REASON_SUSPEND,
- IEEE80211_QUEUE_STOP_REASON_SKB_ADD,
-- IEEE80211_QUEUE_STOP_REASON_CHTYPE_CHANGE,
- };
+@@ -1526,8 +1525,7 @@ void ath_draintxq(struct ath_softc *sc,
+ int idx = txq->txq_tailidx;
- #ifdef CONFIG_MAC80211_LEDS
---- a/net/mac80211/mlme.c
-+++ b/net/mac80211/mlme.c
-@@ -1921,24 +1921,8 @@ static void ieee80211_rx_mgmt_beacon(str
+ while (!list_empty(&txq->txq_fifo[idx])) {
+- ath_drain_txq_list(sc, txq, &txq->txq_fifo[idx],
+- retry_tx);
++ ath_drain_txq_list(sc, txq, &txq->txq_fifo[idx]);
- rcu_read_unlock();
+ INCR(idx, ATH_TXFIFO_DEPTH);
+ }
+@@ -1536,16 +1534,12 @@ void ath_draintxq(struct ath_softc *sc,
-- /*
-- * Whenever the AP announces the HT mode change that can be
-- * 40MHz intolerant or etc., it would be safer to stop tx
-- * queues before doing hw config to avoid buffer overflow.
-- */
-- ieee80211_stop_queues_by_reason(&sdata->local->hw,
-- IEEE80211_QUEUE_STOP_REASON_CHTYPE_CHANGE);
--
-- /* flush out all packets */
-- synchronize_net();
--
-- drv_flush(local, false);
+ txq->axq_link = NULL;
+ txq->axq_tx_inprogress = false;
+- ath_drain_txq_list(sc, txq, &txq->axq_q, retry_tx);
-
- changed |= ieee80211_enable_ht(sdata, elems.ht_info_elem,
- bssid, ap_ht_cap_flags);
--
-- ieee80211_wake_queues_by_reason(&sdata->local->hw,
-- IEEE80211_QUEUE_STOP_REASON_CHTYPE_CHANGE);
- }
+- /* flush any pending frames if aggregation is enabled */
+- if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) && !retry_tx)
+- ath_txq_drain_pending_buffers(sc, txq);
++ ath_drain_txq_list(sc, txq, &txq->axq_q);
- /* Note: country IE parsing is done for us by cfg80211 */
---- a/drivers/net/wireless/b43/main.c
-+++ b/drivers/net/wireless/b43/main.c
-@@ -1613,7 +1613,8 @@ static void handle_irq_beacon(struct b43
- u32 cmd, beacon0_valid, beacon1_valid;
+ ath_txq_unlock_complete(sc, txq);
+ }
- if (!b43_is_mode(wl, NL80211_IFTYPE_AP) &&
-- !b43_is_mode(wl, NL80211_IFTYPE_MESH_POINT))
-+ !b43_is_mode(wl, NL80211_IFTYPE_MESH_POINT) &&
-+ !b43_is_mode(wl, NL80211_IFTYPE_ADHOC))
- return;
+-bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx)
++bool ath_drain_all_txq(struct ath_softc *sc)
+ {
+ struct ath_hw *ah = sc->sc_ah;
+ struct ath_common *common = ath9k_hw_common(sc->sc_ah);
+@@ -1581,7 +1575,7 @@ bool ath_drain_all_txq(struct ath_softc
+ */
+ txq = &sc->tx.txq[i];
+ txq->stopped = false;
+- ath_draintxq(sc, txq, retry_tx);
++ ath_draintxq(sc, txq);
+ }
+
+ return !npend;
+@@ -2175,28 +2169,6 @@ static void ath_tx_rc_status(struct ath_
+ tx_info->status.rates[tx_rateindex].count = ts->ts_longretry + 1;
+ }
- /* This is the bottom half of the asynchronous beacon update. */
+-static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
+- struct ath_tx_status *ts, struct ath_buf *bf,
+- struct list_head *bf_head)
+-{
+- int txok;
+-
+- txq->axq_depth--;
+- txok = !(ts->ts_status & ATH9K_TXERR_MASK);
+- txq->axq_tx_inprogress = false;
+- if (bf_is_ampdu_not_probing(bf))
+- txq->axq_ampdu_depth--;
+-
+- if (!bf_isampdu(bf)) {
+- ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok);
+- ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok);
+- } else
+- ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok, true);
+-
+- if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
+- ath_txq_schedule(sc, txq);
+-}
+-
+ static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
+ {
+ struct ath_hw *ah = sc->sc_ah;
projects / openwrt.git / blobdiff