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imx6: update patches
[openwrt.git]
/
target
/
linux
/
imx6
/
patches-3.12
/
0007-ARM-dts-added-several-new-imx-pinmux-groups.patch
diff --git
a/target/linux/imx6/patches-3.12/0007-ARM-dts-added-several-new-imx-pinmux-groups.patch
b/target/linux/imx6/patches-3.12/0007-ARM-dts-added-several-new-imx-pinmux-groups.patch
index 105cb71162ff22ceb4953883cc8b91cd73478b1b..5ec38ceef91b04a1a0f06412030d9844d6c77935 100644
(file)
--- a/
target/linux/imx6/patches-3.12/0007-ARM-dts-added-several-new-imx-pinmux-groups.patch
+++ b/
target/linux/imx6/patches-3.12/0007-ARM-dts-added-several-new-imx-pinmux-groups.patch
@@
-11,7
+11,7
@@
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
-@@ -6
39,6 +639
,14 @@
+@@ -6
22,6 +622
,14 @@
MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x80000000
>;
};
MX6QDL_PAD_DISP0_DAT19__AUD5_RXD 0x80000000
>;
};
@@
-26,7
+26,7
@@
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
};
ecspi1 {
};
ecspi1 {
-@@ -
811,6 +819
,28 @@
+@@ -
794,6 +802
,28 @@
MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
>;
};
MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
>;
};
@@
-55,7
+55,7
@@
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
};
hdmi_hdcp {
};
hdmi_hdcp {
-@@ -10
58,6 +1088
,13 @@
+@@ -10
35,6 +1065
,13 @@
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
>;
};
@@
-69,7
+69,7
@@
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
};
uart2 {
};
uart2 {
-@@ -10
76,6 +1113
,13 @@
+@@ -10
53,6 +1090
,13 @@
MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
>;
};
MX6QDL_PAD_EIM_D29__UART2_DTE_RTS_B 0x1b0b1
>;
};
@@
-83,7
+83,7
@@
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
};
uart3 {
};
uart3 {
-@@ -10
96,6 +1140
,13 @@
+@@ -10
73,6 +1117
,13 @@
MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
>;
};
MX6QDL_PAD_EIM_EB3__UART3_RTS_B 0x1b0b1
>;
};
@@
-97,10
+97,11
@@
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
};
uart4 {
};
uart4 {
-@@ -1107,6 +1158,15 @@
+@@ -1083,6 +1134,15 @@
+ >;
};
};
};
};
-
++
+ uart5 {
+ pinctrl_uart5_1: uart5grp-1 {
+ fsl,pins = <
+ uart5 {
+ pinctrl_uart5_1: uart5grp-1 {
+ fsl,pins = <
@@
-109,7
+110,6
@@
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
+ >;
+ };
+ };
+ >;
+ };
+ };
-+
+
usbotg {
pinctrl_usbotg_1: usbotggrp-1 {
usbotg {
pinctrl_usbotg_1: usbotggrp-1 {
- fsl,pins = <