target/linux/sunxi/patches-3.13/264-5-dt-sun7i-enable-spi-on-a20micro.patch

   1 From 5c5ac3fb749c64e7c1e6e3208fcabab065359f56 Mon Sep 17 00:00:00 2001
   2 From: Maxime Ripard <maxime.ripard@free-electrons.com>
   3 Date: Sat, 22 Feb 2014 22:35:59 +0100
   4 Subject: [PATCH] ARM: dts: sun7i: Enable the SPI controllers of the
   5  A20-olinuxino-micro
   6
   7 The A20-Olinuxino-micro has two SPI bus exposed on its UEXT connectors, enable
   8 them.
   9
  10 Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
  11 ---
  12  arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 17 +++++++++++++++++
  13  1 file changed, 17 insertions(+)
  14
  15 diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
  16 index 824ce0a..68cedf3 100644
  17 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
  18 +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
  19 @@ -21,7 +21,24 @@
  20         model = "Olimex A20-Olinuxino Micro";
  21         compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20";
  22
  23 +       aliases {
  24 +               spi0 = &spi1;
  25 +               spi1 = &spi2;
  26 +       };
  27 +
  28         soc@01c00000 {
  29 +               spi1: spi@01c06000 {
  30 +                       pinctrl-names = "default";
  31 +                       pinctrl-0 = <&spi1_pins_a>;
  32 +                       status = "okay";
  33 +               };
  34 +
  35 +               spi2: spi@01c17000 {
  36 +                       pinctrl-names = "default";
  37 +                       pinctrl-0 = <&spi2_pins_a>;
  38 +                       status = "okay";
  39 +               };
  40 +
  41                 mmc0: mmc@01c0f000 {
  42                         pinctrl-names = "default", "default";
  43                         pinctrl-0 = <&mmc0_pins_a>;
  44 --
  45 1.8.5.5
  46