sunxi: various changes
[openwrt.git] / target / linux / sunxi / patches-3.13 / 173-3-dt-sun7i-add-mmc.patch
1 From a3bddfdd19c49f0bde7aa2ff496773c575763d07 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?David=20Lanzend=C3=B6rfer?= <david.lanzendoerfer@o2s.ch>
3 Date: Sat, 15 Feb 2014 14:02:01 +0100
4 Subject: [PATCH] ARM: dts: sun7i: Add support for mmc
5 MIME-Version: 1.0
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
8
9 Signed-off-by: David Lanzendörfer <david.lanzendoerfer@o2s.ch>
10 Signed-off-by: Hans de Goede <hdegoede@redhat.com>
11 ---
12  arch/arm/boot/dts/sun7i-a20-cubieboard2.dts     |  8 ++++
13  arch/arm/boot/dts/sun7i-a20-cubietruck.dts      |  8 ++++
14  arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts | 23 ++++++++++
15  arch/arm/boot/dts/sun7i-a20.dtsi                | 61 +++++++++++++++++++++++++
16  4 files changed, 100 insertions(+)
17
18 diff --git a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
19 index 07823c2..a8186f5 100644
20 --- a/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
21 +++ b/arch/arm/boot/dts/sun7i-a20-cubieboard2.dts
22 @@ -20,6 +20,14 @@
23         compatible = "cubietech,cubieboard2", "allwinner,sun7i-a20";
24  
25         soc@01c00000 {
26 +               mmc0: mmc@01c0f000 {
27 +                       pinctrl-names = "default", "default";
28 +                       pinctrl-0 = <&mmc0_pins_a>;
29 +                       pinctrl-1 = <&mmc0_cd_pin_reference_design>;
30 +                       cd-gpios = <&pio 7 1 0>; /* PH1 */
31 +                       status = "okay";
32 +               };
33 +
34                 ahci: sata@01c18000 {
35                         target-supply = <&reg_ahci_5v>;
36                         status = "okay";
37 diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
38 index 403bd2e..6cd7cca 100644
39 diff --git a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
40 index d5c6799..d4e2355 100644
41 --- a/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
42 +++ b/arch/arm/boot/dts/sun7i-a20-olinuxino-micro.dts
43 @@ -20,12 +20,35 @@
44         compatible = "olimex,a20-olinuxino-micro", "allwinner,sun7i-a20";
45  
46         soc@01c00000 {
47 +               mmc0: mmc@01c0f000 {
48 +                       pinctrl-names = "default", "default";
49 +                       pinctrl-0 = <&mmc0_pins_a>;
50 +                       pinctrl-1 = <&mmc0_cd_pin_reference_design>;
51 +                       cd-gpios = <&pio 7 1 0>; /* PH1 */
52 +                       status = "okay";
53 +               };
54 +
55 +               mmc3: mmc@01c12000 {
56 +                       pinctrl-names = "default", "default";
57 +                       pinctrl-0 = <&mmc3_pins_a>;
58 +                       pinctrl-1 = <&mmc3_cd_pin_olinuxinom>;
59 +                       cd-gpios = <&pio 7 11 0>; /* PH11 */
60 +                       status = "okay";
61 +               };
62 +
63                 ahci: sata@01c18000 {
64                         target-supply = <&reg_ahci_5v>;
65                         status = "okay";
66                 };
67  
68                 pinctrl@01c20800 {
69 +                       mmc3_cd_pin_olinuxinom: mmc3_cd_pin@0 {
70 +                               allwinner,pins = "PH11";
71 +                               allwinner,function = "gpio_in";
72 +                               allwinner,drive = <0>;
73 +                               allwinner,pull = <1>;
74 +                       };
75 +
76                         led_pins_olinuxino: led_pins@0 {
77                                 allwinner,pins = "PH2";
78                                 allwinner,function = "gpio_out";
79 diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
80 index cb25d3c..66bb3ef 100644
81 --- a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
82 +++ b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
83 @@ -20,6 +20,14 @@
84         compatible = "cubietech,cubietruck", "allwinner,sun7i-a20";
85
86         soc@01c00000 {
87 +               mmc0: mmc@01c0f000 {
88 +                       pinctrl-names = "default", "default";
89 +                       pinctrl-0 = <&mmc0_pins_a>;
90 +                       pinctrl-1 = <&mmc0_cd_pin_reference_design>;
91 +                       cd-gpios = <&pio 7 1 0>; /* PH1 */
92 +                       status = "okay";
93 +               };
94 +
95                 ahci: sata@01c18000 {
96                         target-supply = <&reg_ahci_5v>;
97                         status = "okay";
98 diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
99 index 3385994..3bc6ac5 100644
100 --- a/arch/arm/boot/dts/sun7i-a20.dtsi
101 +++ b/arch/arm/boot/dts/sun7i-a20.dtsi
102 @@ -392,6 +392,46 @@
103                         #size-cells = <0>;
104                 };
105  
106 +               mmc0: mmc@01c0f000 {
107 +                       compatible = "allwinner,sun5i-a13-mmc";
108 +                       reg = <0x01c0f000 0x1000>;
109 +                       clocks = <&ahb_gates 8>, <&mmc0_clk>;
110 +                       clock-names = "ahb", "mod";
111 +                       interrupts = <0 32 4>;
112 +                       bus-width = <4>;
113 +                       status = "disabled";
114 +               };
115 +
116 +               mmc1: mmc@01c10000 {
117 +                       compatible = "allwinner,sun5i-a13-mmc";
118 +                       reg = <0x01c10000 0x1000>;
119 +                       clocks = <&ahb_gates 9>, <&mmc1_clk>;
120 +                       clock-names = "ahb", "mod";
121 +                       interrupts = <0 33 4>;
122 +                       bus-width = <4>;
123 +                       status = "disabled";
124 +               };
125 +
126 +               mmc2: mmc@01c11000 {
127 +                       compatible = "allwinner,sun5i-a13-mmc";
128 +                       reg = <0x01c11000 0x1000>;
129 +                       clocks = <&ahb_gates 10>, <&mmc2_clk>;
130 +                       clock-names = "ahb", "mod";
131 +                       interrupts = <0 34 4>;
132 +                       bus-width = <4>;
133 +                       status = "disabled";
134 +               };
135 +
136 +               mmc3: mmc@01c12000 {
137 +                       compatible = "allwinner,sun5i-a13-mmc";
138 +                       reg = <0x01c12000 0x1000>;
139 +                       clocks = <&ahb_gates 11>, <&mmc3_clk>;
140 +                       clock-names = "ahb", "mod";
141 +                       interrupts = <0 35 4>;
142 +                       bus-width = <4>;
143 +                       status = "disabled";
144 +               };
145 +
146                 ahci: sata@01c18000 {
147                         compatible = "allwinner,sun4i-a10-ahci";
148                         reg = <0x01c18000 0x1000>;
149 @@ -510,6 +550,27 @@
150                                 allwinner,drive = <3>;
151                                 allwinner,pull = <0>;
152                         };
153 +
154 +                       mmc0_pins_a: mmc0@0 {
155 +                               allwinner,pins = "PF0","PF1","PF2","PF3","PF4","PF5";
156 +                               allwinner,function = "mmc0";
157 +                               allwinner,drive = <3>;
158 +                               allwinner,pull = <0>;
159 +                       };
160 +
161 +                       mmc0_cd_pin_reference_design: mmc0_cd_pin@0 {
162 +                               allwinner,pins = "PH1";
163 +                               allwinner,function = "gpio_in";
164 +                               allwinner,drive = <0>;
165 +                               allwinner,pull = <1>;
166 +                       };
167 +
168 +                       mmc3_pins_a: mmc3@0 {
169 +                               allwinner,pins = "PI4","PI5","PI6","PI7","PI8","PI9";
170 +                               allwinner,function = "mmc3";
171 +                               allwinner,drive = <3>;
172 +                               allwinner,pull = <0>;
173 +                       };
174                 };
175  
176                 timer@01c20c00 {
177 -- 
178 1.8.5.5
179