2 * linux/drivers/mmc/host/glamo-mmc.c - Glamo MMC driver
4 * Copyright (C) 2007 Openmoko, Inc, Andy Green <andy@openmoko.com>
5 * Based on S3C MMC driver that was:
6 * Copyright (C) 2004-2006 maintech GmbH, Thomas Kleffel <tk@maintech.de>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/module.h>
14 #include <linux/dma-mapping.h>
15 #include <linux/clk.h>
16 #include <linux/mmc/mmc.h>
17 #include <linux/mmc/host.h>
18 #include <linux/platform_device.h>
19 #include <linux/irq.h>
20 #include <linux/delay.h>
21 #include <linux/interrupt.h>
22 #include <linux/spinlock.h>
23 #include <linux/workqueue.h>
26 #include <asm/dma-mapping.h>
29 #include "glamo-mci.h"
30 #include "glamo-core.h"
31 #include "glamo-regs.h"
33 /* from glamo-core.c */
34 extern struct glamo_mci_pdata glamo_mci_def_pdata;
36 static spinlock_t clock_lock;
38 #define DRIVER_NAME "glamo-mci"
39 #define RESSIZE(ressource) (((ressource)->end - (ressource)->start) + 1)
41 static void glamo_mci_send_request(struct mmc_host *mmc);
46 * held at /(3 + 1) due to concerns of 100R recommended series resistor
47 * allows 16MHz @ 4-bit --> 8MBytes/sec raw
49 * you can override this on kernel commandline using
51 * glamo_mci.sd_max_clk=10000000
56 static int sd_max_clk = 50000000 / 3;
57 module_param(sd_max_clk, int, 0644);
62 * you can override this on kernel commandline using
64 * glamo_mci.sd_slow_ratio=8
68 * platform callback is used to decide effective clock rate, if not
69 * defined then max is used, if defined and returns nonzero, rate is
70 * divided by this factor
73 static int sd_slow_ratio = 8;
74 module_param(sd_slow_ratio, int, 0644);
77 * Post-power SD clock rate
79 * you can override this on kernel commandline using
81 * glamo_mci.sd_post_power_clock=1000000
85 * After changing power to card, clock is held at this rate until first bulk
89 static int sd_post_power_clock = 1000000;
90 module_param(sd_post_power_clock, int, 0644);
94 * SD Signal drive strength
96 * you can override this on kernel commandline using
98 * glamo_mci.sd_drive=0
104 module_param(sd_drive, int, 0644);
107 * SD allow SD clock to run while idle
109 * you can override this on kernel commandline using
111 * glamo_mci.sd_idleclk=0
116 static int sd_idleclk = 0; /* disallow idle clock by default */
117 module_param(sd_idleclk, int, 0644);
119 /* used to stash real idleclk state in suspend: we force it to run in there */
120 static int suspend_sd_idleclk;
123 unsigned char CRC7(u8 * pu8, int cnt)
130 for (n = 0; n < 8; n++) {
132 if ((d & 0x80) ^ (crc & 0x80))
137 return (crc << 1) | 1;
140 static int get_data_buffer(struct glamo_mci_host *host,
141 volatile u32 *words, volatile u16 **pointer)
143 struct scatterlist *sg;
148 if (host->pio_active == XFER_NONE)
151 if ((!host->mrq) || (!host->mrq->data))
154 if (host->pio_sgptr >= host->mrq->data->sg_len) {
155 dev_dbg(&host->pdev->dev, "no more buffers (%i/%i)\n",
156 host->pio_sgptr, host->mrq->data->sg_len);
159 sg = &host->mrq->data->sg[host->pio_sgptr];
161 *words = sg->length >> 1; /* we are working with a 16-bit data bus */
162 *pointer = page_address(sg_page(sg)) + sg->offset;
164 BUG_ON(((long)(*pointer)) & 1);
168 /* dev_info(&host->pdev->dev, "new buffer (%i/%i)\n",
169 host->pio_sgptr, host->mrq->data->sg_len); */
173 static void do_pio_read(struct glamo_mci_host *host)
176 u16 __iomem *from_ptr = host->base_data + (RESSIZE(host->mem_data) /
183 res = get_data_buffer(host, &host->pio_words, &host->pio_ptr);
185 host->pio_active = XFER_NONE;
186 host->complete_what = COMPLETION_FINALIZE;
188 dev_dbg(&host->pdev->dev, "pio_read(): "
189 "complete (no more data).\n");
193 dev_dbg(&host->pdev->dev, "pio_read(): host->pio_words: %d\n",
196 host->pio_count += host->pio_words << 1;
199 block = (u16 *)host->pio_ptr;
200 res = host->pio_words << 1;
203 /* u16-centric memcpy */
204 while (host->pio_words--)
205 *host->pio_ptr++ = *from_ptr++;
207 /* memcpy can be faster? */
208 memcpy((void *)host->pio_ptr, from_ptr, host->pio_words << 1);
209 host->pio_ptr += host->pio_words;
213 print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_OFFSET, 16, 1,
214 (void *)block, res, 1);
219 static int do_pio_write(struct glamo_mci_host *host)
222 volatile u16 __iomem *to_ptr = host->base_data;
225 dev_dbg(&host->pdev->dev, "pio_write():\n");
227 res = get_data_buffer(host, &host->pio_words, &host->pio_ptr);
231 dev_dbg(&host->pdev->dev, "pio_write():new source: [%i]@[%p]\n",
232 host->pio_words, host->pio_ptr);
234 host->pio_count += host->pio_words << 1;
235 while (host->pio_words--)
236 writew(*host->pio_ptr++, to_ptr++);
239 dev_dbg(&host->pdev->dev, "pio_write(): complete\n");
240 host->pio_active = XFER_NONE;
244 static void __glamo_mci_fix_card_div(struct glamo_mci_host *host, int div)
248 spin_lock_irqsave(&clock_lock, flags);
251 /* stop clock - remove clock from divider input */
252 writew(readw(glamo_mci_def_pdata.pglamo->base +
253 GLAMO_REG_CLOCK_GEN5_1) & (~GLAMO_CLOCK_GEN51_EN_DIV_TCLK),
254 glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_GEN5_1);
258 /* set the nearest prescaler factor
260 * register shared with SCLK divisor -- no chance of race because
261 * we don't use sensor interface
263 writew((readw(glamo_mci_def_pdata.pglamo->base +
264 GLAMO_REG_CLOCK_GEN8) & 0xff00) | div,
265 glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_GEN8);
266 /* enable clock to divider input */
267 writew(readw(glamo_mci_def_pdata.pglamo->base +
268 GLAMO_REG_CLOCK_GEN5_1) | GLAMO_CLOCK_GEN51_EN_DIV_TCLK,
269 glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_GEN5_1);
272 if (host->force_slow_during_powerup)
273 div = host->clk_rate / sd_post_power_clock;
275 if (host->pdata->glamo_mci_use_slow)
276 if ((host->pdata->glamo_mci_use_slow)())
277 div = div * sd_slow_ratio;
283 * set the nearest prescaler factor
285 * register shared with SCLK divisor -- no chance of race because
286 * we don't use sensor interface
288 writew((readw(glamo_mci_def_pdata.pglamo->base +
289 GLAMO_REG_CLOCK_GEN8) & 0xff00) | div,
290 glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_GEN8);
291 /* enable clock to divider input */
292 writew(readw(glamo_mci_def_pdata.pglamo->base +
293 GLAMO_REG_CLOCK_GEN5_1) | GLAMO_CLOCK_GEN51_EN_DIV_TCLK,
294 glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_GEN5_1);
297 spin_unlock_irqrestore(&clock_lock, flags);
300 static int __glamo_mci_set_card_clock(struct glamo_mci_host *host, int freq,
308 for (div = 0; div < 256; div++) {
309 real_rate = host->clk_rate / (div + 1);
310 if (real_rate <= freq)
319 __glamo_mci_fix_card_div(host, div);
326 if (!sd_idleclk && !host->force_slow_during_powerup)
328 __glamo_mci_fix_card_div(host, -1);
335 static void glamo_mci_irq_worker(struct work_struct *work)
337 struct glamo_mci_host *host =
338 container_of(work, struct glamo_mci_host, irq_work);
339 struct mmc_command *cmd = host->mrq->cmd;
341 if (host->pio_active == XFER_READ)
344 host->mrq->data->bytes_xfered = host->pio_count;
345 dev_dbg(&host->pdev->dev, "count=%d\n", host->pio_count);
347 /* issue STOP if we have been given one to use */
348 if (host->mrq->stop) {
349 host->cmd_is_stop = 1;
350 glamo_mci_send_request(host->mmc);
351 host->cmd_is_stop = 0;
354 if (!sd_idleclk && !host->force_slow_during_powerup)
356 __glamo_mci_fix_card_div(host, -1);
358 host->complete_what = COMPLETION_NONE;
360 mmc_request_done(host->mmc, cmd->mrq);
363 static void glamo_mci_irq_host(struct glamo_mci_host *host)
366 struct mmc_command *cmd;
367 unsigned long iflags;
369 if (host->suspending) { /* bad news, dangerous time */
370 dev_err(&host->pdev->dev, "****glamo_mci_irq before resumed\n");
376 cmd = host->mrq->cmd;
380 spin_lock_irqsave(&host->complete_lock, iflags);
382 status = readw(host->base + GLAMO_REG_MMC_RB_STAT1);
383 dev_dbg(&host->pdev->dev, "status = 0x%04x\n", status);
385 /* ack this interrupt source */
386 writew(GLAMO_IRQ_MMC,
387 glamo_mci_def_pdata.pglamo->base + GLAMO_REG_IRQ_CLEAR);
389 /* we ignore a data timeout report if we are also told the data came */
390 if (status & GLAMO_STAT1_MMC_RB_DRDY)
391 status &= ~GLAMO_STAT1_MMC_DTOUT;
393 if (status & (GLAMO_STAT1_MMC_RTOUT |
394 GLAMO_STAT1_MMC_DTOUT))
395 cmd->error = -ETIMEDOUT;
396 if (status & (GLAMO_STAT1_MMC_BWERR |
397 GLAMO_STAT1_MMC_BRERR))
398 cmd->error = -EILSEQ;
400 dev_info(&host->pdev->dev, "Error after cmd: 0x%x\n", status);
405 * disable the initial slow start after first bulk transfer
407 if (host->force_slow_during_powerup)
408 host->force_slow_during_powerup--;
411 * we perform the memcpy out of Glamo memory outside of IRQ context
412 * so we don't block other interrupts
414 schedule_work(&host->irq_work);
419 host->complete_what = COMPLETION_NONE;
421 mmc_request_done(host->mmc, cmd->mrq);
423 spin_unlock_irqrestore(&host->complete_lock, iflags);
426 static void glamo_mci_irq(unsigned int irq, struct irq_desc *desc)
428 struct glamo_mci_host *host = (struct glamo_mci_host *)
432 glamo_mci_irq_host(host);
436 static int glamo_mci_send_command(struct glamo_mci_host *host,
437 struct mmc_command *cmd)
442 /* if we can't do it, reject as busy */
443 if (!readw(host->base + GLAMO_REG_MMC_RB_STAT1) &
444 GLAMO_STAT1_MMC_IDLE) {
447 mmc_request_done(host->mmc, host->mrq);
451 /* create an array in wire order for CRC computation */
452 u8a[0] = 0x40 | (cmd->opcode & 0x3f);
453 u8a[1] = (u8)(cmd->arg >> 24);
454 u8a[2] = (u8)(cmd->arg >> 16);
455 u8a[3] = (u8)(cmd->arg >> 8);
456 u8a[4] = (u8)cmd->arg;
457 u8a[5] = CRC7(&u8a[0], 5); /* CRC7 on first 5 bytes of packet */
459 /* issue the wire-order array including CRC in register order */
460 writew((u8a[4] << 8) | u8a[5], host->base + GLAMO_REG_MMC_CMD_REG1);
461 writew((u8a[2] << 8) | u8a[3], host->base + GLAMO_REG_MMC_CMD_REG2);
462 writew((u8a[0] << 8) | u8a[1], host->base + GLAMO_REG_MMC_CMD_REG3);
464 /* command index toggle */
465 fire |= (host->ccnt & 1) << 12;
467 /* set type of command */
468 switch (mmc_cmd_type(cmd)) {
470 fire |= GLAMO_FIRE_MMC_CMDT_BNR;
473 fire |= GLAMO_FIRE_MMC_CMDT_BR;
476 fire |= GLAMO_FIRE_MMC_CMDT_AND;
479 fire |= GLAMO_FIRE_MMC_CMDT_AD;
483 * if it expects a response, set the type expected
485 * R1, Length : 48bit, Normal response
486 * R1b, Length : 48bit, same R1, but added card busy status
487 * R2, Length : 136bit (really 128 bits with CRC snipped)
488 * R3, Length : 48bit (OCR register value)
489 * R4, Length : 48bit, SDIO_OP_CONDITION, Reverse SDIO Card
490 * R5, Length : 48bit, IO_RW_DIRECTION, Reverse SDIO Card
491 * R6, Length : 48bit (RCA register)
492 * R7, Length : 48bit (interface condition, VHS(voltage supplied),
493 * check pattern, CRC7)
495 switch (mmc_resp_type(cmd)) {
496 case MMC_RSP_R6: /* same index as R7 and R1 */
497 fire |= GLAMO_FIRE_MMC_RSPT_R1;
500 fire |= GLAMO_FIRE_MMC_RSPT_R1b;
503 fire |= GLAMO_FIRE_MMC_RSPT_R2;
506 fire |= GLAMO_FIRE_MMC_RSPT_R3;
508 /* R4 and R5 supported by chip not defined in linux/mmc/core.h (sdio) */
511 * From the command index, set up the command class in the host ctrllr
513 * missing guys present on chip but couldn't figure out how to use yet:
515 * 0x9 "cancel running command"
517 switch (cmd->opcode) {
518 case MMC_READ_SINGLE_BLOCK:
519 fire |= GLAMO_FIRE_MMC_CC_SBR; /* single block read */
521 case MMC_SWITCH: /* 64 byte payload */
522 case 0x33: /* observed issued by MCI */
523 case MMC_READ_MULTIPLE_BLOCK:
524 /* we will get an interrupt off this */
526 /* multiblock no stop */
527 fire |= GLAMO_FIRE_MMC_CC_MBRNS;
529 /* multiblock with stop */
530 fire |= GLAMO_FIRE_MMC_CC_MBRS;
532 case MMC_WRITE_BLOCK:
533 fire |= GLAMO_FIRE_MMC_CC_SBW; /* single block write */
535 case MMC_WRITE_MULTIPLE_BLOCK:
537 /* multiblock with stop */
538 fire |= GLAMO_FIRE_MMC_CC_MBWS;
540 // /* multiblock NO stop-- 'RESERVED'? */
541 fire |= GLAMO_FIRE_MMC_CC_MBWNS;
543 case MMC_STOP_TRANSMISSION:
544 fire |= GLAMO_FIRE_MMC_CC_STOP; /* STOP */
547 fire |= GLAMO_FIRE_MMC_CC_BASIC; /* "basic command" */
551 /* always largest timeout */
552 writew(0xfff, host->base + GLAMO_REG_MMC_TIMEOUT);
554 /* Generate interrupt on txfer */
555 writew((readw(host->base + GLAMO_REG_MMC_BASIC) & 0x3e) |
556 0x0800 | GLAMO_BASIC_MMC_NO_CLK_RD_WAIT |
557 GLAMO_BASIC_MMC_EN_COMPL_INT | (sd_drive << 6),
558 host->base + GLAMO_REG_MMC_BASIC);
560 /* send the command out on the wire */
561 /* dev_info(&host->pdev->dev, "Using FIRE %04X\n", fire); */
562 writew(fire, host->base + GLAMO_REG_MMC_CMD_FIRE);
567 static int glamo_mci_prepare_pio(struct glamo_mci_host *host,
568 struct mmc_data *data)
571 * the S-Media-internal RAM offset for our MMC buffer
572 * Read is halfway up the buffer and write is at the start
574 if (data->flags & MMC_DATA_READ) {
575 writew((u16)(GLAMO_FB_SIZE + (RESSIZE(host->mem_data) / 2)),
576 host->base + GLAMO_REG_MMC_WDATADS1);
577 writew((u16)((GLAMO_FB_SIZE +
578 (RESSIZE(host->mem_data) / 2)) >> 16),
579 host->base + GLAMO_REG_MMC_WDATADS2);
581 writew((u16)GLAMO_FB_SIZE, host->base +
582 GLAMO_REG_MMC_RDATADS1);
583 writew((u16)(GLAMO_FB_SIZE >> 16), host->base +
584 GLAMO_REG_MMC_RDATADS2);
587 /* set up the block info */
588 writew(data->blksz, host->base + GLAMO_REG_MMC_DATBLKLEN);
589 writew(data->blocks, host->base + GLAMO_REG_MMC_DATBLKCNT);
590 dev_dbg(&host->pdev->dev, "(blksz=%d, count=%d)\n",
591 data->blksz, data->blocks);
595 host->pio_active = 0;
596 /* if write, prep the write into the shared RAM before the command */
597 if (data->flags & MMC_DATA_WRITE) {
598 host->pio_active = XFER_WRITE;
599 return do_pio_write(host);
601 host->pio_active = XFER_READ;
605 static void glamo_mci_send_request(struct mmc_host *mmc)
607 struct glamo_mci_host *host = mmc_priv(mmc);
608 struct mmc_request *mrq = host->mrq;
609 struct mmc_command *cmd = host->cmd_is_stop ? mrq->stop : mrq->cmd;
610 u16 * pu16 = (u16 *)&cmd->resp[0];
611 u16 * reg_resp = (u16 *)(host->base + GLAMO_REG_MMC_CMD_RSP1);
614 int timeout = 1000000;
615 int insanity_timeout = 1000000;
617 if (host->suspending) {
618 dev_err(&host->pdev->dev, "IGNORING glamo_mci_send_request while "
622 cmd->data->error = -EIO;
623 mmc_request_done(mmc, mrq);
629 * somehow 2.6.24 MCI manages to issue MMC_WRITE_BLOCK *without* the
630 * MMC_DATA_WRITE flag, WTF? Work around the madness.
632 if (cmd->opcode == MMC_WRITE_BLOCK)
634 mrq->data->flags |= MMC_DATA_WRITE;
636 /* this guy has data to read/write? */
637 if ((!host->cmd_is_stop) && cmd->data) {
640 res = glamo_mci_prepare_pio(host, cmd->data);
643 cmd->data->error = -EIO;
644 mmc_request_done(mmc, mrq);
649 dev_dbg(&host->pdev->dev,"cmd 0x%x, "
650 "arg 0x%x data=%p mrq->stop=%p flags 0x%x\n",
651 cmd->opcode, cmd->arg, cmd->data, cmd->mrq->stop,
654 /* resume requested clock rate
655 * scale it down by sd_slow_ratio if platform requests it
657 __glamo_mci_fix_card_div(host, host->clk_div);
659 if (glamo_mci_send_command(host, cmd))
662 /* we are deselecting card? because it isn't going to ack then... */
663 if ((cmd->opcode == 7) && (cmd->arg == 0))
667 * we must spin until response is ready or timed out
668 * -- we don't get interrupts unless there is a bulk rx
671 status = readw(host->base + GLAMO_REG_MMC_RB_STAT1);
672 while (((((status >> 15) & 1) != (host->ccnt & 1)) ||
673 (!(status & (GLAMO_STAT1_MMC_RB_RRDY |
674 GLAMO_STAT1_MMC_RTOUT |
675 GLAMO_STAT1_MMC_DTOUT |
676 GLAMO_STAT1_MMC_BWERR |
677 GLAMO_STAT1_MMC_BRERR)))) && (insanity_timeout--));
679 if (insanity_timeout < 0)
680 dev_info(&host->pdev->dev, "command timeout, continuing\n");
682 if (status & (GLAMO_STAT1_MMC_RTOUT |
683 GLAMO_STAT1_MMC_DTOUT))
684 cmd->error = -ETIMEDOUT;
685 if (status & (GLAMO_STAT1_MMC_BWERR |
686 GLAMO_STAT1_MMC_BRERR))
687 cmd->error = -EILSEQ;
689 if (host->cmd_is_stop)
693 dev_info(&host->pdev->dev, "Error after cmd: 0x%x\n", status);
697 * mangle the response registers in two different exciting
698 * undocumented ways discovered by trial and error
700 if (mmc_resp_type(cmd) == MMC_RSP_R2)
701 /* grab the response */
702 for (n = 0; n < 8; n++) /* super mangle power 1 */
703 pu16[n ^ 6] = readw(®_resp[n]);
705 for (n = 0; n < 3; n++) /* super mangle power 2 */
706 pu16[n] = (readw(®_resp[n]) >> 8) |
707 (readw(®_resp[n + 1]) << 8);
709 * if we don't have bulk data to take care of, we're done
713 if (!(cmd->data->flags & (MMC_DATA_READ | MMC_DATA_WRITE)))
717 * Otherwise can can use the interrupt as async completion --
718 * if there is read data coming, or we wait for write data to complete,
719 * exit without mmc_request_done() as the payload interrupt
722 dev_dbg(&host->pdev->dev, "Waiting for payload data\n");
724 * if the glamo INT# line isn't wired (*cough* it can happen)
725 * I'm afraid we have to spin on the IRQ status bit and "be
728 if (!glamo_mci_def_pdata.pglamo->irq_works) {
730 * we have faith we will get an "interrupt"...
731 * but something insane like suspend problems can mean
732 * we spin here forever, so we timeout after a LONG time
734 while ((!(readw(glamo_mci_def_pdata.pglamo->base +
735 GLAMO_REG_IRQ_STATUS) & GLAMO_IRQ_MMC)) &&
740 if (cmd->data->error)
741 cmd->data->error = -ETIMEDOUT;
742 dev_err(&host->pdev->dev, "Payload timeout\n");
746 /* yay we are an interrupt controller! -- call the ISR
747 * it will stop clock to card
749 glamo_mci_irq_host(host);
754 host->complete_what = COMPLETION_NONE;
756 mmc_request_done(host->mmc, cmd->mrq);
758 if (!sd_idleclk && !host->force_slow_during_powerup)
759 /* stop the clock to card */
760 __glamo_mci_fix_card_div(host, -1);
763 static void glamo_mci_request(struct mmc_host *mmc, struct mmc_request *mrq)
765 struct glamo_mci_host *host = mmc_priv(mmc);
767 host->cmd_is_stop = 0;
769 glamo_mci_send_request(mmc);
773 static void glamo_mci_reset(struct glamo_mci_host *host)
775 if (host->suspending) {
776 dev_err(&host->pdev->dev, "IGNORING glamo_mci_reset while "
780 dev_dbg(&host->pdev->dev, "******* glamo_mci_reset\n");
781 /* reset MMC controller */
782 writew(GLAMO_CLOCK_MMC_RESET | GLAMO_CLOCK_MMC_DG_TCLK |
783 GLAMO_CLOCK_MMC_EN_TCLK | GLAMO_CLOCK_MMC_DG_M9CLK |
784 GLAMO_CLOCK_MMC_EN_M9CLK,
785 glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_MMC);
787 /* and disable reset */
788 writew(GLAMO_CLOCK_MMC_DG_TCLK |
789 GLAMO_CLOCK_MMC_EN_TCLK | GLAMO_CLOCK_MMC_DG_M9CLK |
790 GLAMO_CLOCK_MMC_EN_M9CLK,
791 glamo_mci_def_pdata.pglamo->base + GLAMO_REG_CLOCK_MMC);
794 static inline int glamo_mci_get_mv(int vdd)
799 mv += 350 + 100 * (vdd - 8);
804 static void glamo_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
806 struct glamo_mci_host *host = mmc_priv(mmc);
807 struct regulator *regulator;
813 if (host->suspending) {
814 dev_err(&host->pdev->dev, "IGNORING glamo_mci_set_ios while "
819 regulator = host->regulator;
822 switch(ios->power_mode) {
824 if (host->pdata->glamo_can_set_mci_power()) {
825 mv = glamo_mci_get_mv(ios->vdd);
826 regulator_set_voltage(regulator, mv * 1000, mv * 1000);
827 regulator_enable(regulator);
832 * we should use very slow clock until first bulk
833 * transfer completes OK
835 host->force_slow_during_powerup = 1;
837 if (host->vdd_current != ios->vdd) {
838 if (host->pdata->glamo_can_set_mci_power()) {
839 mv = glamo_mci_get_mv(ios->vdd);
840 regulator_set_voltage(regulator, mv * 1000, mv * 1000);
841 printk(KERN_INFO "SD power -> %dmV\n", mv);
843 host->vdd_current = ios->vdd;
845 if (host->power_mode_current == MMC_POWER_OFF) {
846 glamo_engine_enable(glamo_mci_def_pdata.pglamo,
854 if (host->power_mode_current == MMC_POWER_OFF)
856 /* never want clocking with dead card */
857 __glamo_mci_fix_card_div(host, -1);
859 glamo_engine_disable(glamo_mci_def_pdata.pglamo,
861 regulator_disable(regulator);
862 host->vdd_current = -1;
865 host->power_mode_current = ios->power_mode;
867 host->real_rate = __glamo_mci_set_card_clock(host, ios->clock, &div);
870 /* after power-up, we are meant to give it >= 74 clocks so it can
871 * initialize itself. Doubt any modern cards need it but anyway...
876 if (!sd_idleclk && !host->force_slow_during_powerup)
877 /* stop the clock to card, because we are idle until transfer */
878 __glamo_mci_fix_card_div(host, -1);
880 if ((ios->power_mode == MMC_POWER_ON) ||
881 (ios->power_mode == MMC_POWER_UP)) {
882 dev_info(&host->pdev->dev,
883 "powered (vdd = %d) clk: %lukHz div=%d (req: %ukHz). "
884 "Bus width=%d\n",(int)ios->vdd,
885 host->real_rate / 1000, (int)host->clk_div,
886 ios->clock / 1000, (int)ios->bus_width);
888 dev_info(&host->pdev->dev, "glamo_mci_set_ios: power down.\n");
891 host->bus_width = ios->bus_width;
892 if (host->bus_width == MMC_BUS_WIDTH_4)
893 n = GLAMO_BASIC_MMC_EN_4BIT_DATA;
894 writew((readw(host->base + GLAMO_REG_MMC_BASIC) &
895 (~(GLAMO_BASIC_MMC_EN_4BIT_DATA |
896 GLAMO_BASIC_MMC_EN_DR_STR0 |
897 GLAMO_BASIC_MMC_EN_DR_STR1))) | n |
898 sd_drive << 6, host->base + GLAMO_REG_MMC_BASIC);
903 * no physical write protect supported by us
905 static int glamo_mci_get_ro(struct mmc_host *mmc)
910 static struct mmc_host_ops glamo_mci_ops = {
911 .request = glamo_mci_request,
912 .set_ios = glamo_mci_set_ios,
913 .get_ro = glamo_mci_get_ro,
916 static int glamo_mci_probe(struct platform_device *pdev)
918 struct mmc_host *mmc;
919 struct glamo_mci_host *host;
922 dev_info(&pdev->dev, "glamo_mci driver (C)2007 Openmoko, Inc\n");
924 mmc = mmc_alloc_host(sizeof(struct glamo_mci_host), &pdev->dev);
930 host = mmc_priv(mmc);
933 host->pdata = &glamo_mci_def_pdata;
934 host->power_mode_current = MMC_POWER_OFF;
936 host->complete_what = COMPLETION_NONE;
937 host->pio_active = XFER_NONE;
939 spin_lock_init(&host->complete_lock);
940 INIT_WORK(&host->irq_work, glamo_mci_irq_worker);
942 host->mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
945 "failed to get io memory region resouce.\n");
948 goto probe_free_host;
951 host->mem = request_mem_region(host->mem->start,
952 RESSIZE(host->mem), pdev->name);
955 dev_err(&pdev->dev, "failed to request io memory region.\n");
957 goto probe_free_host;
960 host->base = ioremap(host->mem->start, RESSIZE(host->mem));
962 dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
964 goto probe_free_mem_region;
967 host->regulator = regulator_get(&pdev->dev, "SD_3V3");
968 if (!host->regulator) {
969 dev_err(&pdev->dev, "Cannot proceed without regulator.\n");
973 /* set the handler for our bit of the shared chip irq register */
974 set_irq_handler(IRQ_GLAMO(GLAMO_IRQIDX_MMC), glamo_mci_irq);
975 /* stash host as our handler's private data */
976 set_irq_data(IRQ_GLAMO(GLAMO_IRQIDX_MMC), host);
978 /* Get ahold of our data buffer we use for data in and out on MMC */
979 host->mem_data = platform_get_resource(pdev, IORESOURCE_MEM, 1);
980 if (!host->mem_data) {
982 "failed to get io memory region resource.\n");
987 host->mem_data = request_mem_region(host->mem_data->start,
988 RESSIZE(host->mem_data), pdev->name);
990 if (!host->mem_data) {
991 dev_err(&pdev->dev, "failed to request io memory region.\n");
995 host->base_data = ioremap(host->mem_data->start,
996 RESSIZE(host->mem_data));
997 host->data_max_size = RESSIZE(host->mem_data);
999 if (host->base_data == 0) {
1000 dev_err(&pdev->dev, "failed to ioremap() io memory region.\n");
1002 goto probe_free_mem_region_data;
1005 host->vdd_current = 0;
1006 host->clk_rate = 50000000; /* really it's 49152000 */
1009 /* explain our host controller capabilities */
1010 mmc->ops = &glamo_mci_ops;
1011 mmc->ocr_avail = host->pdata->ocr_avail;
1012 mmc->caps = MMC_CAP_4_BIT_DATA |
1013 MMC_CAP_MMC_HIGHSPEED |
1014 MMC_CAP_SD_HIGHSPEED;
1015 mmc->f_min = host->clk_rate / 256;
1016 mmc->f_max = sd_max_clk;
1018 mmc->max_blk_count = (1 << 16) - 1; /* GLAMO_REG_MMC_RB_BLKCNT */
1019 mmc->max_blk_size = (1 << 12) - 1; /* GLAMO_REG_MMC_RB_BLKLEN */
1020 mmc->max_req_size = RESSIZE(host->mem_data) / 2;
1021 mmc->max_seg_size = mmc->max_req_size;
1022 mmc->max_phys_segs = 1; /* hw doesn't talk about segs??? */
1023 mmc->max_hw_segs = 1;
1025 dev_info(&host->pdev->dev, "probe: mapped mci_base:%p irq:%u.\n",
1026 host->base, host->irq);
1028 platform_set_drvdata(pdev, mmc);
1030 glamo_engine_enable(glamo_mci_def_pdata.pglamo, GLAMO_ENGINE_MMC);
1031 glamo_mci_reset(host);
1033 if ((ret = mmc_add_host(mmc))) {
1034 dev_err(&pdev->dev, "failed to add mmc host.\n");
1035 goto probe_free_mem_region_data;
1038 dev_info(&pdev->dev,"initialisation done.\n");
1041 probe_free_mem_region_data:
1042 release_mem_region(host->mem_data->start, RESSIZE(host->mem_data));
1045 iounmap(host->base);
1047 probe_free_mem_region:
1048 release_mem_region(host->mem->start, RESSIZE(host->mem));
1056 static int glamo_mci_remove(struct platform_device *pdev)
1058 struct mmc_host *mmc = platform_get_drvdata(pdev);
1059 struct glamo_mci_host *host = mmc_priv(mmc);
1060 struct regulator *regulator;
1062 mmc_remove_host(mmc);
1063 /* stop using our handler, revert it to default */
1064 set_irq_handler(IRQ_GLAMO(GLAMO_IRQIDX_MMC), handle_level_irq);
1065 iounmap(host->base);
1066 iounmap(host->base_data);
1067 release_mem_region(host->mem->start, RESSIZE(host->mem));
1068 release_mem_region(host->mem_data->start, RESSIZE(host->mem_data));
1070 regulator = host->regulator;
1071 regulator_put(regulator);
1075 glamo_engine_disable(glamo_mci_def_pdata.pglamo, GLAMO_ENGINE_MMC);
1082 static int glamo_mci_suspend(struct platform_device *dev, pm_message_t state)
1084 struct mmc_host *mmc = platform_get_drvdata(dev);
1085 struct glamo_mci_host *host = mmc_priv(mmc);
1088 cancel_work_sync(&host->irq_work);
1091 * possible workaround for SD corruption during suspend - resume
1092 * make sure the clock was running during suspend and consequently
1095 __glamo_mci_fix_card_div(host, host->clk_div);
1097 /* we are going to do more commands to override this in
1098 * mmc_suspend_host(), so we need to change sd_idleclk for the
1101 suspend_sd_idleclk = sd_idleclk;
1104 ret = mmc_suspend_host(mmc, state);
1107 /* so that when we resume, we use any modified max rate */
1108 mmc->f_max = sd_max_clk;
1113 int glamo_mci_resume(struct platform_device *dev)
1115 struct mmc_host *mmc = platform_get_drvdata(dev);
1116 struct glamo_mci_host *host = mmc_priv(mmc);
1121 glamo_engine_enable(host->pdata->pglamo, GLAMO_ENGINE_MMC);
1122 glamo_mci_reset(host);
1126 ret = mmc_resume_host(mmc);
1128 /* put sd_idleclk back to pre-suspend state */
1129 sd_idleclk = suspend_sd_idleclk;
1133 EXPORT_SYMBOL_GPL(glamo_mci_resume);
1135 #else /* CONFIG_PM */
1136 #define glamo_mci_suspend NULL
1137 #define glamo_mci_resume NULL
1138 #endif /* CONFIG_PM */
1141 static struct platform_driver glamo_mci_driver =
1143 .driver.name = "glamo-mci",
1144 .probe = glamo_mci_probe,
1145 .remove = glamo_mci_remove,
1146 .suspend = glamo_mci_suspend,
1147 .resume = glamo_mci_resume,
1150 static int __init glamo_mci_init(void)
1152 spin_lock_init(&clock_lock);
1153 platform_driver_register(&glamo_mci_driver);
1157 static void __exit glamo_mci_exit(void)
1159 platform_driver_unregister(&glamo_mci_driver);
1162 module_init(glamo_mci_init);
1163 module_exit(glamo_mci_exit);
1165 MODULE_DESCRIPTION("Glamo MMC/SD Card Interface driver");
1166 MODULE_LICENSE("GPL");
1167 MODULE_AUTHOR("Andy Green <andy@openmoko.com>");