1 #include <linux/types.h>
4 #include <linux/init.h>
6 #include <asm/mach-ralink/rt288x.h>
7 #include <asm/mach-ralink/rt288x_pci.h>
9 extern int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
10 extern int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
12 struct pci_ops rt2880_pci_ops = {
13 .read = pci_config_read,
14 .write = pci_config_write,
17 static struct resource pci_io_resource = {
18 .name = "pci MEM space",
21 .flags = IORESOURCE_MEM,
24 static struct resource pci_mem_resource = {
25 .name = "pci IO space",
28 .flags = IORESOURCE_IO,
31 struct pci_controller rt2880_controller = {
32 .pci_ops = &rt2880_pci_ops,
33 .mem_resource = &pci_io_resource,
34 .io_resource = &pci_mem_resource,
35 .mem_offset = 0x00000000UL,
36 .io_offset = 0x00000000UL,
40 read_config(unsigned long bus, unsigned long dev, unsigned long func,
41 unsigned long reg, unsigned long *val)
43 unsigned long address =
44 (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) | 0x80000000;
45 writel(address, RT2880_PCI_CONFIG_ADDR);
46 *val = readl(RT2880_PCI_CONFIG_DATA);
50 write_config(unsigned long bus, unsigned long dev, unsigned long func,
51 unsigned long reg, unsigned long val)
53 unsigned long address =
54 (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) | 0x80000000;
55 writel(address, RT2880_PCI_CONFIG_ADDR);
56 writel(val, RT2880_PCI_CONFIG_DATA);
60 pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
65 if (dev->bus->number != 0)
68 switch(PCI_SLOT(dev->devfn))
71 write_config(0, 0, 0, PCI_BASE_ADDRESS_0, 0x08000000);
72 read_config(0, 0, 0, PCI_BASE_ADDRESS_0, &val);
75 irq = RT288X_CPU_IRQ_PCI;
78 printk("%s:%s[%d] trying to alloc unknown pci irq\n", __FILE__, __func__, __LINE__);
83 pci_write_config_byte((struct pci_dev*)dev, PCI_CACHE_LINE_SIZE, 0x14);
84 pci_write_config_byte((struct pci_dev*)dev, PCI_LATENCY_TIMER, 0xFF);
85 pci_read_config_word((struct pci_dev*)dev, PCI_COMMAND, &cmd);
86 cmd = cmd | PCI_COMMAND_MASTER | PCI_COMMAND_IO | PCI_COMMAND_MEMORY |
87 PCI_COMMAND_INVALIDATE | PCI_COMMAND_FAST_BACK | PCI_COMMAND_SERR |
88 PCI_COMMAND_WAIT | PCI_COMMAND_PARITY;
89 pci_write_config_word((struct pci_dev*)dev, PCI_COMMAND, cmd);
90 pci_write_config_byte((struct pci_dev*)dev, PCI_INTERRUPT_LINE, dev->irq);
97 unsigned long val = 0;
99 writel(0, RT2880_PCI_PCICFG_ADDR);
100 for(i = 0; i < 0xfffff; i++) {}
101 writel(0x79, RT2880_PCI_ARBCTL);
102 writel(0x07FF0001, RT2880_PCI_BAR0SETUP_ADDR);
103 writel(RT2880_PCI_SLOT1_BASE, RT2880_PCI_MEMBASE);
104 writel(0x00460000, RT2880_PCI_IOBASE);
105 writel(0x08000000, RT2880_PCI_IMBASEBAR0_ADDR);
106 writel(0x08021814, RT2880_PCI_ID);
107 writel(0x00800001, RT2880_PCI_CLASS);
108 writel(0x28801814, RT2880_PCI_SUBID);
109 writel(0x000c0000, RT2880_PCI_PCIMSK_ADDR);
110 write_config(0, 0, 0, PCI_BASE_ADDRESS_0, 0x08000000);
111 read_config(0, 0, 0, PCI_BASE_ADDRESS_0, &val);
112 register_pci_controller(&rt2880_controller);
117 pcibios_plat_dev_init(struct pci_dev *dev)
122 struct pci_fixup pcibios_fixups[] = {
126 arch_initcall(init_rt2880pci);