target/linux/ixp4xx/patches-2.6.25/030-ixp4xx_fsg_board_support.patch

   1 From: Rod Whitby <rod@whitby.id.au>
   2 Subject: [PATCH] ixp4xx: Add support for the Freecom FSG-3 board (Patch #4874)
   3
   4 The Freecom-FSG3 is a small network-attached-storage device with the
   5 following feature set:
   6
   7 * Intel IXP422
   8 * 4MB Flash (ixp4xx flash driver)
   9 * 64MB RAM
  10 * 4 USB 2.0 host ports (ehci and ohci drivers)
  11 * 1 WAN (eth1) and 3 LAN (eth0) ethernet ports
  12   * Supported by the open source ixp4xx ethernet driver
  13 * Via VT6421 disk controller (libata and sata-via drivers)
  14   * Internal hard disk (PATA supported, SATA not yet supported)
  15   * External SATA port (not yet supported)
  16 * ISL1208 RTC chip
  17 * Winbond 83782 temp sensor and fan controller
  18 * MiniPCI slot
  19
  20 The ixp4xx_defconfig is also updated to support this device (the
  21 leds-fsg driver is to be submitted separately via the leds tree after
  22 this initial support is merged, as it depends on header gpio defines).
  23
  24 Signed-off-by: Rod Whitby <rod@whitby.id.au>
  25
  26 PATCH FOLLOWS
  27 KernelVersion: v2.6.25-rc6-74-g264e3e8
  28 ---
  29
  30 Updated to correct all issues found by RMK.
  31
  32 The front power button calls ctrl_alt_del() and the rear reset button
  33 now calls machine_restart() directly.
  34
  35  arch/arm/configs/ixp4xx_defconfig      |    9 +-
  36  arch/arm/mach-ixp4xx/Kconfig           |    9 +
  37  arch/arm/mach-ixp4xx/Makefile          |    2 +
  38  arch/arm/mach-ixp4xx/fsg-pci.c         |   71 ++++++++
  39  arch/arm/mach-ixp4xx/fsg-setup.c       |  276 ++++++++++++++++++++++++++++++++
  40  include/asm-arm/arch-ixp4xx/fsg.h      |   50 ++++++
  41  include/asm-arm/arch-ixp4xx/hardware.h |    1 +
  42  include/asm-arm/arch-ixp4xx/irqs.h     |    7 +
  43  8 files changed, 421 insertions(+), 4 deletions(-)
  44  create mode 100644 arch/arm/mach-ixp4xx/fsg-pci.c
  45  create mode 100644 arch/arm/mach-ixp4xx/fsg-setup.c
  46  create mode 100644 include/asm-arm/arch-ixp4xx/fsg.h
  47
  48 --- a/arch/arm/configs/ixp4xx_defconfig
  49 +++ b/arch/arm/configs/ixp4xx_defconfig
  50 @@ -165,6 +165,7 @@
  51  CONFIG_MACH_NAS100D=y
  52  CONFIG_MACH_DSMG600=y
  53  CONFIG_ARCH_IXDP4XX=y
  54 +CONFIG_MACH_FSG=y
  55  CONFIG_CPU_IXP46X=y
  56  CONFIG_CPU_IXP43X=y
  57  CONFIG_MACH_GTWX5715=y
  58 @@ -770,7 +771,7 @@
  59  # CONFIG_SATA_SIL24 is not set
  60  # CONFIG_SATA_SIS is not set
  61  # CONFIG_SATA_ULI is not set
  62 -# CONFIG_SATA_VIA is not set
  63 +CONFIG_SATA_VIA=y
  64  # CONFIG_SATA_VITESSE is not set
  65  # CONFIG_SATA_INIC162X is not set
  66  # CONFIG_PATA_ALI is not set
  67 @@ -1143,7 +1144,7 @@
  68  # CONFIG_SENSORS_VIA686A is not set
  69  # CONFIG_SENSORS_VT1211 is not set
  70  # CONFIG_SENSORS_VT8231 is not set
  71 -# CONFIG_SENSORS_W83781D is not set
  72 +CONFIG_SENSORS_W83781D=y
  73  # CONFIG_SENSORS_W83791D is not set
  74  # CONFIG_SENSORS_W83792D is not set
  75  # CONFIG_SENSORS_W83793 is not set
  76 @@ -1334,8 +1335,8 @@
  77  #
  78  # LED drivers
  79  #
  80 -# CONFIG_LEDS_IXP4XX is not set
  81  CONFIG_LEDS_GPIO=y
  82 +CONFIG_LEDS_FSG=y
  83
  84  #
  85  # LED Triggers
  86 @@ -1367,7 +1368,7 @@
  87  # CONFIG_RTC_DRV_DS1672 is not set
  88  # CONFIG_RTC_DRV_MAX6900 is not set
  89  # CONFIG_RTC_DRV_RS5C372 is not set
  90 -# CONFIG_RTC_DRV_ISL1208 is not set
  91 +CONFIG_RTC_DRV_ISL1208=y
  92  CONFIG_RTC_DRV_X1205=y
  93  CONFIG_RTC_DRV_PCF8563=y
  94  # CONFIG_RTC_DRV_PCF8583 is not set
  95 --- a/arch/arm/mach-ixp4xx/Kconfig
  96 +++ b/arch/arm/mach-ixp4xx/Kconfig
  97 @@ -125,6 +125,15 @@
  98         depends on ARCH_IXDP425 || MACH_IXDP465 || MACH_KIXRP435
  99         default y
 100
 101 +config MACH_FSG
 102 +       bool
 103 +       prompt "Freecom FSG-3"
 104 +       select PCI
 105 +       help
 106 +         Say 'Y' here if you want your kernel to support Freecom's
 107 +         FSG-3 device. For more information on this platform,
 108 +         see http://www.nslu2-linux.org/wiki/FSG3/HomePage
 109 +
 110  #
 111  # Certain registers and IRQs are only enabled if supporting IXP465 CPUs
 112  #
 113 --- a/arch/arm/mach-ixp4xx/Makefile
 114 +++ b/arch/arm/mach-ixp4xx/Makefile
 115 @@ -15,6 +15,7 @@
 116  obj-pci-$(CONFIG_MACH_DSMG600)         += dsmg600-pci.o
 117  obj-pci-$(CONFIG_MACH_GATEWAY7001)     += gateway7001-pci.o
 118  obj-pci-$(CONFIG_MACH_WG302V2)         += wg302v2-pci.o
 119 +obj-pci-$(CONFIG_MACH_FSG)             += fsg-pci.o
 120
 121  obj-y  += common.o
 122
 123 @@ -28,6 +29,7 @@
 124  obj-$(CONFIG_MACH_DSMG600)      += dsmg600-setup.o
 125  obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o
 126  obj-$(CONFIG_MACH_WG302V2)     += wg302v2-setup.o
 127 +obj-$(CONFIG_MACH_FSG)         += fsg-setup.o
 128
 129  obj-$(CONFIG_PCI)              += $(obj-pci-$(CONFIG_PCI)) common-pci.o
 130  obj-$(CONFIG_IXP4XX_QMGR)      += ixp4xx_qmgr.o
 131 --- /dev/null
 132 +++ b/arch/arm/mach-ixp4xx/fsg-pci.c
 133 @@ -0,0 +1,71 @@
 134 +/*
 135 + * arch/arch/mach-ixp4xx/fsg-pci.c
 136 + *
 137 + * FSG board-level PCI initialization
 138 + *
 139 + * Author: Rod Whitby <rod@whitby.id.au>
 140 + * Maintainer: http://www.nslu2-linux.org/
 141 + *
 142 + * based on ixdp425-pci.c:
 143 + *     Copyright (C) 2002 Intel Corporation.
 144 + *     Copyright (C) 2003-2004 MontaVista Software, Inc.
 145 + *
 146 + * This program is free software; you can redistribute it and/or modify
 147 + * it under the terms of the GNU General Public License version 2 as
 148 + * published by the Free Software Foundation.
 149 + *
 150 + */
 151 +
 152 +#include <linux/pci.h>
 153 +#include <linux/init.h>
 154 +#include <linux/irq.h>
 155 +
 156 +#include <asm/mach/pci.h>
 157 +#include <asm/mach-types.h>
 158 +
 159 +void __init fsg_pci_preinit(void)
 160 +{
 161 +       set_irq_type(IRQ_FSG_PCI_INTA, IRQT_LOW);
 162 +       set_irq_type(IRQ_FSG_PCI_INTB, IRQT_LOW);
 163 +       set_irq_type(IRQ_FSG_PCI_INTC, IRQT_LOW);
 164 +
 165 +       ixp4xx_pci_preinit();
 166 +}
 167 +
 168 +static int __init fsg_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
 169 +{
 170 +       static int pci_irq_table[FSG_PCI_IRQ_LINES] = {
 171 +               IRQ_FSG_PCI_INTC,
 172 +               IRQ_FSG_PCI_INTB,
 173 +               IRQ_FSG_PCI_INTA,
 174 +       };
 175 +
 176 +       int irq = -1;
 177 +       slot = slot - 11;
 178 +
 179 +       if (slot >= 1 && slot <= FSG_PCI_MAX_DEV &&
 180 +           pin >= 1 && pin <= FSG_PCI_IRQ_LINES)
 181 +               irq = pci_irq_table[(slot - 1)];
 182 +       printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n",
 183 +              __func__, slot, pin, irq);
 184 +
 185 +       return irq;
 186 +}
 187 +
 188 +struct hw_pci fsg_pci __initdata = {
 189 +       .nr_controllers = 1,
 190 +       .preinit =        fsg_pci_preinit,
 191 +       .swizzle =        pci_std_swizzle,
 192 +       .setup =          ixp4xx_setup,
 193 +       .scan =           ixp4xx_scan_bus,
 194 +       .map_irq =        fsg_map_irq,
 195 +};
 196 +
 197 +int __init fsg_pci_init(void)
 198 +{
 199 +       if (machine_is_fsg())
 200 +               pci_common_init(&fsg_pci);
 201 +       return 0;
 202 +}
 203 +
 204 +subsys_initcall(fsg_pci_init);
 205 --- /dev/null
 206 +++ b/arch/arm/mach-ixp4xx/fsg-setup.c
 207 @@ -0,0 +1,276 @@
 208 +/*
 209 + * arch/arm/mach-ixp4xx/fsg-setup.c
 210 + *
 211 + * FSG board-setup
 212 + *
 213 + * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
 214 + *
 215 + * based on ixdp425-setup.c:
 216 + *     Copyright (C) 2003-2004 MontaVista Software, Inc.
 217 + * based on nslu2-power.c
 218 + *     Copyright (C) 2005 Tower Technologies
 219 + *
 220 + * Author: Rod Whitby <rod@whitby.id.au>
 221 + * Maintainers: http://www.nslu2-linux.org/
 222 + *
 223 + */
 224 +
 225 +#include <linux/if_ether.h>
 226 +#include <linux/irq.h>
 227 +#include <linux/serial.h>
 228 +#include <linux/serial_8250.h>
 229 +#include <linux/leds.h>
 230 +#include <linux/reboot.h>
 231 +#include <linux/i2c.h>
 232 +#include <linux/i2c-gpio.h>
 233 +
 234 +#include <asm/mach-types.h>
 235 +#include <asm/mach/arch.h>
 236 +#include <asm/mach/flash.h>
 237 +#include <asm/io.h>
 238 +#include <asm/gpio.h>
 239 +
 240 +static struct flash_platform_data fsg_flash_data = {
 241 +       .map_name               = "cfi_probe",
 242 +       .width                  = 2,
 243 +};
 244 +
 245 +static struct resource fsg_flash_resource = {
 246 +       .flags                  = IORESOURCE_MEM,
 247 +};
 248 +
 249 +static struct platform_device fsg_flash = {
 250 +       .name                   = "IXP4XX-Flash",
 251 +       .id                     = 0,
 252 +       .dev = {
 253 +               .platform_data  = &fsg_flash_data,
 254 +       },
 255 +       .num_resources          = 1,
 256 +       .resource               = &fsg_flash_resource,
 257 +};
 258 +
 259 +static struct i2c_gpio_platform_data fsg_i2c_gpio_data = {
 260 +       .sda_pin                = FSG_SDA_PIN,
 261 +       .scl_pin                = FSG_SCL_PIN,
 262 +};
 263 +
 264 +static struct platform_device fsg_i2c_gpio = {
 265 +       .name                   = "i2c-gpio",
 266 +       .id                     = 0,
 267 +       .dev = {
 268 +               .platform_data  = &fsg_i2c_gpio_data,
 269 +       },
 270 +};
 271 +
 272 +static struct i2c_board_info __initdata fsg_i2c_board_info [] = {
 273 +       {
 274 +               I2C_BOARD_INFO("rtc-isl1208", 0x6f),
 275 +       },
 276 +};
 277 +
 278 +static struct resource fsg_uart_resources[] = {
 279 +       {
 280 +               .start          = IXP4XX_UART1_BASE_PHYS,
 281 +               .end            = IXP4XX_UART1_BASE_PHYS + 0x0fff,
 282 +               .flags          = IORESOURCE_MEM,
 283 +       },
 284 +       {
 285 +               .start          = IXP4XX_UART2_BASE_PHYS,
 286 +               .end            = IXP4XX_UART2_BASE_PHYS + 0x0fff,
 287 +               .flags          = IORESOURCE_MEM,
 288 +       }
 289 +};
 290 +
 291 +static struct plat_serial8250_port fsg_uart_data[] = {
 292 +       {
 293 +               .mapbase        = IXP4XX_UART1_BASE_PHYS,
 294 +               .membase        = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
 295 +               .irq            = IRQ_IXP4XX_UART1,
 296 +               .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 297 +               .iotype         = UPIO_MEM,
 298 +               .regshift       = 2,
 299 +               .uartclk        = IXP4XX_UART_XTAL,
 300 +       },
 301 +       {
 302 +               .mapbase        = IXP4XX_UART2_BASE_PHYS,
 303 +               .membase        = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
 304 +               .irq            = IRQ_IXP4XX_UART2,
 305 +               .flags          = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
 306 +               .iotype         = UPIO_MEM,
 307 +               .regshift       = 2,
 308 +               .uartclk        = IXP4XX_UART_XTAL,
 309 +       },
 310 +       { }
 311 +};
 312 +
 313 +static struct platform_device fsg_uart = {
 314 +       .name                   = "serial8250",
 315 +       .id                     = PLAT8250_DEV_PLATFORM,
 316 +       .dev = {
 317 +               .platform_data  = fsg_uart_data,
 318 +       },
 319 +       .num_resources          = ARRAY_SIZE(fsg_uart_resources),
 320 +       .resource               = fsg_uart_resources,
 321 +};
 322 +
 323 +static struct platform_device fsg_leds = {
 324 +       .name           = "fsg-led",
 325 +       .id             = -1,
 326 +};
 327 +
 328 +/* Built-in 10/100 Ethernet MAC interfaces */
 329 +static struct eth_plat_info fsg_plat_eth[] = {
 330 +       {
 331 +               .phy            = 5,
 332 +               .rxq            = 3,
 333 +               .txreadyq       = 20,
 334 +       }, {
 335 +               .phy            = 4,
 336 +               .rxq            = 4,
 337 +               .txreadyq       = 21,
 338 +       }
 339 +};
 340 +
 341 +static struct platform_device fsg_eth[] = {
 342 +       {
 343 +               .name                   = "ixp4xx_eth",
 344 +               .id                     = IXP4XX_ETH_NPEB,
 345 +               .dev = {
 346 +                       .platform_data  = fsg_plat_eth,
 347 +               },
 348 +       }, {
 349 +               .name                   = "ixp4xx_eth",
 350 +               .id                     = IXP4XX_ETH_NPEC,
 351 +               .dev = {
 352 +                       .platform_data  = fsg_plat_eth + 1,
 353 +               },
 354 +       }
 355 +};
 356 +
 357 +static struct platform_device *fsg_devices[] __initdata = {
 358 +       &fsg_i2c_gpio,
 359 +       &fsg_flash,
 360 +       &fsg_leds,
 361 +       &fsg_eth[0],
 362 +       &fsg_eth[1],
 363 +};
 364 +
 365 +static irqreturn_t fsg_power_handler(int irq, void *dev_id)
 366 +{
 367 +       /* Signal init to do the ctrlaltdel action, this will bypass init if
 368 +        * it hasn't started and do a kernel_restart.
 369 +        */
 370 +       ctrl_alt_del();
 371 +
 372 +       return IRQ_HANDLED;
 373 +}
 374 +
 375 +static irqreturn_t fsg_reset_handler(int irq, void *dev_id)
 376 +{
 377 +       /* This is the paper-clip reset which does an emergency reboot. */
 378 +       printk(KERN_INFO "Restarting system.\n");
 379 +       machine_restart(NULL);
 380 +
 381 +       /* This should never be reached. */
 382 +       return IRQ_HANDLED;
 383 +}
 384 +
 385 +static void __init fsg_init(void)
 386 +{
 387 +       DECLARE_MAC_BUF(mac_buf);
 388 +       uint8_t __iomem *f;
 389 +       int i;
 390 +
 391 +       ixp4xx_sys_init();
 392 +
 393 +       fsg_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
 394 +       fsg_flash_resource.end =
 395 +               IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
 396 +
 397 +       *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
 398 +       *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
 399 +
 400 +       /* Configure CS2 for operation, 8bit and writable */
 401 +       *IXP4XX_EXP_CS2 = 0xbfff0002;
 402 +
 403 +       i2c_register_board_info(0, fsg_i2c_board_info,
 404 +                               ARRAY_SIZE(fsg_i2c_board_info));
 405 +
 406 +       /* This is only useful on a modified machine, but it is valuable
 407 +        * to have it first in order to see debug messages, and so that
 408 +        * it does *not* get removed if platform_add_devices fails!
 409 +        */
 410 +       (void)platform_device_register(&fsg_uart);
 411 +
 412 +       platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices));
 413 +
 414 +       if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler,
 415 +                       IRQF_DISABLED | IRQF_TRIGGER_LOW,
 416 +                       "FSG reset button", NULL) < 0) {
 417 +
 418 +               printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
 419 +                       gpio_to_irq(FSG_RB_GPIO));
 420 +       }
 421 +
 422 +       if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler,
 423 +                       IRQF_DISABLED | IRQF_TRIGGER_LOW,
 424 +                       "FSG power button", NULL) < 0) {
 425 +
 426 +               printk(KERN_DEBUG "Power Button IRQ %d not available\n",
 427 +                       gpio_to_irq(FSG_SB_GPIO));
 428 +       }
 429 +
 430 +       /*
 431 +        * Map in a portion of the flash and read the MAC addresses.
 432 +        * Since it is stored in BE in the flash itself, we need to
 433 +        * byteswap it if we're in LE mode.
 434 +        */
 435 +       f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x400000);
 436 +       if (f) {
 437 +#ifdef __ARMEB__
 438 +               for (i = 0; i < 6; i++) {
 439 +                       fsg_plat_eth[0].hwaddr[i] = readb(f + 0x3C0422 + i);
 440 +                       fsg_plat_eth[1].hwaddr[i] = readb(f + 0x3C043B + i);
 441 +               }
 442 +#else
 443 +
 444 +               /*
 445 +                 Endian-swapped reads from unaligned addresses are
 446 +                 required to extract the two MACs from the big-endian
 447 +                 Redboot config area in flash.
 448 +               */
 449 +
 450 +               fsg_plat_eth[0].hwaddr[0] = readb(f + 0x3C0421);
 451 +               fsg_plat_eth[0].hwaddr[1] = readb(f + 0x3C0420);
 452 +               fsg_plat_eth[0].hwaddr[2] = readb(f + 0x3C0427);
 453 +               fsg_plat_eth[0].hwaddr[3] = readb(f + 0x3C0426);
 454 +               fsg_plat_eth[0].hwaddr[4] = readb(f + 0x3C0425);
 455 +               fsg_plat_eth[0].hwaddr[5] = readb(f + 0x3C0424);
 456 +
 457 +               fsg_plat_eth[1].hwaddr[0] = readb(f + 0x3C0439);
 458 +               fsg_plat_eth[1].hwaddr[1] = readb(f + 0x3C043F);
 459 +               fsg_plat_eth[1].hwaddr[2] = readb(f + 0x3C043E);
 460 +               fsg_plat_eth[1].hwaddr[3] = readb(f + 0x3C043D);
 461 +               fsg_plat_eth[1].hwaddr[4] = readb(f + 0x3C043C);
 462 +               fsg_plat_eth[1].hwaddr[5] = readb(f + 0x3C0443);
 463 +#endif
 464 +               iounmap(f);
 465 +       }
 466 +       printk(KERN_INFO "FSG: Using MAC address %s for port 0\n",
 467 +              print_mac(mac_buf, fsg_plat_eth[0].hwaddr));
 468 +       printk(KERN_INFO "FSG: Using MAC address %s for port 1\n",
 469 +              print_mac(mac_buf, fsg_plat_eth[1].hwaddr));
 470 +
 471 +}
 472 +
 473 +MACHINE_START(FSG, "Freecom FSG-3")
 474 +       /* Maintainer: www.nslu2-linux.org */
 475 +       .phys_io        = IXP4XX_PERIPHERAL_BASE_PHYS,
 476 +       .io_pg_offst    = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
 477 +       .map_io         = ixp4xx_map_io,
 478 +       .init_irq       = ixp4xx_init_irq,
 479 +       .timer          = &ixp4xx_timer,
 480 +       .boot_params    = 0x0100,
 481 +       .init_machine   = fsg_init,
 482 +MACHINE_END
 483 +
 484 --- /dev/null
 485 +++ b/include/asm-arm/arch-ixp4xx/fsg.h
 486 @@ -0,0 +1,50 @@
 487 +/*
 488 + * include/asm-arm/arch-ixp4xx/fsg.h
 489 + *
 490 + * Freecom FSG-3 platform specific definitions
 491 + *
 492 + * Author: Rod Whitby <rod@whitby.id.au>
 493 + * Author: Tomasz Chmielewski <mangoo@wpkg.org>
 494 + * Maintainers: http://www.nslu2-linux.org
 495 + *
 496 + * Based on coyote.h by
 497 + * Copyright 2004 (c) MontaVista, Software, Inc.
 498 + *
 499 + * This file is licensed under  the terms of the GNU General Public
 500 + * License version 2. This program is licensed "as is" without any
 501 + * warranty of any kind, whether express or implied.
 502 + */
 503 +
 504 +#ifndef __ASM_ARCH_HARDWARE_H__
 505 +#error "Do not include this directly, instead #include <asm/hardware.h>"
 506 +#endif
 507 +
 508 +#define FSG_SDA_PIN            12
 509 +#define FSG_SCL_PIN            13
 510 +
 511 +/*
 512 + * FSG PCI IRQs
 513 + */
 514 +#define FSG_PCI_MAX_DEV                3
 515 +#define FSG_PCI_IRQ_LINES      3
 516 +
 517 +
 518 +/* PCI controller GPIO to IRQ pin mappings */
 519 +#define FSG_PCI_INTA_PIN       6
 520 +#define FSG_PCI_INTB_PIN       7
 521 +#define FSG_PCI_INTC_PIN       5
 522 +
 523 +/* Buttons */
 524 +
 525 +#define FSG_SB_GPIO            4       /* sync button */
 526 +#define FSG_RB_GPIO            9       /* reset button */
 527 +#define FSG_UB_GPIO            10      /* usb button */
 528 +
 529 +/* LEDs */
 530 +
 531 +#define FSG_LED_WLAN_BIT       0
 532 +#define FSG_LED_WAN_BIT                1
 533 +#define FSG_LED_SATA_BIT       2
 534 +#define FSG_LED_USB_BIT                4
 535 +#define FSG_LED_RING_BIT       5
 536 +#define FSG_LED_SYNC_BIT       7
 537 --- a/include/asm-arm/arch-ixp4xx/hardware.h
 538 +++ b/include/asm-arm/arch-ixp4xx/hardware.h
 539 @@ -45,5 +45,6 @@
 540  #include "nslu2.h"
 541  #include "nas100d.h"
 542  #include "dsmg600.h"
 543 +#include "fsg.h"
 544
 545  #endif  /* _ASM_ARCH_HARDWARE_H */
 546 --- a/include/asm-arm/arch-ixp4xx/irqs.h
 547 +++ b/include/asm-arm/arch-ixp4xx/irqs.h
 548 @@ -128,4 +128,11 @@
 549  #define        IRQ_DSMG600_PCI_INTE    IRQ_IXP4XX_GPIO7
 550  #define        IRQ_DSMG600_PCI_INTF    IRQ_IXP4XX_GPIO6
 551
 552 +/*
 553 + * Freecom FSG-3 Board IRQs
 554 + */
 555 +#define        IRQ_FSG_PCI_INTA        IRQ_IXP4XX_GPIO6
 556 +#define        IRQ_FSG_PCI_INTB        IRQ_IXP4XX_GPIO7
 557 +#define        IRQ_FSG_PCI_INTC        IRQ_IXP4XX_GPIO5
 558 +
 559  #endif