target/linux/ifxmips/files/drivers/serial/ifxmips_asc.c

   1 /*
   2  *  Driver for IFXMIPSASC serial ports
   3  *
   4  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  *
  20  * Copyright (C) 2004 Infineon IFAP DC COM CPE
  21  * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
  22  * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
  23  */
  24
  25 #include <linux/module.h>
  26 #include <linux/errno.h>
  27 #include <linux/signal.h>
  28 #include <linux/sched.h>
  29 #include <linux/interrupt.h>
  30 #include <linux/tty.h>
  31 #include <linux/tty_flip.h>
  32 #include <linux/major.h>
  33 #include <linux/string.h>
  34 #include <linux/fcntl.h>
  35 #include <linux/ptrace.h>
  36 #include <linux/ioport.h>
  37 #include <linux/mm.h>
  38 #include <linux/slab.h>
  39 #include <linux/init.h>
  40 #include <linux/circ_buf.h>
  41 #include <linux/serial.h>
  42 #include <linux/serial_core.h>
  43 #include <linux/console.h>
  44 #include <linux/sysrq.h>
  45 #include <linux/irq.h>
  46
  47 #include <asm/system.h>
  48 #include <asm/io.h>
  49 #include <asm/uaccess.h>
  50 #include <asm/bitops.h>
  51 #include <asm/ifxmips/ifxmips.h>
  52 #include <asm/ifxmips/ifxmips_irq.h>
  53 #include <asm/ifxmips/ifxmips_serial.h>
  54
  55 #define PORT_IFXMIPSASC  111
  56
  57 #include <linux/serial_core.h>
  58
  59 #define UART_DUMMY_UER_RX 1
  60
  61 static void ifxmipsasc_tx_chars(struct uart_port *port);
  62 extern void prom_printf(const char * fmt, ...);
  63 static struct uart_port ifxmipsasc_port;
  64 static struct uart_driver ifxmipsasc_reg;
  65 static unsigned int uartclk = 0;
  66 extern unsigned int ifxmips_get_fpi_hz(void);
  67
  68 static void
  69 ifxmipsasc_stop_tx (struct uart_port *port)
  70 {
  71         /* fifo underrun shuts up after firing once */
  72         return;
  73 }
  74
  75 static void
  76 ifxmipsasc_start_tx (struct uart_port *port)
  77 {
  78         unsigned long flags;
  79
  80         local_irq_save(flags);
  81         ifxmipsasc_tx_chars(port);
  82         local_irq_restore(flags);
  83
  84         return;
  85 }
  86
  87 static void
  88 ifxmipsasc_stop_rx (struct uart_port *port)
  89 {
  90         /* clear the RX enable bit */
  91         writel(ASCWHBSTATE_CLRREN, IFXMIPS_ASC1_WHBSTATE);
  92 }
  93
  94 static void
  95 ifxmipsasc_enable_ms (struct uart_port *port)
  96 {
  97         /* no modem signals */
  98         return;
  99 }
 100
 101 static void
 102 ifxmipsasc_rx_chars (struct uart_port *port)
 103 {
 104         struct tty_struct *tty = port->info->tty;
 105         unsigned int ch = 0, rsr = 0, fifocnt;
 106
 107         fifocnt = readl(IFXMIPS_ASC1_FSTAT) & ASCFSTAT_RXFFLMASK;
 108         while (fifocnt--)
 109         {
 110                 u8 flag = TTY_NORMAL;
 111                 ch = readl(IFXMIPS_ASC1_RBUF);
 112                 rsr = (readl(IFXMIPS_ASC1_STATE) & ASCSTATE_ANY) | UART_DUMMY_UER_RX;
 113                 tty_flip_buffer_push(tty);
 114                 port->icount.rx++;
 115
 116                 /*
 117                  * Note that the error handling code is
 118                  * out of the main execution path
 119                  */
 120                 if (rsr & ASCSTATE_ANY) {
 121                         if (rsr & ASCSTATE_PE) {
 122                                 port->icount.parity++;
 123                                 writel(readl(IFXMIPS_ASC1_WHBSTATE) | ASCWHBSTATE_CLRPE, IFXMIPS_ASC1_WHBSTATE);
 124                         } else if (rsr & ASCSTATE_FE) {
 125                                 port->icount.frame++;
 126                                 writel(readl(IFXMIPS_ASC1_WHBSTATE) | ASCWHBSTATE_CLRFE, IFXMIPS_ASC1_WHBSTATE);
 127                         }
 128                         if (rsr & ASCSTATE_ROE) {
 129                                 port->icount.overrun++;
 130                                 writel(readl(IFXMIPS_ASC1_WHBSTATE) | ASCWHBSTATE_CLRROE, IFXMIPS_ASC1_WHBSTATE);
 131                         }
 132
 133                         rsr &= port->read_status_mask;
 134
 135                         if (rsr & ASCSTATE_PE)
 136                                 flag = TTY_PARITY;
 137                         else if (rsr & ASCSTATE_FE)
 138                                 flag = TTY_FRAME;
 139                 }
 140
 141                 if ((rsr & port->ignore_status_mask) == 0)
 142                         tty_insert_flip_char(tty, ch, flag);
 143
 144                 if (rsr & ASCSTATE_ROE)
 145                         /*
 146                          * Overrun is special, since it's reported
 147                          * immediately, and doesn't affect the current
 148                          * character
 149                          */
 150                         tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 151         }
 152         if (ch != 0)
 153                 tty_flip_buffer_push(tty);
 154
 155         return;
 156 }
 157
 158
 159 static void
 160 ifxmipsasc_tx_chars (struct uart_port *port)
 161 {
 162         struct circ_buf *xmit = &port->info->xmit;
 163
 164         if (uart_tx_stopped(port)) {
 165                 ifxmipsasc_stop_tx(port);
 166                 return;
 167         }
 168
 169         while(((readl(IFXMIPS_ASC1_FSTAT) & ASCFSTAT_TXFFLMASK)
 170                                 >> ASCFSTAT_TXFFLOFF) != IFXMIPSASC_TXFIFO_FULL)
 171         {
 172                 if (port->x_char) {
 173                         writel(port->x_char, IFXMIPS_ASC1_TBUF);
 174                         port->icount.tx++;
 175                         port->x_char = 0;
 176                         continue;
 177                 }
 178
 179                 if (uart_circ_empty(xmit))
 180                         break;
 181
 182                 writel(port->info->xmit.buf[port->info->xmit.tail], IFXMIPS_ASC1_TBUF);
 183                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 184                 port->icount.tx++;
 185         }
 186
 187         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 188                 uart_write_wakeup(port);
 189 }
 190
 191 static irqreturn_t
 192 ifxmipsasc_tx_int (int irq, void *port)
 193 {
 194         writel(ASC_IRNCR_TIR, IFXMIPS_ASC1_IRNCR);
 195         ifxmipsasc_start_tx(port);
 196         mask_and_ack_ifxmips_irq(irq);
 197
 198         return IRQ_HANDLED;
 199 }
 200
 201 static irqreturn_t
 202 ifxmipsasc_er_int (int irq, void *port)
 203 {
 204         /* clear any pending interrupts */
 205         writel(readl(IFXMIPS_ASC1_WHBSTATE) | ASCWHBSTATE_CLRPE |
 206                         ASCWHBSTATE_CLRFE | ASCWHBSTATE_CLRROE, IFXMIPS_ASC1_WHBSTATE);
 207
 208         return IRQ_HANDLED;
 209 }
 210
 211 static irqreturn_t
 212 ifxmipsasc_rx_int (int irq, void *port)
 213 {
 214         writel(ASC_IRNCR_RIR, IFXMIPS_ASC1_IRNCR);
 215         ifxmipsasc_rx_chars((struct uart_port *) port);
 216         mask_and_ack_ifxmips_irq(irq);
 217
 218         return IRQ_HANDLED;
 219 }
 220
 221 static unsigned int
 222 ifxmipsasc_tx_empty (struct uart_port *port)
 223 {
 224         int status;
 225
 226         status = readl(IFXMIPS_ASC1_FSTAT) & ASCFSTAT_TXFFLMASK;
 227
 228         return status ? 0 : TIOCSER_TEMT;
 229 }
 230
 231 static unsigned int
 232 ifxmipsasc_get_mctrl (struct uart_port *port)
 233 {
 234         return TIOCM_CTS | TIOCM_CAR | TIOCM_DSR;
 235 }
 236
 237 static void
 238 ifxmipsasc_set_mctrl (struct uart_port *port, u_int mctrl)
 239 {
 240         return;
 241 }
 242
 243 static void
 244 ifxmipsasc_break_ctl (struct uart_port *port, int break_state)
 245 {
 246         return;
 247 }
 248
 249 static void
 250 ifxmipsasc1_hw_init (void)
 251 {
 252         /* this setup was probably already done in ROM/u-boot  but we do it again*/
 253         /* TODO: GPIO pins are multifunction */
 254         writel(readl(IFXMIPS_ASC1_CLC) & ~IFXMIPS_ASC1_CLC_DISS, IFXMIPS_ASC1_CLC);
 255         writel((readl(IFXMIPS_ASC1_CLC) & ~ASCCLC_RMCMASK) | (1 << ASCCLC_RMCOFFSET), IFXMIPS_ASC1_CLC);
 256         writel(0, IFXMIPS_ASC1_PISEL);
 257         writel(((IFXMIPSASC_TXFIFO_FL << ASCTXFCON_TXFITLOFF) &
 258                 ASCTXFCON_TXFITLMASK) | ASCTXFCON_TXFEN | ASCTXFCON_TXFFLU, IFXMIPS_ASC1_TXFCON);
 259         writel(((IFXMIPSASC_RXFIFO_FL << ASCRXFCON_RXFITLOFF) &
 260                 ASCRXFCON_RXFITLMASK) | ASCRXFCON_RXFEN | ASCRXFCON_RXFFLU, IFXMIPS_ASC1_RXFCON);
 261         wmb ();
 262
 263         /*framing, overrun, enable */
 264         writel(readl(IFXMIPS_ASC1_CON) | ASCCON_M_8ASYNC | ASCCON_FEN | ASCCON_TOEN | ASCCON_ROEN,
 265                 IFXMIPS_ASC1_CON);
 266 }
 267
 268 static int
 269 ifxmipsasc_startup (struct uart_port *port)
 270 {
 271         unsigned long flags;
 272         int retval;
 273
 274         /* this assumes: CON.BRS = CON.FDE = 0 */
 275         if (uartclk == 0)
 276                 uartclk = ifxmips_get_fpi_hz();
 277
 278         ifxmipsasc_port.uartclk = uartclk;
 279
 280         ifxmipsasc1_hw_init();
 281
 282         local_irq_save(flags);
 283
 284         retval = request_irq(IFXMIPSASC1_RIR, ifxmipsasc_rx_int, IRQF_DISABLED, "asc_rx", port);
 285         if (retval){
 286                 printk("failed to request ifxmipsasc_rx_int\n");
 287                 return retval;
 288         }
 289
 290         retval = request_irq(IFXMIPSASC1_TIR, ifxmipsasc_tx_int, IRQF_DISABLED, "asc_tx", port);
 291         if (retval){
 292                 printk("failed to request ifxmipsasc_tx_int\n");
 293                 goto err1;
 294         }
 295
 296         retval = request_irq(IFXMIPSASC1_EIR, ifxmipsasc_er_int, IRQF_DISABLED, "asc_er", port);
 297         if (retval){
 298                 printk("failed to request ifxmipsasc_er_int\n");
 299                 goto err2;
 300         }
 301
 302         writel(ASC_IRNREN_RX_BUF | ASC_IRNREN_TX_BUF | ASC_IRNREN_ERR | ASC_IRNREN_TX,
 303                 IFXMIPS_ASC1_IRNREN);
 304
 305         local_irq_restore(flags);
 306
 307         return 0;
 308
 309 err2:
 310         free_irq(IFXMIPSASC1_TIR, port);
 311
 312 err1:
 313         free_irq(IFXMIPSASC1_RIR, port);
 314         local_irq_restore(flags);
 315
 316         return retval;
 317 }
 318
 319 static void
 320 ifxmipsasc_shutdown (struct uart_port *port)
 321 {
 322         free_irq(IFXMIPSASC1_RIR, port);
 323         free_irq(IFXMIPSASC1_TIR, port);
 324         free_irq(IFXMIPSASC1_EIR, port);
 325         /*
 326          * disable the baudrate generator to disable the ASC
 327          */
 328         writel(0, IFXMIPS_ASC1_CON);
 329
 330         /* flush and then disable the fifos */
 331         writel(readl(IFXMIPS_ASC1_RXFCON) | ASCRXFCON_RXFFLU, IFXMIPS_ASC1_RXFCON);
 332         writel(readl(IFXMIPS_ASC1_RXFCON) & ~ASCRXFCON_RXFEN, IFXMIPS_ASC1_RXFCON);
 333         writel(readl(IFXMIPS_ASC1_TXFCON) | ASCTXFCON_TXFFLU, IFXMIPS_ASC1_TXFCON);
 334         writel(readl(IFXMIPS_ASC1_TXFCON) & ~ASCTXFCON_TXFEN, IFXMIPS_ASC1_TXFCON);
 335 }
 336
 337 static void ifxmipsasc_set_termios(struct uart_port *port, struct ktermios *new, struct ktermios *old)
 338 {
 339         unsigned int cflag;
 340         unsigned int iflag;
 341         unsigned int quot;
 342         unsigned int baud;
 343         unsigned int con = 0;
 344         unsigned long flags;
 345
 346         cflag = new->c_cflag;
 347         iflag = new->c_iflag;
 348
 349         /* byte size and parity */
 350         switch (cflag & CSIZE) {
 351         case CS7:
 352                 con = ASCCON_M_7ASYNC;
 353                 break;
 354
 355         case CS5:
 356         case CS6:
 357         default:
 358                 con = ASCCON_M_8ASYNC;
 359                 break;
 360         }
 361
 362         if (cflag & CSTOPB)
 363                 con |= ASCCON_STP;
 364
 365         if (cflag & PARENB) {
 366                 if (!(cflag & PARODD))
 367                         con &= ~ASCCON_ODD;
 368                 else
 369                         con |= ASCCON_ODD;
 370         }
 371
 372         port->read_status_mask = ASCSTATE_ROE;
 373         if (iflag & INPCK)
 374                 port->read_status_mask |= ASCSTATE_FE | ASCSTATE_PE;
 375
 376         port->ignore_status_mask = 0;
 377         if (iflag & IGNPAR)
 378                 port->ignore_status_mask |= ASCSTATE_FE | ASCSTATE_PE;
 379
 380         if (iflag & IGNBRK) {
 381                 /*
 382                  * If we're ignoring parity and break indicators,
 383                  * ignore overruns too (for real raw support).
 384                  */
 385                 if (iflag & IGNPAR)
 386                         port->ignore_status_mask |= ASCSTATE_ROE;
 387         }
 388
 389         if ((cflag & CREAD) == 0)
 390                 port->ignore_status_mask |= UART_DUMMY_UER_RX;
 391
 392         /* set error signals  - framing, parity  and overrun, enable receiver */
 393         con |= ASCCON_FEN | ASCCON_TOEN | ASCCON_ROEN;
 394
 395         local_irq_save(flags);
 396
 397         /* set up CON */
 398         writel(readl(IFXMIPS_ASC1_CON) | con, IFXMIPS_ASC1_CON);
 399
 400         /* Set baud rate - take a divider of 2 into account */
 401     baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
 402         quot = uart_get_divisor(port, baud);
 403         quot = quot / 2 - 1;
 404
 405         /* disable the baudrate generator */
 406         writel(readl(IFXMIPS_ASC1_CON) & ~ASCCON_R, IFXMIPS_ASC1_CON);
 407
 408         /* make sure the fractional divider is off */
 409         writel(readl(IFXMIPS_ASC1_CON) & ~ASCCON_FDE, IFXMIPS_ASC1_CON);
 410
 411         /* set up to use divisor of 2 */
 412         writel(readl(IFXMIPS_ASC1_CON) & ~ASCCON_BRS, IFXMIPS_ASC1_CON);
 413
 414         /* now we can write the new baudrate into the register */
 415         writel(quot, IFXMIPS_ASC1_BG);
 416
 417         /* turn the baudrate generator back on */
 418         writel(readl(IFXMIPS_ASC1_CON) | ASCCON_R, IFXMIPS_ASC1_CON);
 419
 420         /* enable rx */
 421         writel(ASCWHBSTATE_SETREN, IFXMIPS_ASC1_WHBSTATE);
 422
 423         local_irq_restore(flags);
 424 }
 425
 426 static const char*
 427 ifxmipsasc_type (struct uart_port *port)
 428 {
 429         return port->type == PORT_IFXMIPSASC ? "IFXMIPSASC" : NULL;
 430 }
 431
 432 static void
 433 ifxmipsasc_release_port (struct uart_port *port)
 434 {
 435         return;
 436 }
 437
 438 static int
 439 ifxmipsasc_request_port (struct uart_port *port)
 440 {
 441         return 0;
 442 }
 443
 444 static void
 445 ifxmipsasc_config_port (struct uart_port *port, int flags)
 446 {
 447         if (flags & UART_CONFIG_TYPE) {
 448                 port->type = PORT_IFXMIPSASC;
 449                 ifxmipsasc_request_port(port);
 450         }
 451 }
 452
 453 static int
 454 ifxmipsasc_verify_port (struct uart_port *port, struct serial_struct *ser)
 455 {
 456         int ret = 0;
 457         if (ser->type != PORT_UNKNOWN && ser->type != PORT_IFXMIPSASC)
 458                 ret = -EINVAL;
 459         if (ser->irq < 0 || ser->irq >= NR_IRQS)
 460                 ret = -EINVAL;
 461         if (ser->baud_base < 9600)
 462                 ret = -EINVAL;
 463         return ret;
 464 }
 465
 466 static struct uart_ops ifxmipsasc_pops = {
 467         .tx_empty =             ifxmipsasc_tx_empty,
 468         .set_mctrl =    ifxmipsasc_set_mctrl,
 469         .get_mctrl =    ifxmipsasc_get_mctrl,
 470         .stop_tx =              ifxmipsasc_stop_tx,
 471         .start_tx =             ifxmipsasc_start_tx,
 472         .stop_rx =              ifxmipsasc_stop_rx,
 473         .enable_ms =    ifxmipsasc_enable_ms,
 474         .break_ctl =    ifxmipsasc_break_ctl,
 475         .startup =              ifxmipsasc_startup,
 476         .shutdown =             ifxmipsasc_shutdown,
 477         .set_termios =  ifxmipsasc_set_termios,
 478         .type =                 ifxmipsasc_type,
 479         .release_port = ifxmipsasc_release_port,
 480         .request_port = ifxmipsasc_request_port,
 481         .config_port =  ifxmipsasc_config_port,
 482         .verify_port =  ifxmipsasc_verify_port,
 483 };
 484
 485 static struct uart_port ifxmipsasc_port = {
 486                 membase:        (void *)IFXMIPS_ASC1_BASE_ADDR,
 487                 mapbase:        IFXMIPS_ASC1_BASE_ADDR,
 488                 iotype:         SERIAL_IO_MEM,
 489                 irq:            IFXMIPSASC1_RIR,
 490                 uartclk:        0,
 491                 fifosize:       16,
 492                 unused:         {IFXMIPSASC1_TIR, IFXMIPSASC1_EIR},
 493                 type:           PORT_IFXMIPSASC,
 494                 ops:            &ifxmipsasc_pops,
 495                 flags:          ASYNC_BOOT_AUTOCONF,
 496 };
 497
 498 static void
 499 ifxmipsasc_console_write (struct console *co, const char *s, u_int count)
 500 {
 501         int i, fifocnt;
 502         unsigned long flags;
 503
 504         local_irq_save(flags);
 505         for (i = 0; i < count; i++)
 506         {
 507                 /* wait until the FIFO is not full */
 508                 do
 509                 {
 510                         fifocnt = (readl(IFXMIPS_ASC1_FSTAT) & ASCFSTAT_TXFFLMASK)
 511                                         >> ASCFSTAT_TXFFLOFF;
 512                 } while (fifocnt == IFXMIPSASC_TXFIFO_FULL);
 513
 514                 if (s[i] == '\0')
 515                 {
 516                         break;
 517                 }
 518
 519                 if (s[i] == '\n')
 520                 {
 521                         writel('\r', IFXMIPS_ASC1_TBUF);
 522                         do
 523                         {
 524                                 fifocnt = (readl(IFXMIPS_ASC1_FSTAT) & ASCFSTAT_TXFFLMASK)
 525                                         >> ASCFSTAT_TXFFLOFF;
 526                         } while (fifocnt == IFXMIPSASC_TXFIFO_FULL);
 527                 }
 528                 writel(s[i], IFXMIPS_ASC1_TBUF);
 529         }
 530
 531         local_irq_restore(flags);
 532 }
 533
 534 static int __init
 535 ifxmipsasc_console_setup (struct console *co, char *options)
 536 {
 537         struct uart_port *port;
 538         int baud = 115200;
 539         int bits = 8;
 540         int parity = 'n';
 541         int flow = 'n';
 542
 543         if (uartclk == 0)
 544                 uartclk = ifxmips_get_fpi_hz();
 545         co->index = 0;
 546         port = &ifxmipsasc_port;
 547         ifxmipsasc_port.uartclk = uartclk;
 548         ifxmipsasc_port.type = PORT_IFXMIPSASC;
 549
 550         if (options){
 551                 uart_parse_options(options, &baud, &parity, &bits, &flow);
 552         }
 553
 554         return uart_set_options(port, co, baud, parity, bits, flow);
 555 }
 556
 557 static struct uart_driver ifxmipsasc_reg;
 558 static struct console ifxmipsasc_console = {
 559         name:           "ttyS",
 560         write:          ifxmipsasc_console_write,
 561         device:         uart_console_device,
 562         setup:          ifxmipsasc_console_setup,
 563         flags:          CON_PRINTBUFFER,
 564         index:          -1,
 565         data:           &ifxmipsasc_reg,
 566 };
 567
 568 static int __init
 569 ifxmipsasc_console_init (void)
 570 {
 571         register_console(&ifxmipsasc_console);
 572         return 0;
 573 }
 574 console_initcall(ifxmipsasc_console_init);
 575
 576 static struct uart_driver ifxmipsasc_reg = {
 577         .owner =                        THIS_MODULE,
 578         .driver_name =          "serial",
 579         .dev_name =                     "ttyS",
 580         .major =                        TTY_MAJOR,
 581         .minor =                        64,
 582         .nr =                           1,
 583         .cons =                         &ifxmipsasc_console,
 584 };
 585
 586 static int __init
 587 ifxmipsasc_init (void)
 588 {
 589         unsigned char res;
 590
 591         uart_register_driver(&ifxmipsasc_reg);
 592         res = uart_add_one_port(&ifxmipsasc_reg, &ifxmipsasc_port);
 593
 594         return res;
 595 }
 596
 597 static void __exit
 598 ifxmipsasc_exit (void)
 599 {
 600         uart_unregister_driver(&ifxmipsasc_reg);
 601 }
 602
 603 module_init(ifxmipsasc_init);
 604 module_exit(ifxmipsasc_exit);
 605
 606 MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
 607 MODULE_DESCRIPTION("MIPS IFXMips serial port driver");
 608 MODULE_LICENSE("GPL");