1 #include <linux/types.h>
3 #include <linux/kernel.h>
4 #include <linux/init.h>
5 #include <linux/delay.h>
7 #include <asm/ifxmips/ifxmips.h>
8 #include <asm/ifxmips/ifxmips_irq.h>
9 #include <asm/addrspace.h>
10 #include <linux/vmalloc.h>
11 #include <asm/ifxmips/ifxmips_ebu.h>
13 #define IFXMIPS_PCI_CFG_BUSNUM_SHF 16
14 #define IFXMIPS_PCI_CFG_DEVNUM_SHF 11
15 #define IFXMIPS_PCI_CFG_FUNNUM_SHF 8
17 #define PCI_ACCESS_READ 0
18 #define PCI_ACCESS_WRITE 1
20 extern u32 ifxmips_pci_mapped_cfg;
23 ifxmips_pci_config_access(unsigned char access_type,
24 struct pci_bus *bus, unsigned int devfn, unsigned int where, u32 *data)
26 unsigned long cfg_base;
31 /* IFXMips support slot from 0 to 15 */
32 /* dev_fn 0&0x68 (AD29) is ifxmips itself */
33 if ((bus->number != 0) || ((devfn & 0xf8) > 0x78)
34 || ((devfn & 0xf8) == 0) || ((devfn & 0xf8) == 0x68))
37 spin_lock_irqsave(&ebu_lock, flags);
39 cfg_base = ifxmips_pci_mapped_cfg;
40 cfg_base |= (bus->number << IFXMIPS_PCI_CFG_BUSNUM_SHF) | (devfn <<
41 IFXMIPS_PCI_CFG_FUNNUM_SHF) | (where & ~0x3);
44 if (access_type == PCI_ACCESS_WRITE)
46 #ifdef CONFIG_SWAP_IO_SPACE
47 ifxmips_w32(swab32(*data), ((u32*)cfg_base));
49 ifxmips_w32(*data, ((u32*)cfg_base));
52 *data = ifxmips_r32(((u32*)(cfg_base)));
53 #ifdef CONFIG_SWAP_IO_SPACE
54 *data = swab32(*data);
59 /* clean possible Master abort */
60 cfg_base = (ifxmips_pci_mapped_cfg | (0x0 << IFXMIPS_PCI_CFG_FUNNUM_SHF)) + 4;
61 temp = ifxmips_r32(((u32*)(cfg_base)));
62 #ifdef CONFIG_SWAP_IO_SPACE
65 cfg_base = (ifxmips_pci_mapped_cfg | (0x68 << IFXMIPS_PCI_CFG_FUNNUM_SHF)) + 4;
66 ifxmips_w32(temp, ((u32*)cfg_base));
68 spin_unlock_irqrestore(&ebu_lock, flags);
70 if (((*data) == 0xffffffff) && (access_type == PCI_ACCESS_READ))
77 ifxmips_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn,
78 int where, int size, u32 * val)
82 if (ifxmips_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
83 return PCIBIOS_DEVICE_NOT_FOUND;
86 *val = (data >> ((where & 3) << 3)) & 0xff;
88 *val = (data >> ((where & 3) << 3)) & 0xffff;
92 return PCIBIOS_SUCCESSFUL;
96 ifxmips_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn,
97 int where, int size, u32 val)
105 if (ifxmips_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
106 return PCIBIOS_DEVICE_NOT_FOUND;
109 data = (data & ~(0xff << ((where & 3) << 3))) |
110 (val << ((where & 3) << 3));
112 data = (data & ~(0xffff << ((where & 3) << 3))) |
113 (val << ((where & 3) << 3));
116 if (ifxmips_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data))
117 return PCIBIOS_DEVICE_NOT_FOUND;
119 return PCIBIOS_SUCCESSFUL;