2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; either version 2 of the License, or
5 * (at your option) any later version.
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
16 * Copyright (C) 2006 infineon
17 * Copyright (C) 2007 John Crispin <blogic@openwrt.org>
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/version.h>
24 #include <linux/types.h>
26 #include <linux/miscdevice.h>
27 #include <linux/init.h>
28 #include <asm/uaccess.h>
29 #include <asm/unistd.h>
30 #include <linux/errno.h>
31 #include <asm/danube/danube.h>
32 #include <asm/danube/danube_gpio.h>
33 #include <asm/danube/danube_gptu.h>
35 #define LED_CONFIG 0x01
37 #define CONFIG_OPERATION_UPDATE_SOURCE 0x0001
38 #define CONFIG_OPERATION_BLINK 0x0002
39 #define CONFIG_OPERATION_UPDATE_CLOCK 0x0004
40 #define CONFIG_OPERATION_STORE_MODE 0x0008
41 #define CONFIG_OPERATION_SHIFT_CLOCK 0x0010
42 #define CONFIG_OPERATION_DATA_OFFSET 0x0020
43 #define CONFIG_OPERATION_NUMBER_OF_LED 0x0040
44 #define CONFIG_OPERATION_DATA 0x0080
45 #define CONFIG_OPERATION_MIPS0_ACCESS 0x0100
46 #define CONFIG_DATA_CLOCK_EDGE 0x0200
50 * Data Type Used to Call ioctl
52 struct led_config_param {
53 unsigned long operation_mask; // Select operations to be performed
54 unsigned long led; // LED to change update source (LED or ADSL)
55 unsigned long source; // Corresponding update source (LED or ADSL)
56 unsigned long blink_mask; // LEDs to set blink mode
57 unsigned long blink; // Set to blink mode or normal mode
58 unsigned long update_clock; // Select the source of update clock
59 unsigned long fpid; // If FPI is the source of update clock, set the divider
60 // else if GPT is the source, set the frequency
61 unsigned long store_mode; // Set clock mode or single pulse mode for store signal
62 unsigned long fpis; // FPI is the source of shift clock, set the divider
63 unsigned long data_offset; // Set cycles to be inserted before data is transmitted
64 unsigned long number_of_enabled_led; // Total number of LED to be enabled
65 unsigned long data_mask; // LEDs to set value
66 unsigned long data; // Corresponding value
67 unsigned long mips0_access_mask; // LEDs to set access right
68 unsigned long mips0_access; // 1: the corresponding data is output from MIPS0, 0: MIPS1
69 unsigned long f_data_clock_on_rising; // 1: data clock on rising edge, 0: data clock on falling edge
73 extern int danube_led_set_blink(unsigned int, unsigned int);
74 extern int danube_led_set_data(unsigned int, unsigned int);
75 extern int danube_led_config(struct led_config_param *);
77 #define DATA_CLOCKING_EDGE FALLING_EDGE
79 #define FALLING_EDGE 1
84 #define LED_SH_ALTSEL0 1
85 #define LED_SH_ALTSEL1 0
86 #define LED_SH_OPENDRAIN 1
90 #define LED_D_ALTSEL0 1
91 #define LED_D_ALTSEL1 0
92 #define LED_D_OPENDRAIN 1
96 #define LED_ST_ALTSEL0 1
97 #define LED_ST_ALTSEL1 0
98 #define LED_ST_OPENDRAIN 1
100 #define LED_ADSL0_PORT 0
101 #define LED_ADSL0_PIN 4
102 #define LED_ADSL0_DIR 1
103 #define LED_ADSL0_ALTSEL0 0
104 #define LED_ADSL0_ALTSEL1 1
105 #define LED_ADSL0_OPENDRAIN 1
106 #define LED_ADSL1_PORT 0
107 #define LED_ADSL1_PIN 5
108 #define LED_ADSL1_DIR 1
109 #define LED_ADSL1_ALTSEL0 1
110 #define LED_ADSL1_ALTSEL1 1
111 #define LED_ADSL1_OPENDRAIN 1
113 #if (LED_SH_PORT == LED_ADSL0_PORT && LED_SH_PIN == LED_ADSL0_PIN) \
114 || (LED_D_PORT == LED_ADSL0_PORT && LED_D_PIN == LED_ADSL0_PIN) \
115 || (LED_ST_PORT == LED_ADSL0_PORT && LED_ST_PIN == LED_ADSL0_PIN) \
116 || (LED_SH_PORT == LED_ADSL1_PORT && LED_SH_PIN == LED_ADSL1_PIN) \
117 || (LED_D_PORT == LED_ADSL1_PORT && LED_D_PIN == LED_ADSL1_PIN) \
118 || (LED_ST_PORT == LED_ADSL1_PORT && LED_ST_PIN == LED_ADSL1_PIN)
119 #define ADSL_LED_IS_EXCLUSIVE 1
121 #define ADSL_LED_IS_EXCLUSIVE 0
125 #define LED_SH_DIR_SETUP danube_port_set_dir_out
127 #define LED_SH_DIR_SETUP danube_port_clear_dir_out
130 #define LED_SH_ALTSEL0_SETUP danube_port_set_altsel0
132 #define LED_SH_ALTSEL0_SETUP danube_port_clear_altsel0
135 #define LED_SH_ALTSEL1_SETUP danube_port_set_altsel1
137 #define LED_SH_ALTSEL1_SETUP danube_port_clear_altsel1
140 #define LED_SH_OPENDRAIN_SETUP danube_port_set_open_drain
142 #define LED_SH_OPENDRAIN_SETUP danube_port_clear_open_drain
146 #define LED_D_DIR_SETUP danube_port_set_dir_out
148 #define LED_D_DIR_SETUP danube_port_clear_dir_out
151 #define LED_D_ALTSEL0_SETUP danube_port_set_altsel0
153 #define LED_D_ALTSEL0_SETUP danube_port_clear_altsel0
156 #define LED_D_ALTSEL1_SETUP danube_port_set_altsel1
158 #define LED_D_ALTSEL1_SETUP danube_port_clear_altsel1
161 #define LED_D_OPENDRAIN_SETUP danube_port_set_open_drain
163 #define LED_D_OPENDRAIN_SETUP danube_port_clear_open_drain
167 #define LED_ST_DIR_SETUP danube_port_set_dir_out
169 #define LED_ST_DIR_SETUP danube_port_clear_dir_out
172 #define LED_ST_ALTSEL0_SETUP danube_port_set_altsel0
174 #define LED_ST_ALTSEL0_SETUP danube_port_clear_altsel0
177 #define LED_ST_ALTSEL1_SETUP danube_port_set_altsel1
179 #define LED_ST_ALTSEL1_SETUP danube_port_clear_altsel1
182 #define LED_ST_OPENDRAIN_SETUP danube_port_set_open_drain
184 #define LED_ST_OPENDRAIN_SETUP danube_port_clear_open_drain
188 #define LED_ADSL0_DIR_SETUP danube_port_set_dir_out
190 #define LED_ADSL0_DIR_SETUP danube_port_clear_dir_out
192 #if LED_ADSL0_ALTSEL0
193 #define LED_ADSL0_ALTSEL0_SETUP danube_port_set_altsel0
195 #define LED_ADSL0_ALTSEL0_SETUP danube_port_clear_altsel0
197 #if LED_ADSL0_ALTSEL1
198 #define LED_ADSL0_ALTSEL1_SETUP danube_port_set_altsel1
200 #define LED_ADSL0_ALTSEL1_SETUP danube_port_clear_altsel1
202 #if LED_ADSL0_OPENDRAIN
203 #define LED_ADSL0_OPENDRAIN_SETUP danube_port_set_open_drain
205 #define LED_ADSL0_OPENDRAIN_SETUP danube_port_clear_open_drain
209 #define LED_ADSL1_DIR_SETUP danube_port_set_dir_out
211 #define LED_ADSL1_DIR_SETUP danube_port_clear_dir_out
213 #if LED_ADSL1_ALTSEL0
214 #define LED_ADSL1_ALTSEL0_SETUP danube_port_set_altsel0
216 #define LED_ADSL1_ALTSEL0_SETUP danube_port_clear_altsel0
218 #if LED_ADSL1_ALTSEL1
219 #define LED_ADSL1_ALTSEL1_SETUP danube_port_set_altsel1
221 #define LED_ADSL1_ALTSEL1_SETUP danube_port_clear_altsel1
223 #if LED_ADSL1_OPENDRAIN
224 #define LED_ADSL1_OPENDRAIN_SETUP danube_port_set_open_drain
226 #define LED_ADSL1_OPENDRAIN_SETUP danube_port_clear_open_drain
229 #define SET_BITS(x, msb, lsb, value) (((x) & ~(((1 << ((msb) + 1)) - 1) ^ ((1 << (lsb)) - 1))) | (((value) & ((1 << (1 + (msb) - (lsb))) - 1)) << (lsb)))
231 static struct semaphore led_sem;
233 static unsigned long gpt_on = 0;
234 static unsigned long gpt_freq = 0;
236 static unsigned long adsl_on = 0;
237 static unsigned long f_led_on = 0;
245 * GPT2 or FPID is the clock to update LEDs automatically.
247 if (readl(DANUBE_LED_CON1) >> 30)
251 * Check the status to prevent conflict of two consecutive update
253 for ( i = 100000; i != 0; i -= j / 16 )
256 if (!(readl(DANUBE_LED_CON0) & LED_CON0_SWU))
258 *DANUBE_LED_CON0 |= 1 << 31;
264 for ( j = 0; j < 1000 * 16; j++ );
270 static inline unsigned int
271 set_update_source (unsigned int reg, unsigned long led, unsigned long source)
273 return (reg & ~((led & 0x03) << 24)) | ((source & 0x03) << 24);
276 static inline unsigned int
277 set_blink_in_batch (unsigned int reg, unsigned long mask, unsigned long blink)
279 return (reg & (~(mask & 0x00FFFFFF) & 0x87FFFFFF)) | (blink & 0x00FFFFFF);
282 static inline unsigned int
283 set_data_clock_edge (unsigned int reg, unsigned long f_on_rising_edge)
285 return f_on_rising_edge ? (reg & ~(1 << 26)) : (reg | (1 << 26));
288 static inline unsigned int
289 set_update_clock (unsigned int reg, unsigned long clock, unsigned long fpid)
298 reg = (reg & ~0xC0000000) | 0x40000000;
302 reg = (reg & ~0xCF800000) | 0x80000000 | ((fpid & 0x1F) << 23);
309 static inline unsigned int
310 set_store_mode (unsigned int reg, unsigned long mode)
312 return mode ? (reg | (1 << 28)) : (reg & ~(1 << 28));
316 unsigned int set_shift_clock (unsigned int reg, unsigned long fpis)
318 return SET_BITS(reg, 21, 20, fpis);
322 unsigned int set_data_offset (unsigned int reg, unsigned long offset)
324 return SET_BITS(reg, 19, 18, offset);
328 unsigned int set_number_of_enabled_led (unsigned int reg, unsigned long number)
330 unsigned int bit_mask;
332 bit_mask = number > 16 ? 0x07 : (number > 8 ? 0x03 : (number ? 0x01 : 0x00));
333 return (reg & ~0x07) | bit_mask;
336 static inline unsigned int
337 set_data_in_batch (unsigned int reg, unsigned long mask, unsigned long data)
339 return (reg & ~(mask & 0x00FFFFFF)) | (data & 0x00FFFFFF);
342 static inline unsigned int
343 set_access_right (unsigned int reg, unsigned long mask, unsigned long ar)
345 return (reg & ~(mask & 0x00FFFFFF)) | (~ar & mask);
351 /* Activate LED module in PMU. */
354 writel(readl(DANUBE_PMU_PWDCR) & ~DANUBE_PMU_PWDCR_LED, DANUBE_PMU_PWDCR);
355 while (--i && (readl(DANUBE_PMU_PWDSR) & DANUBE_PMU_PWDCR_LED)) {}
358 panic("Activating LED in PMU failed!");
364 writel(readl(DANUBE_PMU_PWDCR) | DANUBE_PMU_PWDCR_LED, DANUBE_PMU_PWDCR);
368 release_gpio_port (unsigned long adsl)
372 danube_port_free_pin(LED_ADSL0_PORT, LED_ADSL0_PIN);
373 danube_port_free_pin(LED_ADSL1_PORT, LED_ADSL1_PIN);
377 danube_port_free_pin(LED_ST_PORT, LED_ST_PIN);
378 danube_port_free_pin(LED_D_PORT, LED_D_PIN);
379 danube_port_free_pin(LED_SH_PORT, LED_SH_PIN);
384 setup_gpio_port (unsigned long adsl)
389 * Reserve all pins before config them.
393 ret |= danube_port_reserve_pin(LED_ADSL0_PORT, LED_ADSL0_PIN);
394 ret |= danube_port_reserve_pin(LED_ADSL1_PORT, LED_ADSL1_PIN);
398 ret |= danube_port_reserve_pin(LED_ST_PORT, LED_ST_PIN);
399 ret |= danube_port_reserve_pin(LED_D_PORT, LED_D_PIN);
400 ret |= danube_port_reserve_pin(LED_SH_PORT, LED_SH_PIN);
404 release_gpio_port(adsl);
405 return ret; // Should be -EBUSY
410 LED_ADSL0_ALTSEL0_SETUP(LED_ADSL0_PORT, LED_ADSL0_PIN);
411 LED_ADSL0_ALTSEL1_SETUP(LED_ADSL0_PORT, LED_ADSL0_PIN);
412 LED_ADSL0_DIR_SETUP(LED_ADSL0_PORT, LED_ADSL0_PIN);
413 LED_ADSL0_OPENDRAIN_SETUP(LED_ADSL0_PORT, LED_ADSL0_PIN);
415 LED_ADSL1_ALTSEL0_SETUP(LED_ADSL1_PORT, LED_ADSL1_PIN);
416 LED_ADSL1_ALTSEL1_SETUP(LED_ADSL1_PORT, LED_ADSL1_PIN);
417 LED_ADSL1_DIR_SETUP(LED_ADSL1_PORT, LED_ADSL1_PIN);
418 LED_ADSL1_OPENDRAIN_SETUP(LED_ADSL1_PORT, LED_ADSL1_PIN);
424 * I don't check the return value, because I'm sure the value is valid
425 * and the pins are reserved already.
427 LED_ST_ALTSEL0_SETUP(LED_ST_PORT, LED_ST_PIN);
428 LED_ST_ALTSEL1_SETUP(LED_ST_PORT, LED_ST_PIN);
429 LED_ST_DIR_SETUP(LED_ST_PORT, LED_ST_PIN);
430 LED_ST_OPENDRAIN_SETUP(LED_ST_PORT, LED_ST_PIN);
435 LED_D_ALTSEL0_SETUP(LED_D_PORT, LED_D_PIN);
436 LED_D_ALTSEL1_SETUP(LED_D_PORT, LED_D_PIN);
437 LED_D_DIR_SETUP(LED_D_PORT, LED_D_PIN);
438 LED_D_OPENDRAIN_SETUP(LED_D_PORT, LED_D_PIN);
443 LED_SH_ALTSEL0_SETUP(LED_SH_PORT, LED_SH_PIN);
444 LED_SH_ALTSEL1_SETUP(LED_SH_PORT, LED_SH_PIN);
445 LED_SH_DIR_SETUP(LED_SH_PORT, LED_SH_PIN);
446 LED_SH_OPENDRAIN_SETUP(LED_SH_PORT, LED_SH_PIN);
453 setup_gpt (int timer, unsigned long freq)
457 timer = TIMER(timer, 1);
459 ret = request_timer(timer,
463 | TIMER_FLAG_CYCLIC | TIMER_FLAG_COUNTER | TIMER_FLAG_DOWN
464 | TIMER_FLAG_ANY_EDGE
465 | TIMER_FLAG_NO_HANDLE,
472 ret = start_timer(timer, 0);
481 release_gpt (int timer)
483 timer = TIMER(timer, 1);
489 turn_on_led (unsigned long adsl)
493 ret = setup_gpio_port(adsl);
503 turn_off_led (unsigned long adsl)
505 release_gpio_port(adsl);
511 danube_led_set_blink (unsigned int led, unsigned int blink)
513 unsigned int bit_mask;
521 *DANUBE_LED_CON0 |= bit_mask;
523 *DANUBE_LED_CON0 &= ~bit_mask;
526 return (led == 0 && (readl(DANUBE_LED_CON0) & LED_CON0_AD0)) || (led == 1 && (readl(DANUBE_LED_CON0) & LED_CON0_AD1)) ? -EINVAL : 0;
530 danube_led_set_data (unsigned int led, unsigned int data)
532 unsigned long f_update;
533 unsigned int bit_mask;
541 *DANUBE_LED_CPU0 |= bit_mask;
543 *DANUBE_LED_CPU0 &= ~bit_mask;
544 f_update = !(*DANUBE_LED_AR & bit_mask);
547 return f_update ? update_led() : 0;
551 danube_led_config (struct led_config_param* param)
554 unsigned int reg_con0, reg_con1, reg_cpu0, reg_ar;
555 unsigned int clean_reg_con0, clean_reg_con1, clean_reg_cpu0, clean_reg_ar;
556 unsigned int f_setup_gpt2;
557 unsigned int f_software_update;
558 unsigned int new_led_on, new_adsl_on;
565 reg_con0 = *DANUBE_LED_CON0;
566 reg_con1 = *DANUBE_LED_CON1;
567 reg_cpu0 = *DANUBE_LED_CPU0;
568 reg_ar = *DANUBE_LED_AR;
577 f_software_update = (readl(DANUBE_LED_CON0) & LED_CON0_SWU) ? 0 : 1;
579 new_led_on = f_led_on;
580 new_adsl_on = adsl_on;
583 if ( (param->operation_mask & CONFIG_OPERATION_UPDATE_SOURCE) )
585 if ( param->led > 0x03 || param->source > 0x03 )
588 reg_con0 = set_update_source(reg_con0, param->led, param->source);
589 #if 0 // ADSL0,1 is source for bit 0, 1 in shift register
590 new_adsl_on = param->source;
595 if ( (param->operation_mask & CONFIG_OPERATION_BLINK) )
597 if ( (param->blink_mask & 0xFF000000) || (param->blink & 0xFF000000) )
600 reg_con0 = set_blink_in_batch(reg_con0, param->blink_mask, param->blink);
604 if ( (param->operation_mask & CONFIG_DATA_CLOCK_EDGE) )
607 reg_con0 = set_data_clock_edge(reg_con0, param->f_data_clock_on_rising);
611 if ( (param->operation_mask & CONFIG_OPERATION_UPDATE_CLOCK) )
613 if ( param->update_clock > 0x02 || (param->update_clock == 0x02 && param->fpid > 0x3) )
616 f_software_update = param->update_clock == 0 ? 1 : 0;
617 if ( param->update_clock == 0x01 )
619 reg_con1 = set_update_clock(reg_con1, param->update_clock, param->fpid);
623 if ( (param->operation_mask & CONFIG_OPERATION_STORE_MODE) )
626 reg_con1 = set_store_mode(reg_con1, param->store_mode);
630 if ( (param->operation_mask & CONFIG_OPERATION_SHIFT_CLOCK) )
632 if ( param->fpis > 0x03 )
635 reg_con1 = set_shift_clock(reg_con1, param->fpis);
639 if ( (param->operation_mask & CONFIG_OPERATION_DATA_OFFSET) )
641 if ( param->data_offset > 0x03 )
644 reg_con1 = set_data_offset(reg_con1, param->data_offset);
648 if ( (param->operation_mask & CONFIG_OPERATION_NUMBER_OF_LED) )
650 if ( param->number_of_enabled_led > 0x24 )
654 * If there is at lease one LED enabled, the GPIO pin must be setup.
656 new_led_on = param->number_of_enabled_led ? 1 : 0;
659 reg_con1 = set_number_of_enabled_led(reg_con1, param->number_of_enabled_led);
663 if ( (param->operation_mask & CONFIG_OPERATION_DATA) )
665 if ( (param->data_mask & 0xFF000000) || (param->data & 0xFF000000) )
668 reg_cpu0 = set_data_in_batch(reg_cpu0, param->data_mask, param->data);
669 if ( f_software_update )
672 reg_con0 |= 0x80000000;
677 if ( (param->operation_mask & CONFIG_OPERATION_MIPS0_ACCESS) )
679 if ( (param->mips0_access_mask & 0xFF000000) || (param->mips0_access & 0xFF000000) )
682 reg_ar = set_access_right(reg_ar, param->mips0_access_mask, param->mips0_access);
686 if ( f_setup_gpt2 && !new_adsl_on ) // If ADSL led is on, GPT is disabled.
692 if ( gpt_freq != param->fpid )
696 ret = setup_gpt(2, param->fpid);
700 ret = setup_gpt(2, param->fpid);
705 printk("Setup GPT error!\n");
707 goto SETUP_GPT_ERROR;
712 printk("Setup GPT successfully!\n");
727 if ( !new_led_on || adsl_on != new_adsl_on )
729 turn_off_led(adsl_on);
733 if ( !f_led_on && new_led_on )
735 ret = turn_on_led(new_adsl_on);
738 printk("Setup GPIO error!\n");
739 goto SETUP_GPIO_ERROR;
741 adsl_on = new_adsl_on;
749 *DANUBE_LED_AR = reg_ar;
750 if ( !clean_reg_cpu0 )
751 *DANUBE_LED_CPU0 = reg_cpu0;
752 if ( !clean_reg_con1 )
753 *DANUBE_LED_CON1 = reg_con1;
754 if ( !clean_reg_con0 )
755 *DANUBE_LED_CON0 = reg_con0;
775 led_ioctl (struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg)
778 struct led_config_param param;
783 copy_from_user(¶m, (char*)arg, sizeof(param));
784 ret = danube_led_config(¶m);
792 led_open (struct inode *inode, struct file *file)
798 led_release (struct inode *inode, struct file *file)
803 static struct file_operations led_fops = {
810 static struct miscdevice led_miscdev = {
820 danube_led_init (void)
823 struct led_config_param param = {0};
827 writel(0, DANUBE_LED_AR);
828 writel(0, DANUBE_LED_CPU0);
829 writel(0, DANUBE_LED_CPU1);
830 writel(0, DANUBE_LED_CON1);
831 writel((0x80000000 | (DATA_CLOCKING_EDGE << 26)), DANUBE_LED_CON0);
835 sema_init(&led_sem, 0);
837 ret = misc_register(&led_miscdev);
840 led_miscdev.minor = MISC_DYNAMIC_MINOR;
841 ret = misc_register(&led_miscdev);
846 printk(KERN_ERR "led: can't misc_register\n");
849 printk(KERN_INFO "led: misc_register on minor = %d\n", led_miscdev.minor);
854 /* Add to enable hardware relay */
855 /* Map for LED on reference board
856 WLAN_READ LED11 OUT1 15
857 WARNING LED12 OUT2 14
858 FXS1_LINK LED13 OUT3 13
859 FXS2_LINK LED14 OUT4 12
860 FXO_ACT LED15 OUT5 11
861 USB_LINK LED16 OUT6 10
862 ADSL2_LINK LED19 OUT7 9
865 ADSL2_TRAFFIC LED31 OUT16 0
866 Map for hardware relay on reference board
870 param.operation_mask = CONFIG_OPERATION_NUMBER_OF_LED;
871 param.number_of_enabled_led = 16;
872 danube_led_config(¶m);
873 param.operation_mask = CONFIG_OPERATION_DATA;
874 param.data_mask = 1 << 4;
876 danube_led_config(¶m);
878 // by default, update by FSC clock (FPID)
879 param.operation_mask = CONFIG_OPERATION_UPDATE_CLOCK;
880 param.update_clock = 2; // FPID
881 param.fpid = 3; // 10Hz
882 danube_led_config(¶m);
884 // source of LED 0, 1 is ADSL
885 param.operation_mask = CONFIG_OPERATION_UPDATE_SOURCE;
886 param.led = 3; // LED 0, 1
887 param.source = 3; // ADSL
888 danube_led_config(¶m);
891 param.operation_mask = CONFIG_OPERATION_DATA;
892 param.data_mask = 1 << 5;
894 danube_led_config(¶m);
901 danube_led_exit (void)
905 ret = misc_deregister(&led_miscdev);
907 printk(KERN_ERR "led: can't misc_deregister, get error number %d\n", -ret);
909 printk(KERN_INFO "led: misc_deregister successfully\n");
912 EXPORT_SYMBOL(danube_led_set_blink);
913 EXPORT_SYMBOL(danube_led_set_data);
914 EXPORT_SYMBOL(danube_led_config);
916 module_init(danube_led_init);
917 module_exit(danube_led_exit);