brcm63xx: add initial support for BCM63268
[openwrt.git] / target / linux / brcm63xx / patches-3.10 / 411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
1 From d135d94b3d1fe599d13e7198d5f502912d694c13 Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jonas.gorski@gmail.com>
3 Date: Sun, 3 Jul 2011 15:00:38 +0200
4 Subject: [PATCH 29/60] MIPS: BCM63XX: Register SPI flash if present
5
6 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
7 ---
8  arch/mips/bcm63xx/dev-flash.c                     |   33 +++++++++++++++++++-
9  arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h |    2 +
10  2 files changed, 33 insertions(+), 2 deletions(-)
11
12 --- a/arch/mips/bcm63xx/dev-flash.c
13 +++ b/arch/mips/bcm63xx/dev-flash.c
14 @@ -16,9 +16,12 @@
15  #include <linux/mtd/mtd.h>
16  #include <linux/mtd/partitions.h>
17  #include <linux/mtd/physmap.h>
18 +#include <linux/spi/spi.h>
19 +#include <linux/spi/flash.h>
20  
21  #include <bcm63xx_cpu.h>
22  #include <bcm63xx_dev_flash.h>
23 +#include <bcm63xx_dev_hsspi.h>
24  #include <bcm63xx_regs.h>
25  #include <bcm63xx_io.h>
26  
27 @@ -55,6 +58,21 @@ static struct platform_device mtd_dev =
28         },
29  };
30  
31 +static struct flash_platform_data bcm63xx_flash_data = {
32 +       .part_probe_types       = bcm63xx_part_types,
33 +};
34 +
35 +static struct spi_board_info bcm63xx_spi_flash_info[] = {
36 +       {
37 +               .bus_num        = 0,
38 +               .chip_select    = 0,
39 +               .mode           = 0,
40 +               .max_speed_hz   = 781000,
41 +               .modalias       = "m25p80",
42 +               .platform_data  = &bcm63xx_flash_data,
43 +       },
44 +};
45 +
46  static int __init bcm63xx_detect_flash_type(void)
47  {
48         u32 val;
49 @@ -62,6 +80,11 @@ static int __init bcm63xx_detect_flash_t
50         switch (bcm63xx_get_cpu_id()) {
51         case BCM6328_CPU_ID:
52                 val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
53 +               if (val & STRAPBUS_6328_HSSPI_CLK_FAST)
54 +                       bcm63xx_spi_flash_info[0].max_speed_hz = 33333334;
55 +               else
56 +                       bcm63xx_spi_flash_info[0].max_speed_hz = 16666667;
57 +
58                 if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
59                         return BCM63XX_FLASH_TYPE_SERIAL;
60                 else
61 @@ -80,12 +103,20 @@ static int __init bcm63xx_detect_flash_t
62                         return BCM63XX_FLASH_TYPE_SERIAL;
63         case BCM6362_CPU_ID:
64                 val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
65 +               if (val & STRAPBUS_6362_HSSPI_CLK_FAST)
66 +                       bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
67 +               else
68 +                       bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
69 +
70                 if (val & STRAPBUS_6362_BOOT_SEL_SERIAL)
71                         return BCM63XX_FLASH_TYPE_SERIAL;
72                 else
73                         return BCM63XX_FLASH_TYPE_NAND;
74         case BCM6368_CPU_ID:
75                 val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
76 +               if (val & STRAPBUS_6368_SPI_CLK_FAST)
77 +                       bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
78 +
79                 switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
80                 case STRAPBUS_6368_BOOT_SEL_NAND:
81                         return BCM63XX_FLASH_TYPE_NAND;
82 @@ -96,6 +127,11 @@ static int __init bcm63xx_detect_flash_t
83                 }
84         case BCM63268_CPU_ID:
85                 val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
86 +               if (val & STRAPBUS_63268_HSSPI_CLK_FAST)
87 +                       bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
88 +               else
89 +                       bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
90 +
91                 if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
92                         return BCM63XX_FLASH_TYPE_SERIAL;
93                 else
94 @@ -123,8 +159,14 @@ int __init bcm63xx_flash_register(void)
95  
96                 return platform_device_register(&mtd_dev);
97         case BCM63XX_FLASH_TYPE_SERIAL:
98 -               pr_warn("unsupported serial flash detected\n");
99 -               return -ENODEV;
100 +               if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
101 +                       bcm63xx_spi_flash_info[0].bus_num = 1;
102 +
103 +               if (BCMCPU_IS_6358() || BCMCPU_IS_6368())
104 +                       bcm63xx_flash_data.max_transfer_len = SPI_6358_MSG_DATA_SIZE;
105 +
106 +               return spi_register_board_info(bcm63xx_spi_flash_info,
107 +                                       ARRAY_SIZE(bcm63xx_spi_flash_info));
108         case BCM63XX_FLASH_TYPE_NAND:
109                 pr_warn("unsupported NAND flash detected\n");
110                 return -ENODEV;
111 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
112 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
113 @@ -746,6 +746,7 @@
114  #define GPIO_STRAPBUS_REG              0x40
115  #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1)
116  #define STRAPBUS_6358_BOOT_SEL_SERIAL  (0 << 1)
117 +#define STRAPBUS_6368_SPI_CLK_FAST     (1 << 6)
118  #define STRAPBUS_6368_BOOT_SEL_MASK    0x3
119  #define STRAPBUS_6368_BOOT_SEL_NAND    0
120  #define STRAPBUS_6368_BOOT_SEL_SERIAL  1
121 @@ -1594,6 +1595,7 @@
122  #define STRAPBUS_63268_FCVO_MASK       (0xf << STRAPBUS_63268_FCVO_SHIFT)
123  
124  #define MISC_STRAPBUS_6328_REG         0x240
125 +#define STRAPBUS_6328_HSSPI_CLK_FAST   (1 << 4)
126  #define STRAPBUS_6328_FCVO_SHIFT       7
127  #define STRAPBUS_6328_FCVO_MASK                (0x1f << STRAPBUS_6328_FCVO_SHIFT)
128  #define STRAPBUS_6328_BOOT_SEL_SERIAL  (1 << 28)