c89a344ff9040d0b3830ac66ff1d91625b90ce59
[openwrt.git] / target / linux / brcm63xx / patches-3.10 / 322-MIPS-BCM63XX-allow-setting-affinity-for-IPIC.patch
1 From 9e341df1f67c3c64dc5ac668a30bbb6b5ab5f2b4 Mon Sep 17 00:00:00 2001
2 From: Jonas Gorski <jogo@openwrt.org>
3 Date: Fri, 26 Apr 2013 12:06:03 +0200
4 Subject: [PATCH 14/14] MIPS: BCM63XX: allow setting affinity for IPIC
5
6 Signed-off-by: Jonas Gorski <jogo@openwrt.org>
7 ---
8  arch/mips/bcm63xx/irq.c |   49 +++++++++++++++++++++++++++++++++++++++--------
9  1 file changed, 41 insertions(+), 8 deletions(-)
10
11 --- a/arch/mips/bcm63xx/irq.c
12 +++ b/arch/mips/bcm63xx/irq.c
13 @@ -24,8 +24,10 @@ static void __dispatch_internal_32(int c
14  static void __dispatch_internal_64(int cpu) __maybe_unused;
15  static void __internal_irq_mask_32(struct irq_data *d) __maybe_unused;
16  static void __internal_irq_mask_64(struct irq_data *d) __maybe_unused;
17 -static void __internal_irq_unmask_32(struct irq_data *d) __maybe_unused;
18 -static void __internal_irq_unmask_64(struct irq_data *d) __maybe_unused;
19 +static void __internal_irq_unmask_32(struct irq_data *d,
20 +                                    const struct cpumask *mask) __maybe_unused;
21 +static void __internal_irq_unmask_64(struct irq_data *d,
22 +                                    const struct cpumask *mask) __maybe_unused;
23  
24  static DEFINE_SPINLOCK(ipic_lock);
25  static DEFINE_SPINLOCK(epic_lock);
26 @@ -168,7 +170,7 @@ static unsigned int ext_irq_count;
27  static unsigned int ext_irq_start, ext_irq_end;
28  static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
29  static void (*internal_irq_mask)(struct irq_data *d);
30 -static void (*internal_irq_unmask)(struct irq_data *d);
31 +static void (*internal_irq_unmask)(struct irq_data *d, const struct cpumask *m);
32  
33  static void bcm63xx_init_irq(void)
34  {
35 @@ -311,6 +313,20 @@ static inline void handle_internal(int i
36                 do_IRQ(intbit + IRQ_INTERNAL_BASE);
37  }
38  
39 +static inline int enable_irq_for_cpu(int cpu, struct irq_data *d,
40 +                                    const struct cpumask *m)
41 +{
42 +       bool enable = cpu_online(cpu);
43 +#ifdef CONFIG_SMP
44 +
45 +       if (m)
46 +               enable &= cpu_isset(cpu, *m);
47 +       else if (irqd_affinity_was_set(d))
48 +               enable &= cpu_isset(cpu, *d->affinity);
49 +#endif
50 +       return enable;
51 +}
52 +
53  /*
54   * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not
55   * prioritize any interrupt relatively to another. the static counter
56 @@ -381,7 +397,8 @@ static void __internal_irq_mask_##width(
57         spin_unlock_irqrestore(&ipic_lock, flags);                      \
58  }                                                                      \
59                                                                         \
60 -static void __internal_irq_unmask_##width(struct irq_data *d)          \
61 +static void __internal_irq_unmask_##width(struct irq_data *d,          \
62 +                                         const struct cpumask *m)      \
63  {                                                                      \
64         u32 val;                                                        \
65         unsigned irq = d->irq - IRQ_INTERNAL_BASE;                      \
66 @@ -398,7 +415,7 @@ static void __internal_irq_unmask_##widt
67                         break;                                          \
68                                                                         \
69                 val = bcm_readl(irq_mask_addr + reg * sizeof(u32));     \
70 -               if (cpu_online(cpu))                                    \
71 +               if (enable_irq_for_cpu(cpu, d, m))                      \
72                         val |= (1 << bit);                              \
73                 else                                                    \
74                         val &= ~(1 << bit);                             \
75 @@ -455,7 +472,7 @@ static void bcm63xx_internal_irq_mask(st
76  
77  static void bcm63xx_internal_irq_unmask(struct irq_data *d)
78  {
79 -       internal_irq_unmask(d);
80 +       internal_irq_unmask(d, NULL);
81  }
82  
83  /*
84 @@ -503,7 +520,8 @@ static void bcm63xx_external_irq_unmask(
85         spin_unlock_irqrestore(&epic_lock, flags);
86  
87         if (is_ext_irq_cascaded)
88 -               internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start));
89 +               internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start),
90 +                                   NULL);
91  }
92  
93  static void bcm63xx_external_irq_clear(struct irq_data *d)
94 @@ -622,6 +640,18 @@ static int bcm63xx_external_irq_set_type
95         return IRQ_SET_MASK_OK_NOCOPY;
96  }
97  
98 +#ifdef CONFIG_SMP
99 +static int bcm63xx_internal_set_affinity(struct irq_data *data,
100 +                                        const struct cpumask *dest,
101 +                                        bool force)
102 +{
103 +       if (!irqd_irq_disabled(data))
104 +               internal_irq_unmask(data, dest);
105 +
106 +       return 0;
107 +}
108 +#endif
109 +
110  static struct irq_chip bcm63xx_internal_irq_chip = {
111         .name           = "bcm63xx_ipic",
112         .irq_mask       = bcm63xx_internal_irq_mask,
113 @@ -679,7 +709,10 @@ void __init arch_init_irq(void)
114  
115         setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
116  #ifdef CONFIG_SMP
117 -       if (is_ext_irq_cascaded)
118 +       if (is_ext_irq_cascaded) {
119                 setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
120 +               bcm63xx_internal_irq_chip.irq_set_affinity =
121 +                       bcm63xx_internal_set_affinity;
122 +       }
123  #endif
124  }