2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
6 * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
9 #include <linux/types.h>
10 #include <linux/pci.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/delay.h>
16 #include "pci-bcm63xx.h"
19 * swizzle 32bits data to return only the needed part
21 static int postprocess_read(u32 data, int where, unsigned int size)
28 ret = (data >> ((where & 3) << 3)) & 0xff;
31 ret = (data >> ((where & 3) << 3)) & 0xffff;
40 static int preprocess_write(u32 orig_data, u32 val, int where,
48 ret = (orig_data & ~(0xff << ((where & 3) << 3))) |
49 (val << ((where & 3) << 3));
52 ret = (orig_data & ~(0xffff << ((where & 3) << 3))) |
53 (val << ((where & 3) << 3));
63 * setup hardware for a configuration cycle with given parameters
65 static int bcm63xx_setup_cfg_access(int type, unsigned int busn,
66 unsigned int devfn, int where)
68 unsigned int slot, func, reg;
71 slot = PCI_SLOT(devfn);
72 func = PCI_FUNC(devfn);
76 if (slot > (MPI_L2PCFG_DEVNUM_MASK >> MPI_L2PCFG_DEVNUM_SHIFT))
79 if (func > (MPI_L2PCFG_FUNC_MASK >> MPI_L2PCFG_FUNC_SHIFT))
82 if (reg > (MPI_L2PCFG_REG_MASK >> MPI_L2PCFG_REG_SHIFT))
85 /* ok, setup config access */
86 val = (reg << MPI_L2PCFG_REG_SHIFT);
87 val |= (func << MPI_L2PCFG_FUNC_SHIFT);
88 val |= (slot << MPI_L2PCFG_DEVNUM_SHIFT);
89 val |= MPI_L2PCFG_CFG_USEREG_MASK;
90 val |= MPI_L2PCFG_CFG_SEL_MASK;
91 /* type 0 cycle for local bus, type 1 cycle for anything else */
93 /* FIXME: how to specify bus ??? */
94 val |= (1 << MPI_L2PCFG_CFG_TYPE_SHIFT);
96 bcm_mpi_writel(val, MPI_L2PCFG_REG);
101 static int bcm63xx_do_cfg_read(int type, unsigned int busn,
102 unsigned int devfn, int where, int size,
107 /* two phase cycle, first we write address, then read data at
108 * another location, caller already has a spinlock so no need
110 if (bcm63xx_setup_cfg_access(type, busn, devfn, where))
111 return PCIBIOS_DEVICE_NOT_FOUND;
113 data = le32_to_cpu(__raw_readl(pci_iospace_start));
114 /* restore IO space normal behaviour */
115 bcm_mpi_writel(0, MPI_L2PCFG_REG);
117 *val = postprocess_read(data, where, size);
119 return PCIBIOS_SUCCESSFUL;
122 static int bcm63xx_do_cfg_write(int type, unsigned int busn,
123 unsigned int devfn, int where, int size,
128 /* two phase cycle, first we write address, then write data to
129 * another location, caller already has a spinlock so no need
131 if (bcm63xx_setup_cfg_access(type, busn, devfn, where))
132 return PCIBIOS_DEVICE_NOT_FOUND;
135 data = le32_to_cpu(__raw_readl(pci_iospace_start));
136 data = preprocess_write(data, val, where, size);
138 __raw_writel(cpu_to_le32(data), pci_iospace_start);
140 /* no way to know the access is done, we have to wait */
142 /* restore IO space normal behaviour */
143 bcm_mpi_writel(0, MPI_L2PCFG_REG);
145 return PCIBIOS_SUCCESSFUL;
148 static int bcm63xx_pci_read(struct pci_bus *bus, unsigned int devfn,
149 int where, int size, u32 *val)
153 type = bus->parent ? 1 : 0;
155 if (type == 0 && PCI_SLOT(devfn) == CARDBUS_PCI_IDSEL)
156 return PCIBIOS_DEVICE_NOT_FOUND;
158 return bcm63xx_do_cfg_read(type, bus->number, devfn,
162 static int bcm63xx_pci_write(struct pci_bus *bus, unsigned int devfn,
163 int where, int size, u32 val)
167 type = bus->parent ? 1 : 0;
169 if (type == 0 && PCI_SLOT(devfn) == CARDBUS_PCI_IDSEL)
170 return PCIBIOS_DEVICE_NOT_FOUND;
172 return bcm63xx_do_cfg_write(type, bus->number, devfn,
176 struct pci_ops bcm63xx_pci_ops = {
177 .read = bcm63xx_pci_read,
178 .write = bcm63xx_pci_write