bcm53xx: make the l2x0 L2 cache controller work
[openwrt.git] / target / linux / bcm53xx / patches-3.10 / 051-bcm53xx-initial-support-for-the-BCM5301-BCM470X-SoC-.patch
1 bcm53xx: initial support for the BCM5301/BCM470X SoC
2  with ARM CPU
3
4 This patch adds support for the BCM5301/BCM470X SoCs with an ARM CPU.
5 Currently just booting to a shell is working and nothing else, no
6 Ethernet, wifi, flash, ...
7
8 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
9 ---
10  arch/arm/Kconfig                            |    2 +
11  arch/arm/Kconfig.debug                      |    5 ++
12  arch/arm/Makefile                           |    1 +
13  arch/arm/boot/dts/Makefile                  |    1 +
14  arch/arm/boot/dts/bcm5301-netgear-r6250.dts |   20 +++++++
15  arch/arm/boot/dts/bcm5301.dtsi              |   83 +++++++++++++++++++++++++++
16  arch/arm/include/debug/bcm53xx.S            |   19 ++++++
17  arch/arm/mach-bcm53xx/Kconfig               |   15 +++++
18  arch/arm/mach-bcm53xx/Makefile              |    1 +
19  arch/arm/mach-bcm53xx/bcm53xx.c             |   69 ++++++++++++++++++++++
20  10 files changed, 216 insertions(+)
21  create mode 100644 arch/arm/boot/dts/bcm5301-netgear-r6250.dts
22  create mode 100644 arch/arm/boot/dts/bcm5301.dtsi
23  create mode 100644 arch/arm/include/debug/bcm53xx.S
24  create mode 100644 arch/arm/mach-bcm53xx/Kconfig
25  create mode 100644 arch/arm/mach-bcm53xx/Makefile
26  create mode 100644 arch/arm/mach-bcm53xx/bcm53xx.c
27
28 --- a/arch/arm/Kconfig
29 +++ b/arch/arm/Kconfig
30 @@ -922,6 +922,8 @@ source "arch/arm/mach-bcm/Kconfig"
31  
32  source "arch/arm/mach-bcm2835/Kconfig"
33  
34 +source "arch/arm/mach-bcm53xx/Kconfig"
35 +
36  source "arch/arm/mach-clps711x/Kconfig"
37  
38  source "arch/arm/mach-cns3xxx/Kconfig"
39 --- a/arch/arm/Kconfig.debug
40 +++ b/arch/arm/Kconfig.debug
41 @@ -93,6 +93,10 @@ choice
42                 bool "Kernel low-level debugging on BCM2835 PL011 UART"
43                 depends on ARCH_BCM2835
44  
45 +       config DEBUG_BCM_5301X
46 +               bool "Kernel low-level debugging on BCM53XX UART1"
47 +               depends on ARCH_BCM_5301X
48 +
49         config DEBUG_CLPS711X_UART1
50                 bool "Kernel low-level debugging messages via UART1"
51                 depends on ARCH_CLPS711X
52 @@ -620,6 +624,7 @@ endchoice
53  config DEBUG_LL_INCLUDE
54         string
55         default "debug/bcm2835.S" if DEBUG_BCM2835
56 +       default "debug/bcm53xx.S" if DEBUG_BCM_5301X
57         default "debug/cns3xxx.S" if DEBUG_CNS3XXX
58         default "debug/exynos.S" if DEBUG_EXYNOS_UART
59         default "debug/highbank.S" if DEBUG_HIGHBANK_UART
60 --- a/arch/arm/Makefile
61 +++ b/arch/arm/Makefile
62 @@ -145,6 +145,7 @@ textofs-$(CONFIG_ARCH_MSM8960) := 0x0020
63  machine-$(CONFIG_ARCH_AT91)            += at91
64  machine-$(CONFIG_ARCH_BCM)             += bcm
65  machine-$(CONFIG_ARCH_BCM2835)         += bcm2835
66 +machine-$(CONFIG_ARCH_BCM_5301X)               += bcm53xx
67  machine-$(CONFIG_ARCH_CLPS711X)                += clps711x
68  machine-$(CONFIG_ARCH_CNS3XXX)         += cns3xxx
69  machine-$(CONFIG_ARCH_DAVINCI)         += davinci
70 --- a/arch/arm/boot/dts/Makefile
71 +++ b/arch/arm/boot/dts/Makefile
72 @@ -209,6 +209,7 @@ dtb-$(CONFIG_ARCH_VT8500) += vt8500-bv07
73         wm8650-mid.dtb \
74         wm8850-w70v2.dtb
75  dtb-$(CONFIG_ARCH_ZYNQ) += zynq-zc702.dtb
76 +dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
77  
78  targets += dtbs
79  targets += $(dtb-y)
80 --- /dev/null
81 +++ b/arch/arm/boot/dts/bcm4708-netgear-r6250.dts
82 @@ -0,0 +1,20 @@
83 +/*
84 + * Broadcom BCM470X / BCM5301X arm platform code.
85 + *
86 + * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
87 + *
88 + * Licensed under the GNU/GPL. See COPYING for details.
89 + */
90 +
91 +/dts-v1/;
92 +
93 +#include "bcm4708.dtsi"
94 +
95 +/ {
96 +       compatible = "netgear,r6250v1", "broadcom,bcm4708";
97 +       model = "Netgear R6250 V1 (BCM4708)";
98 +
99 +       memory {
100 +               reg = <0x00000000 0x08000000>;
101 +       };
102 +};
103 --- /dev/null
104 +++ b/arch/arm/boot/dts/bcm4708.dtsi
105 @@ -0,0 +1,100 @@
106 +/*
107 + * Broadcom BCM470X / BCM5301X ARM platform code.
108 + *
109 + * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
110 + *
111 + * Licensed under the GNU/GPL. See COPYING for details.
112 + */
113 +
114 +#include <dt-bindings/interrupt-controller/arm-gic.h>
115 +#include <dt-bindings/interrupt-controller/irq.h>
116 +
117 +#include "skeleton.dtsi"
118 +
119 +/ {
120 +       compatible = "broadcom,bcm4708";
121 +       model = "Broadcom BCM4708";
122 +       interrupt-parent = <&gic>;
123 +
124 +       chosen {
125 +               bootargs = "console=ttyS0,115200 debug earlyprintk";
126 +       };
127 +
128 +       cpus {
129 +               #address-cells = <1>;
130 +               #size-cells = <0>;
131 +
132 +               cpu@0 {
133 +                       device_type = "cpu";
134 +                       compatible = "arm,cortex-a9";
135 +                       next-level-cache = <&L2>;
136 +                       reg = <0>;
137 +               };
138 +               cpu@1 {
139 +                       device_type = "cpu";
140 +                       compatible = "arm,cortex-a9";
141 +                       next-level-cache = <&L2>;
142 +                       reg = <1>;
143 +               };
144 +       };
145 +
146 +       clocks {
147 +               #address-cells = <1>;
148 +               #size-cells = <0>;
149 +
150 +               clk_periph: periph {
151 +                       compatible = "fixed-clock";
152 +                       #clock-cells = <0>;
153 +                       clock-frequency = <400000000>;
154 +               };
155 +       };
156 +
157 +       uart@18000300 {
158 +               compatible = "ns16550";
159 +               reg = <0x18000300 0x100>;
160 +               interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
161 +               clock-frequency = <100000000>;
162 +       };
163 +
164 +       uart@18000400 {
165 +               compatible = "ns16550";
166 +               reg = <0x18000400 0x100>;
167 +               interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
168 +               clock-frequency = <100000000>;
169 +       };
170 +
171 +       gic: interrupt-controller@19021000 {
172 +               compatible = "arm,cortex-a9-gic";
173 +               #interrupt-cells = <3>;
174 +               #address-cells = <0>;
175 +               interrupt-controller;
176 +               reg = <0x19021000 0x1000>,
177 +                     <0x19020100 0x100>;
178 +       };
179 +
180 +       timer@19020200 {
181 +               compatible = "arm,cortex-a9-global-timer";
182 +               reg = <0x19020200 0x100>;
183 +               interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
184 +               clocks = <&clk_periph>;
185 +       };
186 +
187 +       local-timer@19020600 {
188 +               compatible = "arm,cortex-a9-twd-timer";
189 +               reg = <0x19020600 0x100>;
190 +               interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
191 +               clocks = <&clk_periph>;
192 +       };
193 +
194 +       L2: cache-controller@19022000 {
195 +               compatible = "arm,pl310-cache";
196 +               reg = <0x19022000 0x1000>;
197 +               cache-unified;
198 +               cache-level = <2>;
199 +       };
200 +
201 +       scu@19020000 {
202 +               compatible = "arm,cortex-a9-scu";
203 +               reg = <0x19020000 0x100>;
204 +       };
205 +};
206 --- /dev/null
207 +++ b/arch/arm/include/debug/bcm53xx.S
208 @@ -0,0 +1,19 @@
209 +/*
210 + * Macros used for EARLY_PRINTK, in low-level UART debug console
211 + *
212 + * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
213 + *
214 + * Licensed under the GNU/GPL. See COPYING for details.
215 + */
216 +
217 +#define BCM53XX_UART1_PHYS     0x18000300
218 +#define BCM53XX_UART1_VIRT     0xf1000300
219 +#define BCM53XX_UART1_SH       0
220 +
221 +       .macro  addruart, rp, rv, tmp
222 +       ldr     \rp, =BCM53XX_UART1_PHYS        @ MMU off, Physical
223 +       ldr     \rv, =BCM53XX_UART1_VIRT        @ MMU on, Virtual
224 +       .endm
225 +
226 +#define UART_SHIFT     BCM53XX_UART1_SH
227 +#include <asm/hardware/debug-8250.S>
228 --- /dev/null
229 +++ b/arch/arm/mach-bcm53xx/Kconfig
230 @@ -0,0 +1,26 @@
231 +config ARCH_BCM_5301X
232 +       bool "Broadcom BCM470X / BCM5301X ARM SoC" if ARCH_MULTI_V7
233 +       depends on MMU
234 +       select ARM_GIC
235 +       select CACHE_L2X0
236 +       select HAVE_ARM_SCU if SMP
237 +       select HAVE_ARM_TWD if SMP
238 +       select HAVE_SMP
239 +       select COMMON_CLK
240 +       select GENERIC_CLOCKEVENTS
241 +       select GENERIC_TIME
242 +       select ARM_GLOBAL_TIMER
243 +       select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
244 +       select MIGHT_HAVE_PCI
245 +       help
246 +         Support for Broadcom BCM470X and BCM5301X SoCs with ARM CPU cores.
247 +
248 +         This is a network SoC line mostly used in home routers and
249 +         wifi access points.
250 +         This inclused the following SoC: BCM53010, BCM53011, BCM53012,
251 +         BCM53014, BCM53015, BCM53016, BCM53017, BCM53018, BCM4707,
252 +         BCM4708 and BCM4709.
253 +
254 +         Do not confuse this with the BCM4760 which is a totally
255 +         different SoC or with the older BCM47XX and BCM53XX based
256 +         network SoC using a MIPS CPU, they are supported by arch/mips/bcm47xx
257 --- /dev/null
258 +++ b/arch/arm/mach-bcm53xx/Makefile
259 @@ -0,0 +1 @@
260 +obj-y += bcm53xx.o
261 --- /dev/null
262 +++ b/arch/arm/mach-bcm53xx/bcm53xx.c
263 @@ -0,0 +1,60 @@
264 +/*
265 + * Broadcom BCM470X / BCM5301X ARM platform code.
266 + *
267 + * Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
268 + *
269 + * Licensed under the GNU/GPL. See COPYING for details.
270 + */
271 +#include <linux/of_address.h>
272 +#include <linux/of_platform.h>
273 +#include <linux/clocksource.h>
274 +#include <linux/clk-provider.h>
275 +#include <asm/hardware/cache-l2x0.h>
276 +
277 +#include <asm/mach/arch.h>
278 +#include <asm/mach/map.h>
279 +#include <asm/signal.h>
280 +
281 +static int bcm5301x_abort_handler(unsigned long addr, unsigned int fsr,
282 +                                struct pt_regs *regs)
283 +{
284 +       /*
285 +        * These happen for no good reason, possibly left over from CFE
286 +        */
287 +       pr_warn("External imprecise Data abort at addr=%#lx, fsr=%#x ignored.\n",
288 +               addr, fsr);
289 +
290 +       /* Returning non-zero causes fault display and panic */
291 +       return 0;
292 +}
293 +
294 +static void __init bcm5301x_init_early(void)
295 +{
296 +       /* Install our hook */
297 +       hook_fault_code(16 + 6, bcm5301x_abort_handler, SIGBUS, 0,
298 +                       "imprecise external abort");
299 +}
300 +
301 +static void __init bcm5301x_timer_init(void)
302 +{
303 +       of_clk_init(NULL);
304 +       clocksource_of_init();
305 +}
306 +
307 +static void __init bcm5301x_dt_init(void)
308 +{
309 +       l2x0_of_init(0, ~0UL);
310 +       of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
311 +}
312 +
313 +static const char __initconst *bcm5301x_dt_compat[] = {
314 +       "broadcom,bcm4708",
315 +       NULL,
316 +};
317 +
318 +DT_MACHINE_START(BCM5301X, "BCM5301X")
319 +       .init_early     = bcm5301x_init_early,
320 +       .init_time      = bcm5301x_timer_init,
321 +       .init_machine   = bcm5301x_dt_init,
322 +       .dt_compat      = bcm5301x_dt_compat,
323 +MACHINE_END