2 * Atheros PB44 board SPI controller driver
4 * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/delay.h>
15 #include <linux/spinlock.h>
16 #include <linux/workqueue.h>
17 #include <linux/platform_device.h>
19 #include <linux/spi/spi.h>
20 #include <linux/spi/spi_bitbang.h>
21 #include <linux/bitops.h>
22 #include <linux/gpio.h>
24 #include <asm/mach-ar71xx/ar71xx.h>
25 #include <asm/mach-ar71xx/platform.h>
27 #define DRV_DESC "Atheros PB44 SPI Controller driver"
28 #define DRV_VERSION "0.1.0"
29 #define DRV_NAME "pb44-spi"
34 struct spi_bitbang bitbang;
40 struct platform_device *pdev;
43 static inline u32 pb44_spi_rr(struct ar71xx_spi *sp, unsigned reg)
45 return __raw_readl(sp->base + reg);
48 static inline void pb44_spi_wr(struct ar71xx_spi *sp, unsigned reg, u32 val)
50 __raw_writel(val, sp->base + reg);
53 static inline struct ar71xx_spi *spidev_to_sp(struct spi_device *spi)
55 return spi_master_get_devdata(spi->master);
58 static void pb44_spi_chipselect(struct spi_device *spi, int is_active)
60 struct ar71xx_spi *sp = spidev_to_sp(spi);
61 int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active;
64 /* set initial clock polarity */
65 if (spi->mode & SPI_CPOL)
66 sp->ioc_base |= SPI_IOC_CLK;
68 sp->ioc_base &= ~SPI_IOC_CLK;
70 pb44_spi_wr(sp, SPI_REG_IOC, sp->ioc_base);
73 if (spi->chip_select) {
74 unsigned long gpio = (unsigned long) spi->controller_data;
76 /* SPI is normally active-low */
77 gpio_set_value(gpio, cs_high);
80 sp->ioc_base |= SPI_IOC_CS0;
82 sp->ioc_base &= ~SPI_IOC_CS0;
84 pb44_spi_wr(sp, SPI_REG_IOC, sp->ioc_base);
89 static void pb44_spi_enable(struct ar71xx_spi *sp)
91 /* enable GPIO mode */
92 pb44_spi_wr(sp, SPI_REG_FS, SPI_FS_GPIO);
94 /* save CTRL register */
95 sp->reg_ctrl = pb44_spi_rr(sp, SPI_REG_CTRL);
96 sp->ioc_base = pb44_spi_rr(sp, SPI_REG_IOC);
98 pb44_spi_wr(sp, SPI_REG_CTRL, 0x43);
101 static void pb44_spi_disable(struct ar71xx_spi *sp)
103 /* restore CTRL register */
104 pb44_spi_wr(sp, SPI_REG_CTRL, sp->reg_ctrl);
105 /* disable GPIO mode */
106 pb44_spi_wr(sp, SPI_REG_FS, 0);
109 static int pb44_spi_setup_cs(struct spi_device *spi)
111 struct ar71xx_spi *sp = spidev_to_sp(spi);
115 if (spi->chip_select) {
116 unsigned long gpio = (unsigned long) spi->controller_data;
119 status = gpio_request(gpio, dev_name(&spi->dev));
123 status = gpio_direction_output(gpio, spi->mode & SPI_CS_HIGH);
129 if (spi->mode & SPI_CS_HIGH)
130 sp->ioc_base |= SPI_IOC_CS0;
132 sp->ioc_base &= ~SPI_IOC_CS0;
133 pb44_spi_wr(sp, SPI_REG_IOC, sp->ioc_base);
139 static void pb44_spi_cleanup_cs(struct spi_device *spi)
141 struct ar71xx_spi *sp = spidev_to_sp(spi);
143 if (spi->chip_select) {
144 unsigned long gpio = (unsigned long) spi->controller_data;
148 pb44_spi_disable(sp);
151 static int pb44_spi_setup(struct spi_device *spi)
155 if (spi->bits_per_word > 32)
158 if (!spi->controller_state) {
159 status = pb44_spi_setup_cs(spi);
164 status = spi_bitbang_setup(spi);
165 if (status && !spi->controller_state)
166 pb44_spi_cleanup_cs(spi);
171 static void pb44_spi_cleanup(struct spi_device *spi)
173 pb44_spi_cleanup_cs(spi);
174 spi_bitbang_cleanup(spi);
177 static u32 pb44_spi_txrx_mode0(struct spi_device *spi, unsigned nsecs,
180 struct ar71xx_spi *sp = spidev_to_sp(spi);
181 u32 ioc = sp->ioc_base;
184 /* clock starts at inactive polarity */
185 for (word <<= (32 - bits); likely(bits); bits--) {
188 if (word & (1 << 31))
189 out = ioc | SPI_IOC_DO;
191 out = ioc & ~SPI_IOC_DO;
193 /* setup MSB (to slave) on trailing edge */
194 pb44_spi_wr(sp, SPI_REG_IOC, out);
195 pb44_spi_wr(sp, SPI_REG_IOC, out | SPI_IOC_CLK);
200 /* sample MSB (from slave) on leading edge */
201 ret = pb44_spi_rr(sp, SPI_REG_RDS);
202 pb44_spi_wr(sp, SPI_REG_IOC, out);
207 ret = pb44_spi_rr(sp, SPI_REG_RDS);
212 static int pb44_spi_probe(struct platform_device *pdev)
214 struct spi_master *master;
215 struct ar71xx_spi *sp;
216 struct ar71xx_spi_platform_data *pdata;
220 master = spi_alloc_master(&pdev->dev, sizeof(*sp));
221 if (master == NULL) {
222 dev_err(&pdev->dev, "failed to allocate spi master\n");
226 sp = spi_master_get_devdata(master);
227 platform_set_drvdata(pdev, sp);
229 pdata = pdev->dev.platform_data;
231 master->setup = pb44_spi_setup;
232 master->cleanup = pb44_spi_cleanup;
234 master->bus_num = pdata->bus_num;
235 master->num_chipselect = pdata->num_chipselect;
238 master->num_chipselect = 1;
241 sp->bitbang.master = spi_master_get(master);
242 sp->bitbang.chipselect = pb44_spi_chipselect;
243 sp->bitbang.txrx_word[SPI_MODE_0] = pb44_spi_txrx_mode0;
244 sp->bitbang.setup_transfer = spi_bitbang_setup_transfer;
245 sp->bitbang.flags = SPI_CS_HIGH;
247 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
253 sp->base = ioremap_nocache(r->start, r->end - r->start + 1);
259 ret = spi_bitbang_start(&sp->bitbang);
265 platform_set_drvdata(pdev, NULL);
266 spi_master_put(sp->bitbang.master);
271 static int pb44_spi_remove(struct platform_device *pdev)
273 struct ar71xx_spi *sp = platform_get_drvdata(pdev);
275 spi_bitbang_stop(&sp->bitbang);
277 platform_set_drvdata(pdev, NULL);
278 spi_master_put(sp->bitbang.master);
283 static struct platform_driver pb44_spi_drv = {
284 .probe = pb44_spi_probe,
285 .remove = pb44_spi_remove,
288 .owner = THIS_MODULE,
292 static int __init pb44_spi_init(void)
294 return platform_driver_register(&pb44_spi_drv);
296 module_init(pb44_spi_init);
298 static void __exit pb44_spi_exit(void)
300 platform_driver_unregister(&pb44_spi_drv);
302 module_exit(pb44_spi_exit);
304 MODULE_ALIAS("platform:" DRV_NAME);
305 MODULE_DESCRIPTION(DRV_DESC);
306 MODULE_VERSION(DRV_VERSION);
307 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
308 MODULE_LICENSE("GPL v2");