2 * MikroTik RouterBOARD 95X support
4 * Copyright (C) 2012 Stijn Tintel <stijn@linux-ipv6.be>
5 * Copyright (C) 2012 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2013 Kamil Trzcinski <ayufan@ayufan.eu>
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License version 2 as published
10 * by the Free Software Foundation.
13 #define pr_fmt(fmt) "rb95x: " fmt
15 #include <linux/phy.h>
16 #include <linux/delay.h>
17 #include <linux/platform_device.h>
18 #include <linux/ath9k_platform.h>
19 #include <linux/ar8216_platform.h>
20 #include <linux/mtd/mtd.h>
21 #include <linux/mtd/nand.h>
22 #include <linux/mtd/partitions.h>
23 #include <linux/spi/spi.h>
24 #include <linux/spi/flash.h>
25 #include <linux/routerboot.h>
26 #include <linux/gpio.h>
28 #include <asm/mach-ath79/ath79.h>
29 #include <asm/mach-ath79/ar71xx_regs.h>
33 #include "dev-m25p80.h"
37 #include "machtypes.h"
38 #include "routerboot.h"
40 #define RB95X_GPIO_NAND_NCE 14
42 static struct mtd_partition rb95x_nand_partitions[] = {
47 .mask_flags = MTD_WRITEABLE,
51 .offset = (256 * 1024),
52 .size = (4 * 1024 * 1024) - (256 * 1024),
56 .offset = MTDPART_OFS_NXTBLK,
57 .size = MTDPART_SIZ_FULL,
61 static struct ar8327_pad_cfg rb95x_ar8327_pad0_cfg = {
62 .mode = AR8327_PAD_MAC_RGMII,
63 .txclk_delay_en = true,
64 .rxclk_delay_en = true,
65 .txclk_delay_sel = AR8327_CLK_DELAY_SEL1,
66 .rxclk_delay_sel = AR8327_CLK_DELAY_SEL2,
69 static struct ar8327_platform_data rb95x_ar8327_data = {
70 .pad0_cfg = &rb95x_ar8327_pad0_cfg,
73 .speed = AR8327_PORT_SPEED_1000,
80 static struct mdio_board_info rb95x_mdio0_info[] = {
82 .bus_id = "ag71xx-mdio.0",
84 .platform_data = &rb95x_ar8327_data,
88 void __init rb95x_wlan_init(void)
91 u8 wlan_mac[ETH_ALEN];
93 art_buf = rb_get_wlan_data();
97 ath79_init_mac(wlan_mac, ath79_mac_base, 11);
98 ath79_register_wmac(art_buf + 0x1000, wlan_mac);
103 static void rb95x_nand_select_chip(int chip_no)
107 gpio_set_value(RB95X_GPIO_NAND_NCE, 0);
110 gpio_set_value(RB95X_GPIO_NAND_NCE, 1);
116 static struct nand_ecclayout rb95x_nand_ecclayout = {
118 .eccpos = { 8, 9, 10, 13, 14, 15 },
120 .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } }
123 static int rb95x_nand_scan_fixup(struct mtd_info *mtd)
125 struct nand_chip *chip = mtd->priv;
127 if (mtd->writesize == 512) {
129 * Use the OLD Yaffs-1 OOB layout, otherwise RouterBoot
130 * will not be able to find the kernel that we load.
132 chip->ecc.layout = &rb95x_nand_ecclayout;
138 void __init rb95x_nand_init(void)
140 gpio_request_one(RB95X_GPIO_NAND_NCE, GPIOF_OUT_INIT_HIGH, "NAND nCE");
142 ath79_nfc_set_scan_fixup(rb95x_nand_scan_fixup);
143 ath79_nfc_set_parts(rb95x_nand_partitions,
144 ARRAY_SIZE(rb95x_nand_partitions));
145 ath79_nfc_set_select_chip(rb95x_nand_select_chip);
146 ath79_nfc_set_swap_dma(true);
147 ath79_register_nfc();
150 static int __init rb95x_setup(void)
152 const struct rb_info *info;
154 info = rb_init_info((void *)(KSEG1ADDR(0x1f00000)), 0x10000);
160 ath79_setup_ar934x_eth_cfg(AR934X_ETH_CFG_RGMII_GMAC0 |
161 AR934X_ETH_CFG_SW_ONLY_MODE);
163 ath79_register_mdio(0, 0x0);
165 mdiobus_register_board_info(rb95x_mdio0_info,
166 ARRAY_SIZE(rb95x_mdio0_info));
168 ath79_init_mac(ath79_eth0_data.mac_addr, ath79_mac_base, 0);
169 ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
170 ath79_eth0_data.phy_mask = BIT(0);
172 ath79_register_eth(0);
177 static void __init rb951g_setup(void)
183 ath79_register_usb();
186 MIPS_MACHINE(ATH79_MACH_RB_951G, "951G", "MikroTik RouterBOARD 951G-2HnD",