target/linux/ar71xx/files/arch/mips/ar71xx/devices.c

   1 /*
   2  *  Atheros AR71xx SoC platform devices
   3  *
   4  *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
   5  *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
   6  *
   7  *  Parts of this file are based on Atheros' 2.6.15 BSP
   8  *
   9  *  This program is free software; you can redistribute it and/or modify it
  10  *  under the terms of the GNU General Public License version 2 as published
  11  *  by the Free Software Foundation.
  12  */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/init.h>
  16 #include <linux/delay.h>
  17 #include <linux/dma-mapping.h>
  18 #include <linux/etherdevice.h>
  19 #include <linux/platform_device.h>
  20 #include <linux/serial_8250.h>
  21 #include <linux/ath9k_platform.h>
  22
  23 #include <asm/mach-ar71xx/ar71xx.h>
  24
  25 #include "devices.h"
  26
  27 static u8 ar71xx_mac_base[ETH_ALEN] __initdata;
  28
  29 /*
  30  * OHCI (USB full speed host controller)
  31  */
  32 static struct resource ar71xx_ohci_resources[] = {
  33         [0] = {
  34                 .start  = AR71XX_OHCI_BASE,
  35                 .end    = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1,
  36                 .flags  = IORESOURCE_MEM,
  37         },
  38         [1] = {
  39                 .start  = AR71XX_MISC_IRQ_OHCI,
  40                 .end    = AR71XX_MISC_IRQ_OHCI,
  41                 .flags  = IORESOURCE_IRQ,
  42         },
  43 };
  44
  45 static u64 ar71xx_ohci_dmamask = DMA_BIT_MASK(32);
  46 static struct platform_device ar71xx_ohci_device = {
  47         .name           = "ar71xx-ohci",
  48         .id             = -1,
  49         .resource       = ar71xx_ohci_resources,
  50         .num_resources  = ARRAY_SIZE(ar71xx_ohci_resources),
  51         .dev = {
  52                 .dma_mask               = &ar71xx_ohci_dmamask,
  53                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  54         },
  55 };
  56
  57 /*
  58  * EHCI (USB full speed host controller)
  59  */
  60 static struct resource ar71xx_ehci_resources[] = {
  61         [0] = {
  62                 .start  = AR71XX_EHCI_BASE,
  63                 .end    = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1,
  64                 .flags  = IORESOURCE_MEM,
  65         },
  66         [1] = {
  67                 .start  = AR71XX_CPU_IRQ_USB,
  68                 .end    = AR71XX_CPU_IRQ_USB,
  69                 .flags  = IORESOURCE_IRQ,
  70         },
  71 };
  72
  73
  74 static u64 ar71xx_ehci_dmamask = DMA_BIT_MASK(32);
  75 static struct ar71xx_ehci_platform_data ar71xx_ehci_data;
  76
  77 static struct platform_device ar71xx_ehci_device = {
  78         .name           = "ar71xx-ehci",
  79         .id             = -1,
  80         .resource       = ar71xx_ehci_resources,
  81         .num_resources  = ARRAY_SIZE(ar71xx_ehci_resources),
  82         .dev = {
  83                 .dma_mask               = &ar71xx_ehci_dmamask,
  84                 .coherent_dma_mask      = DMA_BIT_MASK(32),
  85                 .platform_data          = &ar71xx_ehci_data,
  86         },
  87 };
  88
  89 #define AR71XX_USB_RESET_MASK \
  90         (RESET_MODULE_USB_HOST | RESET_MODULE_USB_PHY \
  91         | RESET_MODULE_USB_OHCI_DLL)
  92
  93 static void __init ar71xx_usb_setup(void)
  94 {
  95         ar71xx_device_stop(AR71XX_USB_RESET_MASK);
  96         mdelay(1000);
  97         ar71xx_device_start(AR71XX_USB_RESET_MASK);
  98
  99         /* Turning on the Buff and Desc swap bits */
 100         ar71xx_usb_ctrl_wr(USB_CTRL_REG_CONFIG, 0xf0000);
 101
 102         /* WAR for HW bug. Here it adjusts the duration between two SOFS */
 103         ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x20c00);
 104
 105         mdelay(900);
 106 }
 107
 108 static void __init ar91xx_usb_setup(void)
 109 {
 110         ar71xx_device_stop(RESET_MODULE_USBSUS_OVERRIDE);
 111         mdelay(10);
 112
 113         ar71xx_device_start(RESET_MODULE_USB_HOST);
 114         mdelay(10);
 115
 116         ar71xx_device_start(RESET_MODULE_USB_PHY);
 117         mdelay(10);
 118 }
 119
 120 void __init ar71xx_add_device_usb(void)
 121 {
 122         switch (ar71xx_soc) {
 123         case AR71XX_SOC_AR7130:
 124         case AR71XX_SOC_AR7141:
 125         case AR71XX_SOC_AR7161:
 126                 ar71xx_usb_setup();
 127                 platform_device_register(&ar71xx_ohci_device);
 128                 platform_device_register(&ar71xx_ehci_device);
 129                 break;
 130
 131         case AR71XX_SOC_AR9130:
 132         case AR71XX_SOC_AR9132:
 133                 ar91xx_usb_setup();
 134                 ar71xx_ehci_data.is_ar91xx = 1;
 135                 platform_device_register(&ar71xx_ehci_device);
 136                 break;
 137
 138         default:
 139                 BUG();
 140         }
 141 }
 142
 143 static struct resource ar71xx_uart_resources[] = {
 144         {
 145                 .start  = AR71XX_UART_BASE,
 146                 .end    = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1,
 147                 .flags  = IORESOURCE_MEM,
 148         },
 149 };
 150
 151 #define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP)
 152 static struct plat_serial8250_port ar71xx_uart_data[] = {
 153         {
 154                 .mapbase        = AR71XX_UART_BASE,
 155                 .irq            = AR71XX_MISC_IRQ_UART,
 156                 .flags          = AR71XX_UART_FLAGS,
 157                 .iotype         = UPIO_MEM32,
 158                 .regshift       = 2,
 159         }, {
 160                 /* terminating entry */
 161         }
 162 };
 163
 164 static struct platform_device ar71xx_uart_device = {
 165         .name           = "serial8250",
 166         .id             = PLAT8250_DEV_PLATFORM,
 167         .resource       = ar71xx_uart_resources,
 168         .num_resources  = ARRAY_SIZE(ar71xx_uart_resources),
 169         .dev = {
 170                 .platform_data  = ar71xx_uart_data
 171         },
 172 };
 173
 174 void __init ar71xx_add_device_uart(void)
 175 {
 176         ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
 177         platform_device_register(&ar71xx_uart_device);
 178 }
 179
 180 static struct resource ar71xx_mdio_resources[] = {
 181         {
 182                 .name   = "mdio_base",
 183                 .flags  = IORESOURCE_MEM,
 184                 .start  = AR71XX_GE0_BASE,
 185                 .end    = AR71XX_GE0_BASE + 0x200 - 1,
 186         }
 187 };
 188
 189 static struct ag71xx_mdio_platform_data ar71xx_mdio_data;
 190
 191 static struct platform_device ar71xx_mdio_device = {
 192         .name           = "ag71xx-mdio",
 193         .id             = -1,
 194         .resource       = ar71xx_mdio_resources,
 195         .num_resources  = ARRAY_SIZE(ar71xx_mdio_resources),
 196         .dev = {
 197                 .platform_data = &ar71xx_mdio_data,
 198         },
 199 };
 200
 201 void __init ar71xx_add_device_mdio(u32 phy_mask)
 202 {
 203         if (ar71xx_soc == AR71XX_SOC_AR7240)
 204                 ar71xx_mdio_data.is_ar7240 = 1;
 205
 206         ar71xx_mdio_data.phy_mask = phy_mask;
 207
 208         platform_device_register(&ar71xx_mdio_device);
 209 }
 210
 211 static void ar71xx_set_pll(u32 cfg_reg, u32 pll_reg, u32 pll_val, u32 shift)
 212 {
 213         void __iomem *base;
 214         u32 t;
 215
 216         base = ioremap_nocache(AR71XX_PLL_BASE, AR71XX_PLL_SIZE);
 217
 218         t = __raw_readl(base + cfg_reg);
 219         t &= ~(3 << shift);
 220         t |=  (2 << shift);
 221         __raw_writel(t, base + cfg_reg);
 222         udelay(100);
 223
 224         __raw_writel(pll_val, base + pll_reg);
 225
 226         t |= (3 << shift);
 227         __raw_writel(t, base + cfg_reg);
 228         udelay(100);
 229
 230         t &= ~(3 << shift);
 231         __raw_writel(t, base + cfg_reg);
 232         udelay(100);
 233
 234         printk(KERN_DEBUG "ar71xx: pll_reg %#x: %#x\n",
 235                 (unsigned int)(base + pll_reg), __raw_readl(base + pll_reg));
 236
 237         iounmap(base);
 238 }
 239
 240 struct ar71xx_eth_pll_data ar71xx_eth0_pll_data;
 241 struct ar71xx_eth_pll_data ar71xx_eth1_pll_data;
 242
 243 static u32 ar71xx_get_eth_pll(unsigned int mac, int speed)
 244 {
 245         struct ar71xx_eth_pll_data *pll_data;
 246         u32 pll_val;
 247
 248         switch (mac) {
 249         case 0:
 250                 pll_data = &ar71xx_eth0_pll_data;
 251                 break;
 252         case 1:
 253                 pll_data = &ar71xx_eth1_pll_data;
 254                 break;
 255         default:
 256                 BUG();
 257         }
 258
 259         switch (speed) {
 260         case SPEED_10:
 261                 pll_val = pll_data->pll_10;
 262                 break;
 263         case SPEED_100:
 264                 pll_val = pll_data->pll_100;
 265                 break;
 266         case SPEED_1000:
 267                 pll_val = pll_data->pll_1000;
 268                 break;
 269         default:
 270                 BUG();
 271         }
 272
 273         return pll_val;
 274 }
 275
 276 static void ar71xx_set_pll_ge0(int speed)
 277 {
 278         u32 val = ar71xx_get_eth_pll(0, speed);
 279
 280         ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH0_INT_CLOCK,
 281                         val, AR71XX_ETH0_PLL_SHIFT);
 282 }
 283
 284 static void ar71xx_set_pll_ge1(int speed)
 285 {
 286         u32 val = ar71xx_get_eth_pll(1, speed);
 287
 288         ar71xx_set_pll(AR71XX_PLL_REG_SEC_CONFIG, AR71XX_PLL_REG_ETH1_INT_CLOCK,
 289                          val, AR71XX_ETH1_PLL_SHIFT);
 290 }
 291
 292 static void ar724x_set_pll_ge0(int speed)
 293 {
 294         /* TODO */
 295 }
 296
 297 static void ar724x_set_pll_ge1(int speed)
 298 {
 299         /* TODO */
 300 }
 301
 302 static void ar91xx_set_pll_ge0(int speed)
 303 {
 304         u32 val = ar71xx_get_eth_pll(0, speed);
 305
 306         ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH0_INT_CLOCK,
 307                          val, AR91XX_ETH0_PLL_SHIFT);
 308 }
 309
 310 static void ar91xx_set_pll_ge1(int speed)
 311 {
 312         u32 val = ar71xx_get_eth_pll(1, speed);
 313
 314         ar71xx_set_pll(AR91XX_PLL_REG_ETH_CONFIG, AR91XX_PLL_REG_ETH1_INT_CLOCK,
 315                          val, AR91XX_ETH1_PLL_SHIFT);
 316 }
 317
 318 static void ar71xx_ddr_flush_ge0(void)
 319 {
 320         ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE0);
 321 }
 322
 323 static void ar71xx_ddr_flush_ge1(void)
 324 {
 325         ar71xx_ddr_flush(AR71XX_DDR_REG_FLUSH_GE1);
 326 }
 327
 328 static void ar724x_ddr_flush_ge0(void)
 329 {
 330         ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE0);
 331 }
 332
 333 static void ar724x_ddr_flush_ge1(void)
 334 {
 335         ar71xx_ddr_flush(AR724X_DDR_REG_FLUSH_GE1);
 336 }
 337
 338 static void ar91xx_ddr_flush_ge0(void)
 339 {
 340         ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE0);
 341 }
 342
 343 static void ar91xx_ddr_flush_ge1(void)
 344 {
 345         ar71xx_ddr_flush(AR91XX_DDR_REG_FLUSH_GE1);
 346 }
 347
 348 static struct resource ar71xx_eth0_resources[] = {
 349         {
 350                 .name   = "mac_base",
 351                 .flags  = IORESOURCE_MEM,
 352                 .start  = AR71XX_GE0_BASE,
 353                 .end    = AR71XX_GE0_BASE + 0x200 - 1,
 354         }, {
 355                 .name   = "mii_ctrl",
 356                 .flags  = IORESOURCE_MEM,
 357                 .start  = AR71XX_MII_BASE + MII_REG_MII0_CTRL,
 358                 .end    = AR71XX_MII_BASE + MII_REG_MII0_CTRL + 3,
 359         }, {
 360                 .name   = "mac_irq",
 361                 .flags  = IORESOURCE_IRQ,
 362                 .start  = AR71XX_CPU_IRQ_GE0,
 363                 .end    = AR71XX_CPU_IRQ_GE0,
 364         },
 365 };
 366
 367 struct ag71xx_platform_data ar71xx_eth0_data = {
 368         .reset_bit      = RESET_MODULE_GE0_MAC,
 369 };
 370
 371 static struct platform_device ar71xx_eth0_device = {
 372         .name           = "ag71xx",
 373         .id             = 0,
 374         .resource       = ar71xx_eth0_resources,
 375         .num_resources  = ARRAY_SIZE(ar71xx_eth0_resources),
 376         .dev = {
 377                 .platform_data = &ar71xx_eth0_data,
 378         },
 379 };
 380
 381 static struct resource ar71xx_eth1_resources[] = {
 382         {
 383                 .name   = "mac_base",
 384                 .flags  = IORESOURCE_MEM,
 385                 .start  = AR71XX_GE1_BASE,
 386                 .end    = AR71XX_GE1_BASE + 0x200 - 1,
 387         }, {
 388                 .name   = "mii_ctrl",
 389                 .flags  = IORESOURCE_MEM,
 390                 .start  = AR71XX_MII_BASE + MII_REG_MII1_CTRL,
 391                 .end    = AR71XX_MII_BASE + MII_REG_MII1_CTRL + 3,
 392         }, {
 393                 .name   = "mac_irq",
 394                 .flags  = IORESOURCE_IRQ,
 395                 .start  = AR71XX_CPU_IRQ_GE1,
 396                 .end    = AR71XX_CPU_IRQ_GE1,
 397         },
 398 };
 399
 400 struct ag71xx_platform_data ar71xx_eth1_data = {
 401         .reset_bit      = RESET_MODULE_GE1_MAC,
 402 };
 403
 404 static struct platform_device ar71xx_eth1_device = {
 405         .name           = "ag71xx",
 406         .id             = 1,
 407         .resource       = ar71xx_eth1_resources,
 408         .num_resources  = ARRAY_SIZE(ar71xx_eth1_resources),
 409         .dev = {
 410                 .platform_data = &ar71xx_eth1_data,
 411         },
 412 };
 413
 414 #define AR71XX_PLL_VAL_1000     0x00110000
 415 #define AR71XX_PLL_VAL_100      0x00001099
 416 #define AR71XX_PLL_VAL_10       0x00991099
 417
 418 #define AR724X_PLL_VAL_1000     0x00110000
 419 #define AR724X_PLL_VAL_100      0x00001099
 420 #define AR724X_PLL_VAL_10       0x00991099
 421
 422 #define AR91XX_PLL_VAL_1000     0x1a000000
 423 #define AR91XX_PLL_VAL_100      0x13000a44
 424 #define AR91XX_PLL_VAL_10       0x00441099
 425
 426 static void __init ar71xx_init_eth_pll_data(unsigned int id)
 427 {
 428         struct ar71xx_eth_pll_data *pll_data;
 429         u32 pll_10, pll_100, pll_1000;
 430
 431         switch (id) {
 432         case 0:
 433                 pll_data = &ar71xx_eth0_pll_data;
 434                 break;
 435         case 1:
 436                 pll_data = &ar71xx_eth1_pll_data;
 437                 break;
 438         default:
 439                 BUG();
 440         }
 441
 442         switch (ar71xx_soc) {
 443         case AR71XX_SOC_AR7130:
 444         case AR71XX_SOC_AR7141:
 445         case AR71XX_SOC_AR7161:
 446                 pll_10 = AR71XX_PLL_VAL_10;
 447                 pll_100 = AR71XX_PLL_VAL_100;
 448                 pll_1000 = AR71XX_PLL_VAL_1000;
 449                 break;
 450
 451         case AR71XX_SOC_AR7240:
 452                 pll_10 = AR724X_PLL_VAL_10;
 453                 pll_100 = AR724X_PLL_VAL_100;
 454                 pll_1000 = AR724X_PLL_VAL_1000;
 455                 break;
 456
 457         case AR71XX_SOC_AR9130:
 458         case AR71XX_SOC_AR9132:
 459                 pll_10 = AR91XX_PLL_VAL_10;
 460                 pll_100 = AR91XX_PLL_VAL_100;
 461                 pll_1000 = AR91XX_PLL_VAL_1000;
 462                 break;
 463         default:
 464                 BUG();
 465         }
 466
 467         if (!pll_data->pll_10)
 468                 pll_data->pll_10 = pll_10;
 469
 470         if (!pll_data->pll_100)
 471                 pll_data->pll_100 = pll_100;
 472
 473         if (!pll_data->pll_1000)
 474                 pll_data->pll_1000 = pll_1000;
 475 }
 476
 477 static int ar71xx_eth_instance __initdata;
 478 void __init ar71xx_add_device_eth(unsigned int id)
 479 {
 480         struct platform_device *pdev;
 481         struct ag71xx_platform_data *pdata;
 482
 483         ar71xx_init_eth_pll_data(id);
 484
 485         switch (id) {
 486         case 0:
 487                 switch (ar71xx_eth0_data.phy_if_mode) {
 488                 case PHY_INTERFACE_MODE_MII:
 489                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_MII;
 490                         break;
 491                 case PHY_INTERFACE_MODE_GMII:
 492                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_GMII;
 493                         break;
 494                 case PHY_INTERFACE_MODE_RGMII:
 495                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RGMII;
 496                         break;
 497                 case PHY_INTERFACE_MODE_RMII:
 498                         ar71xx_eth0_data.mii_if = MII0_CTRL_IF_RMII;
 499                         break;
 500                 default:
 501                         printk(KERN_ERR "ar71xx: invalid PHY interface mode "
 502                                         "for eth0\n");
 503                         return;
 504                 }
 505                 pdev = &ar71xx_eth0_device;
 506                 break;
 507         case 1:
 508                 switch (ar71xx_eth1_data.phy_if_mode) {
 509                 case PHY_INTERFACE_MODE_RMII:
 510                         ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RMII;
 511                         break;
 512                 case PHY_INTERFACE_MODE_RGMII:
 513                         ar71xx_eth1_data.mii_if = MII1_CTRL_IF_RGMII;
 514                         break;
 515                 default:
 516                         printk(KERN_ERR "ar71xx: invalid PHY interface mode "
 517                                         "for eth1\n");
 518                         return;
 519                 }
 520                 pdev = &ar71xx_eth1_device;
 521                 break;
 522         default:
 523                 printk(KERN_ERR "ar71xx: invalid ethernet id %d\n", id);
 524                 return;
 525         }
 526
 527         pdata = pdev->dev.platform_data;
 528
 529         switch (ar71xx_soc) {
 530         case AR71XX_SOC_AR7130:
 531                 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
 532                                       : ar71xx_ddr_flush_ge0;
 533                 pdata->set_pll =  id ? ar71xx_set_pll_ge1
 534                                      : ar71xx_set_pll_ge0;
 535                 break;
 536
 537         case AR71XX_SOC_AR7141:
 538         case AR71XX_SOC_AR7161:
 539                 pdata->ddr_flush = id ? ar71xx_ddr_flush_ge1
 540                                       : ar71xx_ddr_flush_ge0;
 541                 pdata->set_pll =  id ? ar71xx_set_pll_ge1
 542                                      : ar71xx_set_pll_ge0;
 543                 pdata->has_gbit = 1;
 544                 break;
 545
 546         case AR71XX_SOC_AR7240:
 547                 pdata->ddr_flush = id ? ar724x_ddr_flush_ge1
 548                                       : ar724x_ddr_flush_ge0;
 549                 pdata->set_pll =  id ? ar724x_set_pll_ge1
 550                                      : ar724x_set_pll_ge0;
 551                 pdata->is_ar724x = 1;
 552                 break;
 553
 554         case AR71XX_SOC_AR9130:
 555                 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
 556                                       : ar91xx_ddr_flush_ge0;
 557                 pdata->set_pll =  id ? ar91xx_set_pll_ge1
 558                                      : ar91xx_set_pll_ge0;
 559                 pdata->is_ar91xx = 1;
 560                 break;
 561
 562         case AR71XX_SOC_AR9132:
 563                 pdata->ddr_flush = id ? ar91xx_ddr_flush_ge1
 564                                       : ar91xx_ddr_flush_ge0;
 565                 pdata->set_pll =  id ? ar91xx_set_pll_ge1
 566                                       : ar91xx_set_pll_ge0;
 567                 pdata->is_ar91xx = 1;
 568                 pdata->has_gbit = 1;
 569                 break;
 570
 571         default:
 572                 BUG();
 573         }
 574
 575         switch (pdata->phy_if_mode) {
 576         case PHY_INTERFACE_MODE_GMII:
 577         case PHY_INTERFACE_MODE_RGMII:
 578                 if (!pdata->has_gbit) {
 579                         printk(KERN_ERR "ar71xx: no gbit available on eth%d\n",
 580                                         id);
 581                         return;
 582                 }
 583                 /* fallthrough */
 584         default:
 585                 break;
 586         }
 587
 588         if (is_valid_ether_addr(ar71xx_mac_base)) {
 589                 memcpy(pdata->mac_addr, ar71xx_mac_base, ETH_ALEN);
 590                 pdata->mac_addr[5] += ar71xx_eth_instance;
 591         } else {
 592                 random_ether_addr(pdata->mac_addr);
 593                 printk(KERN_DEBUG
 594                         "ar71xx: using random MAC address for eth%d\n",
 595                         ar71xx_eth_instance);
 596         }
 597
 598         /* Reset the device */
 599         ar71xx_device_stop(pdata->reset_bit);
 600         mdelay(100);
 601
 602         ar71xx_device_start(pdata->reset_bit);
 603         mdelay(100);
 604
 605         platform_device_register(pdev);
 606         ar71xx_eth_instance++;
 607 }
 608
 609 static struct resource ar71xx_spi_resources[] = {
 610         [0] = {
 611                 .start  = AR71XX_SPI_BASE,
 612                 .end    = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1,
 613                 .flags  = IORESOURCE_MEM,
 614         },
 615 };
 616
 617 static struct platform_device ar71xx_spi_device = {
 618         .name           = "ar71xx-spi",
 619         .id             = -1,
 620         .resource       = ar71xx_spi_resources,
 621         .num_resources  = ARRAY_SIZE(ar71xx_spi_resources),
 622 };
 623
 624 void __init ar71xx_add_device_spi(struct ar71xx_spi_platform_data *pdata,
 625                                 struct spi_board_info const *info,
 626                                 unsigned n)
 627 {
 628         spi_register_board_info(info, n);
 629         ar71xx_spi_device.dev.platform_data = pdata;
 630         platform_device_register(&ar71xx_spi_device);
 631 }
 632
 633 void __init ar71xx_add_device_leds_gpio(int id, unsigned num_leds,
 634                                 struct gpio_led *leds)
 635 {
 636         struct platform_device *pdev;
 637         struct gpio_led_platform_data pdata;
 638         struct gpio_led *p;
 639         int err;
 640
 641         p = kmalloc(num_leds * sizeof(*p), GFP_KERNEL);
 642         if (!p)
 643                 return;
 644
 645         memcpy(p, leds, num_leds * sizeof(*p));
 646
 647         pdev = platform_device_alloc("leds-gpio", id);
 648         if (!pdev)
 649                 goto err_free_leds;
 650
 651         memset(&pdata, 0, sizeof(pdata));
 652         pdata.num_leds = num_leds;
 653         pdata.leds = p;
 654
 655         err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
 656         if (err)
 657                 goto err_put_pdev;
 658
 659         err = platform_device_add(pdev);
 660         if (err)
 661                 goto err_put_pdev;
 662
 663         return;
 664
 665 err_put_pdev:
 666         platform_device_put(pdev);
 667
 668 err_free_leds:
 669         kfree(p);
 670 }
 671
 672 void __init ar71xx_add_device_gpio_buttons(int id,
 673                                            unsigned poll_interval,
 674                                            unsigned nbuttons,
 675                                            struct gpio_button *buttons)
 676 {
 677         struct platform_device *pdev;
 678         struct gpio_buttons_platform_data pdata;
 679         struct gpio_button *p;
 680         int err;
 681
 682         p = kmalloc(nbuttons * sizeof(*p), GFP_KERNEL);
 683         if (!p)
 684                 return;
 685
 686         memcpy(p, buttons, nbuttons * sizeof(*p));
 687
 688         pdev = platform_device_alloc("gpio-buttons", id);
 689         if (!pdev)
 690                 goto err_free_buttons;
 691
 692         memset(&pdata, 0, sizeof(pdata));
 693         pdata.poll_interval = poll_interval;
 694         pdata.nbuttons = nbuttons;
 695         pdata.buttons = p;
 696
 697         err = platform_device_add_data(pdev, &pdata, sizeof(pdata));
 698         if (err)
 699                 goto err_put_pdev;
 700
 701
 702         err = platform_device_add(pdev);
 703         if (err)
 704                 goto err_put_pdev;
 705
 706         return;
 707
 708 err_put_pdev:
 709         platform_device_put(pdev);
 710
 711 err_free_buttons:
 712         kfree(p);
 713 }
 714
 715 void __init ar71xx_add_device_wdt(void)
 716 {
 717         platform_device_register_simple("ar71xx-wdt", -1, NULL, 0);
 718 }
 719
 720 void __init ar71xx_set_mac_base(unsigned char *mac)
 721 {
 722         memcpy(ar71xx_mac_base, mac, ETH_ALEN);
 723 }
 724
 725 void __init ar71xx_parse_mac_addr(char *mac_str)
 726 {
 727         u8 tmp[ETH_ALEN];
 728         int t;
 729
 730         t = sscanf(mac_str, "%02hhx:%02hhx:%02hhx:%02hhx:%02hhx:%02hhx",
 731                         &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
 732
 733         if (t != ETH_ALEN)
 734                 t = sscanf(mac_str, "%02hhx.%02hhx.%02hhx.%02hhx.%02hhx.%02hhx",
 735                         &tmp[0], &tmp[1], &tmp[2], &tmp[3], &tmp[4], &tmp[5]);
 736
 737         if (t == ETH_ALEN)
 738                 ar71xx_set_mac_base(tmp);
 739         else
 740                 printk(KERN_DEBUG "ar71xx: failed to parse mac address "
 741                                 "\"%s\"\n", mac_str);
 742 }
 743
 744 static struct resource ar91xx_wmac_resources[] = {
 745         {
 746                 .start  = AR91XX_WMAC_BASE,
 747                 .end    = AR91XX_WMAC_BASE + AR91XX_WMAC_SIZE - 1,
 748                 .flags  = IORESOURCE_MEM,
 749         }, {
 750                 .start  = AR71XX_CPU_IRQ_WMAC,
 751                 .end    = AR71XX_CPU_IRQ_WMAC,
 752                 .flags  = IORESOURCE_IRQ,
 753         },
 754 };
 755
 756 static struct ath9k_platform_data ar91xx_wmac_data;
 757
 758 static struct platform_device ar91xx_wmac_device = {
 759         .name           = "ath9k",
 760         .id             = -1,
 761         .resource       = ar91xx_wmac_resources,
 762         .num_resources  = ARRAY_SIZE(ar91xx_wmac_resources),
 763         .dev = {
 764                 .platform_data = &ar91xx_wmac_data,
 765         },
 766 };
 767
 768 void __init ar91xx_add_device_wmac(void)
 769 {
 770         u8 *ee = (u8 *) KSEG1ADDR(0x1fff1000);
 771
 772         memcpy(ar91xx_wmac_data.eeprom_data, ee,
 773                sizeof(ar91xx_wmac_data.eeprom_data));
 774
 775         ar71xx_device_stop(RESET_MODULE_AMBA2WMAC);
 776         mdelay(10);
 777
 778         ar71xx_device_start(RESET_MODULE_AMBA2WMAC);
 779         mdelay(10);
 780
 781         platform_device_register(&ar91xx_wmac_device);
 782 }
 783
 784 static struct platform_device ar71xx_dsa_switch_device = {
 785         .name           = "dsa",
 786         .id             = 0,
 787 };
 788
 789 void __init ar71xx_add_device_dsa(unsigned int id,
 790                                   struct dsa_platform_data *d)
 791 {
 792         switch (id) {
 793         case 0:
 794                 d->netdev = &ar71xx_eth0_device.dev;
 795                 break;
 796         case 1:
 797                 d->netdev = &ar71xx_eth1_device.dev;
 798                 break;
 799         default:
 800                 printk(KERN_ERR
 801                         "ar71xx: invalid ethernet id %d for DSA switch\n",
 802                         id);
 803                 return;
 804         }
 805         d->mii_bus = &ar71xx_mdio_device.dev;
 806         ar71xx_dsa_switch_device.dev.platform_data = d;
 807
 808         platform_device_register(&ar71xx_dsa_switch_device);
 809 }