2 * Copyright (C) ADMtek Incorporated.
3 * Creator : daniell@admtek.com.tw
4 * Carsten Langgaard, carstenl@mips.com
5 * Copyright (C) 2000, 2001 MIPS Technologies, Inc.
6 * Copyright (C) 2001 Ralf Baechle
7 * Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
10 #include <linux/autoconf.h>
11 #include <linux/init.h>
12 #include <linux/kernel_stat.h>
13 #include <linux/signal.h>
14 #include <linux/sched.h>
15 #include <linux/interrupt.h>
16 #include <linux/slab.h>
17 #include <linux/random.h>
22 #include <asm/mipsregs.h>
23 #include <asm/gdb-stub.h>
24 #include <asm/irq_cpu.h>
26 #define MIPS_CPU_TIMER_IRQ 7
28 extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
29 extern irq_desc_t irq_desc[];
30 extern asmlinkage void mipsIRQ(void);
32 int mips_int_lock(void);
33 void mips_int_unlock(int);
35 unsigned int mips_counter_frequency;
37 #define ADM5120_INTC_REG(reg) (*(volatile u32 *)(KSEG1ADDR(0x12200000+(reg))))
38 #define ADM5120_INTC_STATUS ADM5120_INTC_REG(0x00)
39 #define ADM5120_INTC_ENABLE ADM5120_INTC_REG(0x08)
40 #define ADM5120_INTC_DISABLE ADM5120_INTC_REG(0x0c)
41 #define ADM5120_IRQ_MAX 9
42 #define ADM5120_IRQ_MASK 0x3ff
44 void adm5120_hw0_irqdispatch(struct pt_regs *regs)
49 intsrc = ADM5120_INTC_STATUS & ADM5120_IRQ_MASK;
51 for (i = 0; intsrc; intsrc >>= 1, i++)
58 void mips_timer_interrupt(struct pt_regs *regs)
60 write_c0_compare(read_c0_count()+ mips_counter_frequency/HZ);
61 ll_timer_interrupt(MIPS_CPU_TIMER_IRQ);
64 /* Main interrupt dispatcher */
65 asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
67 unsigned int cp0_cause = read_c0_cause() & read_c0_status();
69 if (cp0_cause & CAUSEF_IP7) {
70 mips_timer_interrupt( regs);
71 } else if (cp0_cause & CAUSEF_IP2) {
72 adm5120_hw0_irqdispatch( regs);
76 void enable_adm5120_irq(unsigned int irq)
80 /* Disable all interrupts (FIQ/IRQ) */
83 if ((irq < 0) || (irq > ADM5120_IRQ_MAX))
86 ADM5120_INTC_ENABLE = (1<<irq);
90 /* Restore the interrupts states */
95 void disable_adm5120_irq(unsigned int irq)
99 /* Disable all interrupts (FIQ/IRQ) */
102 if ((irq < 0) || (irq > ADM5120_IRQ_MAX))
105 ADM5120_INTC_DISABLE = (1<<irq);
108 /* Restore the interrupts states */
112 unsigned int startup_adm5120_irq(unsigned int irq)
114 enable_adm5120_irq(irq);
118 void shutdown_adm5120_irq(unsigned int irq)
120 disable_adm5120_irq(irq);
123 static inline void ack_adm5120_irq(unsigned int irq_nr)
125 ADM5120_INTC_DISABLE = (1 << irq_nr);
129 static void end_adm5120_irq(unsigned int irq_nr)
131 ADM5120_INTC_ENABLE = (1 << irq_nr);
134 static hw_irq_controller adm5120_irq_type = {
136 .startup = startup_adm5120_irq,
137 .shutdown = shutdown_adm5120_irq,
138 .enable = enable_adm5120_irq,
139 .disable = disable_adm5120_irq,
140 .ack = ack_adm5120_irq,
141 .end = end_adm5120_irq,
142 .set_affinity = NULL,
146 void __init arch_init_irq(void)
150 for (i = 0; i <= ADM5120_IRQ_MAX; i++) {
151 irq_desc[i].status = IRQ_DISABLED;
152 irq_desc[i].action = 0;
153 irq_desc[i].depth = 1;
154 irq_desc[i].chip = &adm5120_irq_type;