package/mac80211/patches/581-ath9k_merge_reset_functions.patch

   1 --- a/drivers/net/wireless/ath/ath9k/main.c
   2 +++ b/drivers/net/wireless/ath/ath9k/main.c
   3 @@ -212,83 +212,39 @@ static int ath_update_survey_stats(struc
   4         return ret;
   5  }
   6
   7 -/*
   8 - * Set/change channels.  If the channel is really being changed, it's done
   9 - * by reseting the chip.  To accomplish this we must first cleanup any pending
  10 - * DMA, then restart stuff.
  11 -*/
  12 -static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  13 -                   struct ath9k_channel *hchan)
  14 +static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx)
  15  {
  16         struct ath_hw *ah = sc->sc_ah;
  17 -       struct ath_common *common = ath9k_hw_common(ah);
  18 -       struct ieee80211_conf *conf = &common->hw->conf;
  19 -       bool fastcc = true, stopped;
  20 -       struct ieee80211_channel *channel = hw->conf.channel;
  21 -       struct ath9k_hw_cal_data *caldata = NULL;
  22 -       int r;
  23 +       bool ret;
  24
  25 -       if (sc->sc_flags & SC_OP_INVALID)
  26 -               return -EIO;
  27 +       ieee80211_stop_queues(sc->hw);
  28
  29         sc->hw_busy_count = 0;
  30 -
  31 -       del_timer_sync(&common->ani.timer);
  32         cancel_work_sync(&sc->paprd_work);
  33         cancel_work_sync(&sc->hw_check_work);
  34         cancel_delayed_work_sync(&sc->tx_complete_work);
  35         cancel_delayed_work_sync(&sc->hw_pll_work);
  36
  37 -       ath9k_ps_wakeup(sc);
  38 -
  39 -       spin_lock_bh(&sc->sc_pcu_lock);
  40 -
  41 -       /*
  42 -        * This is only performed if the channel settings have
  43 -        * actually changed.
  44 -        *
  45 -        * To switch channels clear any pending DMA operations;
  46 -        * wait long enough for the RX fifo to drain, reset the
  47 -        * hardware at the new frequency, and then re-enable
  48 -        * the relevant bits of the h/w.
  49 -        */
  50         ath9k_hw_disable_interrupts(ah);
  51 -       stopped = ath_drain_all_txq(sc, false);
  52
  53 -       if (!ath_stoprecv(sc))
  54 -               stopped = false;
  55 -
  56 -       if (!ath9k_hw_check_alive(ah))
  57 -               stopped = false;
  58 -
  59 -       /* XXX: do not flush receive queue here. We don't want
  60 -        * to flush data frames already in queue because of
  61 -        * changing channel. */
  62 +       ret = ath_drain_all_txq(sc, retry_tx);
  63
  64 -       if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  65 -               fastcc = false;
  66 +       if (!ath_stoprecv(sc))
  67 +               ret = false;
  68
  69 -       if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  70 -               caldata = &sc->caldata;
  71 +       ath_flushrecv(sc);
  72
  73 -       ath_dbg(common, ATH_DBG_CONFIG,
  74 -               "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  75 -               sc->sc_ah->curchan->channel,
  76 -               channel->center_freq, conf_is_ht40(conf),
  77 -               fastcc);
  78 +       return ret;
  79 +}
  80
  81 -       r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  82 -       if (r) {
  83 -               ath_err(common,
  84 -                       "Unable to reset channel (%u MHz), reset status %d\n",
  85 -                       channel->center_freq, r);
  86 -               goto ps_restore;
  87 -       }
  88 +static bool ath_complete_reset(struct ath_softc *sc)
  89 +{
  90 +       struct ath_hw *ah = sc->sc_ah;
  91 +       struct ath_common *common = ath9k_hw_common(ah);
  92
  93         if (ath_startrecv(sc) != 0) {
  94                 ath_err(common, "Unable to restart recv logic\n");
  95 -               r = -EIO;
  96 -               goto ps_restore;
  97 +               return false;
  98         }
  99
 100         ath9k_cmn_update_txpow(ah, sc->curtxpow,
 101 @@ -299,18 +255,84 @@ static int ath_set_channel(struct ath_so
 102         if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
 103                 if (sc->sc_flags & SC_OP_BEACONS)
 104                         ath_set_beacon(sc);
 105 +
 106                 ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 107                 ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
 108                 if (!common->disable_ani)
 109                         ath_start_ani(common);
 110         }
 111
 112 - ps_restore:
 113 -       ieee80211_wake_queues(hw);
 114 +       ieee80211_wake_queues(sc->hw);
 115 +
 116 +       return true;
 117 +}
 118 +
 119 +static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
 120 +                             bool retry_tx)
 121 +{
 122 +       struct ath_hw *ah = sc->sc_ah;
 123 +       struct ath_common *common = ath9k_hw_common(ah);
 124 +       struct ath9k_hw_cal_data *caldata = NULL;
 125 +       bool fastcc = true;
 126 +       int r;
 127 +
 128 +       if (!(sc->sc_flags & SC_OP_OFFCHANNEL)) {
 129 +               fastcc = false;
 130 +               caldata = &sc->caldata;
 131 +       }
 132
 133 +       if (!hchan) {
 134 +               fastcc = false;
 135 +               hchan = ah->curchan;
 136 +       }
 137 +
 138 +       if (fastcc && !ath9k_hw_check_alive(ah))
 139 +               fastcc = false;
 140 +
 141 +       if (!ath_prepare_reset(sc, retry_tx))
 142 +               fastcc = false;
 143 +
 144 +       ath_dbg(common, ATH_DBG_CONFIG,
 145 +               "Reset to %u MHz, HT40: %d fastcc: %d\n",
 146 +               hchan->channel, !!(hchan->channelFlags & (CHANNEL_HT40MINUS |
 147 +                                                         CHANNEL_HT40PLUS)),
 148 +               fastcc);
 149 +
 150 +       r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
 151 +       if (r) {
 152 +               ath_err(common,
 153 +                       "Unable to reset channel, reset status %d\n", r);
 154 +               return r;
 155 +       }
 156 +
 157 +       if (!ath_complete_reset(sc))
 158 +               return -EIO;
 159 +
 160 +       return 0;
 161 +}
 162 +
 163 +
 164 +/*
 165 + * Set/change channels.  If the channel is really being changed, it's done
 166 + * by reseting the chip.  To accomplish this we must first cleanup any pending
 167 + * DMA, then restart stuff.
 168 +*/
 169 +static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
 170 +                   struct ath9k_channel *hchan)
 171 +{
 172 +       int r;
 173 +
 174 +       if (sc->sc_flags & SC_OP_INVALID)
 175 +               return -EIO;
 176 +
 177 +       ath9k_ps_wakeup(sc);
 178 +
 179 +       spin_lock_bh(&sc->sc_pcu_lock);
 180 +       r = ath_reset_internal(sc, hchan, false);
 181         spin_unlock_bh(&sc->sc_pcu_lock);
 182
 183         ath9k_ps_restore(sc);
 184 +
 185         return r;
 186  }
 187
 188 @@ -893,28 +915,13 @@ static void ath_radio_enable(struct ath_
 189                         channel->center_freq, r);
 190         }
 191
 192 -       ath9k_cmn_update_txpow(ah, sc->curtxpow,
 193 -                              sc->config.txpowlimit, &sc->curtxpow);
 194 -       if (ath_startrecv(sc) != 0) {
 195 -               ath_err(common, "Unable to restart recv logic\n");
 196 -               goto out;
 197 -       }
 198 -       if (sc->sc_flags & SC_OP_BEACONS)
 199 -               ath_set_beacon(sc);     /* restart beacons */
 200 -
 201 -       /* Re-Enable  interrupts */
 202 -       ath9k_hw_set_interrupts(ah, ah->imask);
 203 -       ath9k_hw_enable_interrupts(ah);
 204 +       ath_complete_reset(sc);
 205
 206         /* Enable LED */
 207         ath9k_hw_cfg_output(ah, ah->led_pin,
 208                             AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
 209         ath9k_hw_set_gpio(ah, ah->led_pin, 0);
 210
 211 -       ieee80211_wake_queues(hw);
 212 -       ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
 213 -
 214 -out:
 215         spin_unlock_bh(&sc->sc_pcu_lock);
 216
 217         ath9k_ps_restore(sc);
 218 @@ -942,13 +949,7 @@ void ath_radio_disable(struct ath_softc
 219                 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
 220         }
 221
 222 -       /* Disable interrupts */
 223 -       ath9k_hw_disable_interrupts(ah);
 224 -
 225 -       ath_drain_all_txq(sc, false);   /* clear pending tx frames */
 226 -
 227 -       ath_stoprecv(sc);               /* turn off frame recv */
 228 -       ath_flushrecv(sc);              /* flush recv queue */
 229 +       ath_prepare_reset(sc, false);
 230
 231         if (!ah->curchan)
 232                 ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
 233 @@ -970,48 +971,11 @@ void ath_radio_disable(struct ath_softc
 234
 235  int ath_reset(struct ath_softc *sc, bool retry_tx)
 236  {
 237 -       struct ath_hw *ah = sc->sc_ah;
 238 -       struct ath_common *common = ath9k_hw_common(ah);
 239 -       struct ieee80211_hw *hw = sc->hw;
 240         int r;
 241
 242 -       sc->hw_busy_count = 0;
 243 -
 244 -       /* Stop ANI */
 245 -
 246 -       del_timer_sync(&common->ani.timer);
 247 -
 248         ath9k_ps_wakeup(sc);
 249
 250 -       ieee80211_stop_queues(hw);
 251 -
 252 -       ath9k_hw_disable_interrupts(ah);
 253 -       ath_drain_all_txq(sc, retry_tx);
 254 -
 255 -       ath_stoprecv(sc);
 256 -       ath_flushrecv(sc);
 257 -
 258 -       r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
 259 -       if (r)
 260 -               ath_err(common,
 261 -                       "Unable to reset hardware; reset status %d\n", r);
 262 -
 263 -       if (ath_startrecv(sc) != 0)
 264 -               ath_err(common, "Unable to start recv logic\n");
 265 -
 266 -       /*
 267 -        * We may be doing a reset in response to a request
 268 -        * that changes the channel so update any state that
 269 -        * might change as a result.
 270 -        */
 271 -       ath9k_cmn_update_txpow(ah, sc->curtxpow,
 272 -                              sc->config.txpowlimit, &sc->curtxpow);
 273 -
 274 -       if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
 275 -               ath_set_beacon(sc);     /* restart beacons */
 276 -
 277 -       ath9k_hw_set_interrupts(ah, ah->imask);
 278 -       ath9k_hw_enable_interrupts(ah);
 279 +       r = ath_reset_internal(sc, NULL, retry_tx);
 280
 281         if (retry_tx) {
 282                 int i;
 283 @@ -1024,12 +988,6 @@ int ath_reset(struct ath_softc *sc, bool
 284                 }
 285         }
 286
 287 -       ieee80211_wake_queues(hw);
 288 -
 289 -       /* Start ANI */
 290 -       if (!common->disable_ani)
 291 -               ath_start_ani(common);
 292 -
 293         ath9k_ps_restore(sc);
 294
 295         return r;
 296 @@ -1081,28 +1039,6 @@ static int ath9k_start(struct ieee80211_
 297                 goto mutex_unlock;
 298         }
 299
 300 -       /*
 301 -        * This is needed only to setup initial state
 302 -        * but it's best done after a reset.
 303 -        */
 304 -       ath9k_cmn_update_txpow(ah, sc->curtxpow,
 305 -                       sc->config.txpowlimit, &sc->curtxpow);
 306 -
 307 -       /*
 308 -        * Setup the hardware after reset:
 309 -        * The receive engine is set going.
 310 -        * Frame transmit is handled entirely
 311 -        * in the frame output path; there's nothing to do
 312 -        * here except setup the interrupt mask.
 313 -        */
 314 -       if (ath_startrecv(sc) != 0) {
 315 -               ath_err(common, "Unable to start recv logic\n");
 316 -               r = -EIO;
 317 -               spin_unlock_bh(&sc->sc_pcu_lock);
 318 -               goto mutex_unlock;
 319 -       }
 320 -       spin_unlock_bh(&sc->sc_pcu_lock);
 321 -
 322         /* Setup our intr mask. */
 323         ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
 324                     ATH9K_INT_RXORN | ATH9K_INT_FATAL |
 325 @@ -1125,12 +1061,14 @@ static int ath9k_start(struct ieee80211_
 326
 327         /* Disable BMISS interrupt when we're not associated */
 328         ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
 329 -       ath9k_hw_set_interrupts(ah, ah->imask);
 330 -       ath9k_hw_enable_interrupts(ah);
 331
 332 -       ieee80211_wake_queues(hw);
 333 +       if (!ath_complete_reset(sc)) {
 334 +               r = -EIO;
 335 +               spin_unlock_bh(&sc->sc_pcu_lock);
 336 +               goto mutex_unlock;
 337 +       }
 338
 339 -       ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
 340 +       spin_unlock_bh(&sc->sc_pcu_lock);
 341
 342         if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
 343             !ah->btcoex_hw.enabled) {