package/mac80211/patches/569-ath9k-configure-internal-regulator-for-AR9330.patch

   1 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
   2 +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
   3 @@ -3712,7 +3712,7 @@ static void ar9003_hw_internal_regulator
   4                 ath9k_hw_ar9300_get_eeprom(ah, EEP_INTERNAL_REGULATOR);
   5
   6         if (internal_regulator) {
   7 -               if (AR_SREV_9485(ah)) {
   8 +               if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
   9                         int reg_pmu_set;
  10
  11                         reg_pmu_set = REG_READ(ah, AR_PHY_PMU2) & ~AR_PHY_PMU2_PGM;
  12 @@ -3720,9 +3720,24 @@ static void ar9003_hw_internal_regulator
  13                         if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set))
  14                                 return;
  15
  16 -                       reg_pmu_set = (5 << 1) | (7 << 4) | (1 << 8) |
  17 -                                     (2 << 14) | (6 << 17) | (1 << 20) |
  18 -                                     (3 << 24) | (1 << 28);
  19 +                       if (AR_SREV_9330(ah)) {
  20 +                               if (ah->is_clk_25mhz) {
  21 +                                       reg_pmu_set = (3 << 1) | (8 << 4) |
  22 +                                                     (3 << 8) | (1 << 14) |
  23 +                                                     (6 << 17) | (1 << 20) |
  24 +                                                     (3 << 24);
  25 +                               } else {
  26 +                                       reg_pmu_set = (4 << 1)  | (7 << 4) |
  27 +                                                     (3 << 8)  | (1 << 14) |
  28 +                                                     (6 << 17) | (1 << 20) |
  29 +                                                     (3 << 24);
  30 +                               }
  31 +                       } else {
  32 +                               reg_pmu_set = (5 << 1) | (7 << 4) |
  33 +                                             (1 << 8) | (2 << 14) |
  34 +                                             (6 << 17) | (1 << 20) |
  35 +                                             (3 << 24) | (1 << 28);
  36 +                       }
  37
  38                         REG_WRITE(ah, AR_PHY_PMU1, reg_pmu_set);
  39                         if (!is_pmu_set(ah, AR_PHY_PMU1, reg_pmu_set))
  40 @@ -3753,7 +3768,7 @@ static void ar9003_hw_internal_regulator
  41                                            AR_RTC_REG_CONTROL1_SWREG_PROGRAM);
  42                 }
  43         } else {
  44 -               if (AR_SREV_9485(ah)) {
  45 +               if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
  46                         REG_RMW_FIELD(ah, AR_PHY_PMU2, AR_PHY_PMU2_PGM, 0);
  47                         while (REG_READ_FIELD(ah, AR_PHY_PMU2,
  48                                               AR_PHY_PMU2_PGM))