1 /******************************************************************************
3 ** FILE NAME : ifxmips_deu_vr9.h
5 ** MODULES : DEU Module for VR9
7 ** DATE : September 8, 2009
8 ** AUTHOR : Mohammad Firdaus
9 ** DESCRIPTION : Data Encryption Unit Driver
10 ** COPYRIGHT : Copyright (c) 2009
11 ** Infineon Technologies AG
12 ** Am Campeon 1-12, 85579 Neubiberg, Germany
14 ** This program is free software; you can redistribute it and/or modify
15 ** it under the terms of the GNU General Public License as published by
16 ** the Free Software Foundation; either version 2 of the License, or
17 ** (at your option) any later version.
20 ** $Date $Author $Comment
21 ** 08,Sept 2009 Mohammad Firdaus Initial UEIP release
22 *******************************************************************************/
24 \defgroup IFX_DEU IFX_DEU_DRIVERS
26 \brief deu driver module
30 \file ifxmips_deu_vr9.h
32 \brief board specific deu driver header file for vr9
36 \defgroup IFX_DEU_DEFINITIONS IFX_DEU_DEFINITIONS
37 \brief deu driver header file
41 #ifndef IFXMIPS_DEU_VR9_H
42 #define IFXMIPS_DEU_VR9_H
44 /* Project Header Files */
45 #include <linux/version.h>
46 #include <linux/module.h>
47 #include <linux/init.h>
48 #include <linux/types.h>
49 #include <linux/errno.h>
50 #include <linux/crypto.h>
51 #include <linux/interrupt.h>
52 #include <linux/delay.h>
53 #include <asm/byteorder.h>
54 #include <crypto/algapi.h>
55 #include <linux/module.h>
57 #include <asm/scatterlist.h>
58 #include <linux/skbuff.h>
59 #include <linux/netdevice.h>
60 #include "ifxmips_deu.h"
68 #define SHA1_HMAC_INIT 6
69 #define MD5_HMAC_INIT 7
71 #define AES_START IFX_AES_CON
72 #define DES_3DES_START IFX_DES_CON
78 #define AES_COMPLETED 3
82 #define DES_COMPLETED 3
86 #define HASH_CON_VALUE 0x0701002C
88 #define INPUT_ENDIAN_SWAP(input) input_swap(input)
89 #define DEU_ENDIAN_SWAP(input) endian_swap(input)
90 #define FIND_DEU_CHIP_VERSION chip_version()
92 #if defined (CONFIG_AR10)
93 #define DELAY_PERIOD 30
95 #define DELAY_PERIOD 10
98 #define WAIT_AES_DMA_READY() \
101 volatile struct deu_dma_t *dma = (struct deu_dma_t *) IFX_DEU_DMA_CON; \
102 volatile struct aes_t *aes = (volatile struct aes_t *) AES_START; \
103 for (i = 0; i < 10; i++) \
104 udelay(DELAY_PERIOD); \
105 while (dma->controlr.BSY) {}; \
106 while (aes->controlr.BUS) {}; \
109 #define WAIT_DES_DMA_READY() \
112 volatile struct deu_dma_t *dma = (struct deu_dma_t *) IFX_DEU_DMA_CON; \
113 volatile struct des_t *des = (struct des_t *) DES_3DES_START; \
114 for (i = 0; i < 10; i++) \
115 udelay(DELAY_PERIOD); \
116 while (dma->controlr.BSY) {}; \
117 while (des->controlr.BUS) {}; \
120 #define AES_DMA_MISC_CONFIG() \
122 volatile struct aes_t *aes = (volatile struct aes_t *) AES_START; \
123 aes->controlr.KRE = 1; \
124 aes->controlr.GO = 1; \
127 #define SHA_HASH_INIT \
129 volatile struct deu_hash_t *hash = (struct deu_hash_t *) HASH_START; \
130 hash->controlr.ENDI = 1; \
131 hash->controlr.SM = 1; \
132 hash->controlr.ALGO = 0; \
133 hash->controlr.INIT = 1; \
136 #define MD5_HASH_INIT \
138 volatile struct deu_hash_t *hash = (struct deu_hash_t *) HASH_START; \
139 hash->controlr.ENDI = 1; \
140 hash->controlr.SM = 1; \
141 hash->controlr.ALGO = 1; \
142 hash->controlr.INIT = 1; \
145 /* DEU Common Structures for AR9*/
147 struct clc_controlr_t {
159 struct des_controlr { //10h
193 struct aes_controlr {
238 struct arc4_controlr {
275 struct hash_controlr {
311 struct dma_controlr {
324 #endif /* IFXMIPS_DEU_VR9_H */