From 51dad7245443d4a057687669bc34bcf934c2f483 Mon Sep 17 00:00:00 2001 From: nbd Date: Tue, 27 Mar 2007 23:15:10 +0000 Subject: fix flash buswidth detection git-svn-id: svn://svn.openwrt.org/openwrt/trunk@6727 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'target/linux/atheros-2.6/files') diff --git a/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c b/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c index 384020b27e..57d56eb0e5 100644 --- a/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c +++ b/target/linux/atheros-2.6/files/arch/mips/atheros/ar5312.c @@ -255,13 +255,13 @@ int __init ar5312_init_devices(void) ar5312_eth0_data.board_config = board_config; ar5312_eth1_data.board_config = board_config; - /* fixup flash width; TODO: constants -> defines */ - fctl = sysRegRead(AR531X_FLASHCTL) & 0x30000000; + /* fixup flash width */ + fctl = sysRegRead(AR531X_FLASHCTL) & FLASHCTL_MW; switch (fctl) { - case 0x20000000: + case FLASHCTL_MWx16: ar5312_flash_data.width = 2; break; - case 0x00000000: + case FLASHCTL_MWx8: default: ar5312_flash_data.width = 1; break; -- cgit v1.2.3