From 41be3a0bd3c75498ef641c1611201e18cb94150c Mon Sep 17 00:00:00 2001 From: juhosg Date: Sat, 8 Sep 2012 13:39:09 +0000 Subject: ar71xx: fix CPU/DDR frequency calculation for SRIF PLLs on AR934x git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33335 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../170-MIPS-ath79-add-PCI-controller-registration-code-for-.patch | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'target/linux/ar71xx/patches-3.3/170-MIPS-ath79-add-PCI-controller-registration-code-for-.patch') diff --git a/target/linux/ar71xx/patches-3.3/170-MIPS-ath79-add-PCI-controller-registration-code-for-.patch b/target/linux/ar71xx/patches-3.3/170-MIPS-ath79-add-PCI-controller-registration-code-for-.patch index c503a0da52..0c3889fdb9 100644 --- a/target/linux/ar71xx/patches-3.3/170-MIPS-ath79-add-PCI-controller-registration-code-for-.patch +++ b/target/linux/ar71xx/patches-3.3/170-MIPS-ath79-add-PCI-controller-registration-code-for-.patch @@ -81,9 +81,9 @@ Subject: [PATCH 26/34] MIPS: ath79: add PCI controller registration code for the return -ENODEV; --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h -@@ -92,6 +92,19 @@ - #define AR934X_EHCI_BASE 0x1b000000 - #define AR934X_EHCI_SIZE 0x200 +@@ -94,6 +94,19 @@ + #define AR934X_SRIF_BASE (AR71XX_APB_BASE + 0x00116000) + #define AR934X_SRIF_SIZE 0x1000 +#define QCA955X_PCI_MEM_BASE0 0x10000000 +#define QCA955X_PCI_MEM_BASE1 0x12000000 -- cgit v1.2.3