From 57563ffd07c2b88f6bd9625d9913854e41222393 Mon Sep 17 00:00:00 2001 From: nbd Date: Sun, 28 Mar 2010 00:36:37 +0000 Subject: ar71xx: fix pci on ar7241/ar7242 git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20530 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) (limited to 'target/linux/ar71xx/files') diff --git a/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c b/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c index b1f5fa9ee1..b639806199 100644 --- a/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c +++ b/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c @@ -110,8 +110,12 @@ static int ar724x_pci_read_config(struct pci_bus *bus, unsigned int devfn, * WAR for BAR issue - We are unable to access the PCI device space * if we set the BAR with proper base address */ - if ((where == 0x10) && (size == 4)) - ar724x_pci_write(ar724x_pci_devcfg_base, where, size, 0xffff); + if ((where == 0x10) && (size == 4)) { + if (ar71xx_soc == AR71XX_SOC_AR7240) + ar724x_pci_write(ar724x_pci_devcfg_base, where, size, 0xffff); + else + ar724x_pci_write(ar724x_pci_devcfg_base, where, size, 0x1000ffff); + } return PCIBIOS_SUCCESSFUL; } @@ -237,7 +241,11 @@ static int __init ar724x_pci_setup(void) udelay(100000); } - __raw_writel(AR724X_PCI_APP_LTSSM_ENABLE, base + AR724X_PCI_REG_APP); + if (ar71xx_soc == AR71XX_SOC_AR7240) + t = AR724X_PCI_APP_LTSSM_ENABLE; + else + t = 0x1ffc1; + __raw_writel(t, base + AR724X_PCI_REG_APP); /* flush write */ (void) __raw_readl(base + AR724X_PCI_REG_APP); udelay(1000); -- cgit v1.2.3