From 520149cb7f85a6f527f270005c83afad3a0b7bda Mon Sep 17 00:00:00 2001 From: juhosg Date: Wed, 1 Jun 2011 13:12:31 +0000 Subject: mac80211: add initial support for AR9330 git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27084 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- ...th9k-initialize-mode-registers-for-AR9330.patch | 142 +++++++++++++++++++++ 1 file changed, 142 insertions(+) create mode 100644 package/mac80211/patches/545-ath9k-initialize-mode-registers-for-AR9330.patch (limited to 'package/mac80211/patches/545-ath9k-initialize-mode-registers-for-AR9330.patch') diff --git a/package/mac80211/patches/545-ath9k-initialize-mode-registers-for-AR9330.patch b/package/mac80211/patches/545-ath9k-initialize-mode-registers-for-AR9330.patch new file mode 100644 index 0000000000..f102389d61 --- /dev/null +++ b/package/mac80211/patches/545-ath9k-initialize-mode-registers-for-AR9330.patch @@ -0,0 +1,142 @@ +diff --git a/drivers/net/wireless/ath/ath9k/ar9003_hw.c b/drivers/net/wireless/ath/ath9k/ar9003_hw.c +index 392bf0f..dc0ad4a 100644 +--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c ++++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c +@@ -19,6 +19,8 @@ + #include "ar9003_2p2_initvals.h" + #include "ar9485_initvals.h" + #include "ar9340_initvals.h" ++#include "ar9330_1p1_initvals.h" ++#include "ar9330_1p2_initvals.h" + + /* General hardware code for the AR9003 hadware family */ + +@@ -29,7 +31,113 @@ + */ + static void ar9003_hw_init_mode_regs(struct ath_hw *ah) + { +- if (AR_SREV_9340(ah)) { ++ if (AR_SREV_9330_11(ah)) { ++ /* mac */ ++ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); ++ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ++ ar9331_1p1_mac_core, ++ ARRAY_SIZE(ar9331_1p1_mac_core), 2); ++ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], ++ ar9331_1p1_mac_postamble, ++ ARRAY_SIZE(ar9331_1p1_mac_postamble), 5); ++ ++ /* bb */ ++ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0); ++ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], ++ ar9331_1p1_baseband_core, ++ ARRAY_SIZE(ar9331_1p1_baseband_core), 2); ++ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], ++ ar9331_1p1_baseband_postamble, ++ ARRAY_SIZE(ar9331_1p1_baseband_postamble), 5); ++ ++ /* radio */ ++ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0); ++ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], ++ ar9331_1p1_radio_core, ++ ARRAY_SIZE(ar9331_1p1_radio_core), 2); ++ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0); ++ ++ /* soc */ ++ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], ++ ar9331_1p1_soc_preamble, ++ ARRAY_SIZE(ar9331_1p1_soc_preamble), 2); ++ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0); ++ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], ++ ar9331_1p1_soc_postamble, ++ ARRAY_SIZE(ar9331_1p1_soc_postamble), 2); ++ ++ /* rx/tx gain */ ++ INIT_INI_ARRAY(&ah->iniModesRxGain, ++ ar9331_common_rx_gain_1p1, ++ ARRAY_SIZE(ar9331_common_rx_gain_1p1), 2); ++ INIT_INI_ARRAY(&ah->iniModesTxGain, ++ ar9331_modes_lowest_ob_db_tx_gain_1p1, ++ ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p1), ++ 5); ++ ++ /* additional clock settings */ ++ if (ah->is_clk_25mhz) ++ INIT_INI_ARRAY(&ah->iniModesAdditional, ++ ar9331_1p1_xtal_25M, ++ ARRAY_SIZE(ar9331_1p1_xtal_25M), 2); ++ else ++ INIT_INI_ARRAY(&ah->iniModesAdditional, ++ ar9331_1p1_xtal_40M, ++ ARRAY_SIZE(ar9331_1p1_xtal_40M), 2); ++ } else if (AR_SREV_9330_12(ah)) { ++ /* mac */ ++ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); ++ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], ++ ar9331_1p2_mac_core, ++ ARRAY_SIZE(ar9331_1p2_mac_core), 2); ++ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST], ++ ar9331_1p2_mac_postamble, ++ ARRAY_SIZE(ar9331_1p2_mac_postamble), 5); ++ ++ /* bb */ ++ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0); ++ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE], ++ ar9331_1p2_baseband_core, ++ ARRAY_SIZE(ar9331_1p2_baseband_core), 2); ++ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST], ++ ar9331_1p2_baseband_postamble, ++ ARRAY_SIZE(ar9331_1p2_baseband_postamble), 5); ++ ++ /* radio */ ++ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0); ++ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE], ++ ar9331_1p2_radio_core, ++ ARRAY_SIZE(ar9331_1p2_radio_core), 2); ++ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST], NULL, 0, 0); ++ ++ /* soc */ ++ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE], ++ ar9331_1p2_soc_preamble, ++ ARRAY_SIZE(ar9331_1p2_soc_preamble), 2); ++ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0); ++ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST], ++ ar9331_1p2_soc_postamble, ++ ARRAY_SIZE(ar9331_1p2_soc_postamble), 2); ++ ++ /* rx/tx gain */ ++ INIT_INI_ARRAY(&ah->iniModesRxGain, ++ ar9331_common_rx_gain_1p2, ++ ARRAY_SIZE(ar9331_common_rx_gain_1p2), 2); ++ INIT_INI_ARRAY(&ah->iniModesTxGain, ++ ar9331_modes_lowest_ob_db_tx_gain_1p2, ++ ARRAY_SIZE(ar9331_modes_lowest_ob_db_tx_gain_1p2), ++ 5); ++ ++ /* additional clock settings */ ++ if (ah->is_clk_25mhz) ++ INIT_INI_ARRAY(&ah->iniModesAdditional, ++ ar9331_1p2_xtal_25M, ++ ARRAY_SIZE(ar9331_1p2_xtal_25M), 2); ++ else ++ INIT_INI_ARRAY(&ah->iniModesAdditional, ++ ar9331_1p2_xtal_40M, ++ ARRAY_SIZE(ar9331_1p2_xtal_40M), 2); ++ } else if (AR_SREV_9340(ah)) { + /* mac */ + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0); + INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE], +diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c +index 892c48b..48893f1 100644 +--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c ++++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c +@@ -659,6 +659,9 @@ static int ar9003_hw_process_ini(struct ath_hw *ah, + REG_WRITE_ARRAY(&ah->iniModesAdditional, + modesIndex, regWrites); + ++ if (AR_SREV_9300(ah)) ++ REG_WRITE_ARRAY(&ah->iniModesAdditional, 1, regWrites); ++ + if (AR_SREV_9340(ah) && !ah->is_clk_25mhz) + REG_WRITE_ARRAY(&ah->iniModesAdditional_40M, 1, regWrites); + -- cgit v1.2.3