X-Git-Url: https://git.enpas.org/?a=blobdiff_plain;f=target%2Flinux%2Fbrcm63xx%2Fpatches-2.6.32%2F240-spi.patch;h=570c1576157179dd717e93cb69b48b4682e4fb89;hb=98656aad20554a1292832cd5298fdb044c7263e9;hp=f68f25a85ded52309946d748294c40f104a39141;hpb=5689b63c0601fbe461d6099393de6bd79317eee9;p=openwrt.git diff --git a/target/linux/brcm63xx/patches-2.6.32/240-spi.patch b/target/linux/brcm63xx/patches-2.6.32/240-spi.patch index f68f25a85d..570c157615 100644 --- a/target/linux/brcm63xx/patches-2.6.32/240-spi.patch +++ b/target/linux/brcm63xx/patches-2.6.32/240-spi.patch @@ -32,7 +32,7 @@ + * License. See the file "COPYING" in the main directory of this archive + * for more details. + * -+ * Copyright (C) 2009 Florian Fainelli ++ * Copyright (C) 2009 Florian Fainelli + */ + +#include @@ -84,12 +84,29 @@ + + if (BCMCPU_IS_6358()) + spi_pdata.fifo_size = SPI_BCM_6358_SPI_MSG_DATA_SIZE; -+ ++ + return platform_device_register(&bcm63xx_spi_device); +} --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h -@@ -428,6 +428,7 @@ static inline unsigned long bcm63xx_regs +@@ -108,6 +108,7 @@ enum bcm63xx_regs_set { + #define RSET_WDT_SIZE 12 + #define RSET_ENET_SIZE 2048 + #define RSET_ENETDMA_SIZE 2048 ++#define RSET_SPI_SIZE 256 + #define RSET_UART_SIZE 24 + #define RSET_UDC_SIZE 256 + #define RSET_OHCI_SIZE 256 +@@ -209,7 +210,7 @@ enum bcm63xx_regs_set { + #define BCM_6358_WDT_BASE (0xfffe005c) + #define BCM_6358_UART0_BASE (0xfffe0100) + #define BCM_6358_GPIO_BASE (0xfffe0080) +-#define BCM_6358_SPI_BASE (0xdeadbeef) ++#define BCM_6358_SPI_BASE (0xfffe0800) + #define BCM_6358_UDC0_BASE (0xfffe0400) + #define BCM_6358_OHCI0_BASE (0xfffe1400) + #define BCM_6358_OHCI_PRIV_BASE (0xdeadbeef) +@@ -428,6 +429,7 @@ static inline unsigned long bcm63xx_regs */ enum bcm63xx_irq { IRQ_TIMER = 0, @@ -97,7 +114,7 @@ IRQ_UART0, IRQ_DSL, IRQ_UDC0, -@@ -493,6 +494,7 @@ enum bcm63xx_irq { +@@ -493,6 +495,7 @@ enum bcm63xx_irq { * 6348 irqs */ #define BCM_6348_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) @@ -105,7 +122,7 @@ #define BCM_6348_UART0_IRQ (IRQ_INTERNAL_BASE + 2) #define BCM_6348_DSL_IRQ (IRQ_INTERNAL_BASE + 4) #define BCM_6348_UDC0_IRQ (IRQ_INTERNAL_BASE + 6) -@@ -517,6 +519,7 @@ enum bcm63xx_irq { +@@ -517,6 +520,7 @@ enum bcm63xx_irq { * 6358 irqs */ #define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) @@ -488,7 +505,7 @@ + if (is_on == BITBANG_CS_INACTIVE) + val |= SPI_CMD_NOOP; + else if (is_on == BITBANG_CS_ACTIVE) -+ val |= (1 << spi->chip_select << SPI_CMD_DEVICE_ID_SHIFT); ++ val |= (spi->chip_select << SPI_CMD_DEVICE_ID_SHIFT); + + bcm_spi_writew(val, bs->regs, SPI_CMD); +} @@ -597,7 +614,7 @@ + if (bs->tx_ptr) + bcm_spi_writeb(*bs->tx_ptr++, bs->regs, SPI_MSG_DATA); + else -+ bcm_spi_writeb(0, bs->regs, SPI_MSG_DATA); ++ bcm_spi_writeb(0, bs->regs, SPI_MSG_DATA); + bs->remaining_bytes--; + tail = bcm_spi_readb(bs->regs, SPI_MSG_TAIL); + } @@ -631,12 +648,12 @@ + bcm_spi_writeb(msg_ctl, bs->regs, SPI_MSG_CTL); + + /* Issue the transfer */ -+ cmd = bcm_spi_readb(bs->regs, SPI_CMD); ++ cmd = bcm_spi_readw(bs->regs, SPI_CMD); + cmd |= SPI_CMD_START_IMMEDIATE; + cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT); -+ bcm_spi_writeb(cmd, bs->regs, SPI_CMD); ++ bcm_spi_writew(cmd, bs->regs, SPI_CMD); + -+ wait_for_completion(&bs->done); ++ wait_for_completion(&bs->done); + + /* Disable the CMD_DONE interrupt */ + bcm_spi_writeb(~(SPI_INTR_CMD_DONE), bs->regs, SPI_INT_MASK); @@ -644,7 +661,7 @@ + return t->len - bs->remaining_bytes; +} + -+/* This driver supports single master mode only. Hence ++/* This driver supports single master mode only. Hence + * CMD_DONE is the only interrupt we care about + */ +static irqreturn_t bcm63xx_spi_interrupt(int irq, void *dev_id) @@ -679,10 +696,10 @@ + bcm63xx_spi_fill_tx_fifo(bs); + + /* Start the transfer */ -+ cmd = bcm_spi_readb(bs->regs, SPI_CMD); ++ cmd = bcm_spi_readw(bs->regs, SPI_CMD); + cmd |= SPI_CMD_START_IMMEDIATE; + cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT); -+ bcm_spi_writeb(cmd, bs->regs, SPI_CMD); ++ bcm_spi_writew(cmd, bs->regs, SPI_CMD); + } else + complete(&bs->done); + } @@ -908,3 +925,33 @@ +}; + +#endif /* BCM63XX_DEV_SPI_H */ +--- a/arch/mips/bcm63xx/Makefile ++++ b/arch/mips/bcm63xx/Makefile +@@ -1,6 +1,6 @@ + obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o \ + dev-dsp.o dev-enet.o dev-pcmcia.o dev-uart.o dev-wdt.o \ +- dev-usb-ohci.o dev-usb-ehci.o dev-usb-udc.o ++ dev-usb-ohci.o dev-usb-ehci.o dev-usb-udc.o dev-spi.o + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + + obj-y += boards/ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -30,6 +30,7 @@ + #include + #include + #include ++#include + #include + + #define PFX "board_bcm963xx: " +@@ -1509,6 +1510,9 @@ int __init board_register_devices(void) + if (board.has_udc0) + bcm63xx_udc_register(); + ++ if (!BCMCPU_IS_6345()) ++ bcm63xx_spi_register(); ++ + /* Generate MAC address for WLAN and + * register our SPROM */ + #ifdef CONFIG_SSB_PCIHOST