1 From 07741f61fc94fad3c3d21fa1a2ad6f01455cc1dd Mon Sep 17 00:00:00 2001
2 From: John Crispin <blogic@openwrt.org>
3 Date: Fri, 12 Apr 2013 06:27:41 +0000
4 Subject: [PATCH 120/137] DT: MIPS: ralink: add MT7620A dts files
6 Add a dtsi file for MT7620A SoC and a sample dts file.
8 Signed-off-by: John Crispin <blogic@openwrt.org>
9 Acked-by: Grant Likely <grant.likely@secretlab.ca>
10 Patchwork: http://patchwork.linux-mips.org/patch/5190/
12 arch/mips/ralink/Kconfig | 4 +++
13 arch/mips/ralink/dts/Makefile | 1 +
14 arch/mips/ralink/dts/mt7620a.dtsi | 58 +++++++++++++++++++++++++++++++++
15 arch/mips/ralink/dts/mt7620a_eval.dts | 16 +++++++++
16 4 files changed, 79 insertions(+)
17 create mode 100644 arch/mips/ralink/dts/mt7620a.dtsi
18 create mode 100644 arch/mips/ralink/dts/mt7620a_eval.dts
20 --- a/arch/mips/ralink/Kconfig
21 +++ b/arch/mips/ralink/Kconfig
22 @@ -46,6 +46,10 @@ choice
23 bool "RT3883 eval kit"
26 + config DTB_MT7620A_EVAL
27 + bool "MT7620A eval kit"
28 + depends on SOC_MT7620
33 --- a/arch/mips/ralink/dts/Makefile
34 +++ b/arch/mips/ralink/dts/Makefile
36 obj-$(CONFIG_DTB_RT2880_EVAL) := rt2880_eval.dtb.o
37 obj-$(CONFIG_DTB_RT305X_EVAL) := rt3052_eval.dtb.o
38 obj-$(CONFIG_DTB_RT3883_EVAL) := rt3883_eval.dtb.o
39 +obj-$(CONFIG_DTB_MT7620A_EVAL) := mt7620a_eval.dtb.o
41 +++ b/arch/mips/ralink/dts/mt7620a.dtsi
44 + #address-cells = <1>;
46 + compatible = "ralink,mtk7620a-soc";
50 + compatible = "mips,mips24KEc";
54 + cpuintc: cpuintc@0 {
55 + #address-cells = <0>;
56 + #interrupt-cells = <1>;
57 + interrupt-controller;
58 + compatible = "mti,cpu-interrupt-controller";
62 + compatible = "palmbus";
63 + reg = <0x10000000 0x200000>;
64 + ranges = <0x0 0x10000000 0x1FFFFF>;
66 + #address-cells = <1>;
70 + compatible = "ralink,mt7620a-sysc";
75 + compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
76 + reg = <0x200 0x100>;
78 + interrupt-controller;
79 + #interrupt-cells = <1>;
81 + interrupt-parent = <&cpuintc>;
86 + compatible = "ralink,mt7620a-memc", "ralink,rt3050-memc";
87 + reg = <0x300 0x100>;
91 + compatible = "ralink,mt7620a-uart", "ralink,rt2880-uart", "ns16550a";
92 + reg = <0xc00 0x100>;
94 + interrupt-parent = <&intc>;
102 +++ b/arch/mips/ralink/dts/mt7620a_eval.dts
106 +/include/ "mt7620a.dtsi"
109 + compatible = "ralink,mt7620a-eval-board", "ralink,mt7620a-soc";
110 + model = "Ralink MT7620A evaluation board";
113 + reg = <0x0 0x2000000>;
117 + bootargs = "console=ttyS0,57600";