2 * Moschip MCS8140 Ethernet MAC driver
4 * Copyright (C) 2003, Moschip Semiconductors
5 * Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
9 #include <linux/module.h>
10 #include <linux/slab.h>
11 #include <linux/kernel.h>
12 #include <linux/init.h>
13 #include <linux/netdevice.h>
14 #include <linux/etherdevice.h>
15 #include <linux/delay.h>
16 #include <linux/ethtool.h>
17 #include <linux/mii.h>
19 #include <linux/interrupt.h>
20 #include <linux/platform_device.h>
22 #include <linux/irq.h>
23 #include <linux/err.h>
24 #include <linux/phy.h>
25 #include <linux/clk.h>
26 #include <linux/dma-mapping.h>
28 #include <asm/unaligned.h>
29 #include <asm/sizes.h>
31 /* Hardware registers */
32 #define MAC_BASE_ADDR ((priv->mac_base))
34 #define CTRL_REG (MAC_BASE_ADDR)
35 #define MII_BUSY (1 << 0)
36 #define MII_WRITE (1 << 1)
37 #define RX_ENABLE (1 << 2)
38 #define TX_ENABLE (1 << 3)
39 #define DEFER_CHECK (1 << 5)
40 #define STRIP_PAD (1 << 8)
41 #define DRTRY_DISABLE (1 << 10)
42 #define FULL_DUPLEX (1 << 20)
43 #define HBD_DISABLE (1 << 28)
44 #define MAC_ADDR_HIGH_REG (MAC_BASE_ADDR + 0x04)
45 #define MAC_ADDR_LOW_REG (MAC_BASE_ADDR + 0x08)
46 #define MII_ADDR_REG (MAC_BASE_ADDR + 0x14)
47 #define MII_ADDR_SHIFT (11)
48 #define MII_REG_SHIFT (6)
49 #define MII_DATA_REG (MAC_BASE_ADDR + 0x18)
50 /* Link interrupt registers */
51 #define LINK_INT_CSR (MAC_BASE_ADDR + 0xD0)
52 #define LINK_INT_EN (1 << 0)
53 #define LINK_PHY_ADDR_SHIFT (1)
54 #define LINK_PHY_REG_SHIFT (6)
55 #define LINK_BIT_UP_SHIFT (11)
56 #define LINK_UP (1 << 16)
57 #define LINK_INT_POLL_TIME (MAC_BASE_ADDR + 0xD4)
58 #define LINK_POLL_MASK ((1 << 20) - 1)
60 #define DMA_CHAN_WIDTH 32
64 /* Receive DMA registers */
65 #define RX_DMA_BASE ((priv->dma_base) + \
66 (DMA_CHAN_WIDTH * DMA_RX_CHAN))
67 #define RX_BUFFER_ADDR (RX_DMA_BASE + 0x00)
68 #define RX_MAX_BYTES (RX_DMA_BASE + 0x04)
69 #define RX_ACT_BYTES (RX_DMA_BASE + 0x08)
70 #define RX_START_DMA (RX_DMA_BASE + 0x0C)
71 #define RX_DMA_ENABLE (1 << 0)
72 #define RX_DMA_RESET (1 << 1)
73 #define RX_DMA_STATUS_FIFO (1 << 12)
74 #define RX_DMA_ENH (RX_DMA_BASE + 0x14)
75 #define RX_DMA_INT_ENABLE (1 << 1)
77 /* Transmit DMA registers */
78 #define TX_DMA_BASE ((priv->dma_base) + \
79 (DMA_CHAN_WIDTH * DMA_TX_CHAN))
80 #define TX_BUFFER_ADDR (TX_DMA_BASE + 0x00)
81 #define TX_PKT_BYTES (TX_DMA_BASE + 0x04)
82 #define TX_BYTES_SENT (TX_DMA_BASE + 0x08)
83 #define TX_START_DMA (TX_DMA_BASE + 0x0C)
84 #define TX_DMA_ENABLE (1 << 0)
85 #define TX_DMA_START_FRAME (1 << 2)
86 #define TX_DMA_END_FRAME (1 << 3)
87 #define TX_DMA_PAD_DISABLE (1 << 8)
88 #define TX_DMA_CRC_DISABLE (1 << 9)
89 #define TX_DMA_FIFO_FULL (1 << 16)
90 #define TX_DMA_FIFO_EMPTY (1 << 17)
91 #define TX_DMA_STATUS_AVAIL (1 << 18)
92 #define TX_DMA_RESET (1 << 24)
93 #define TX_DMA_STATUS (TX_DMA_BASE + 0x10)
94 #define TX_DMA_ENH (TX_DMA_BASE + 0x14)
95 #define TX_DMA_ENH_ENABLE (1 << 0)
96 #define TX_DMA_INT_FIFO (1 << 1)
98 #define RX_ALLOC_SIZE SZ_2K
99 #define MAX_ETH_FRAME_SIZE 1536
100 #define RX_SKB_TAILROOM 128
101 #define RX_SKB_HEADROOM (RX_ALLOC_SIZE - \
102 (MAX_ETH_FRAME_SIZE + RX_SKB_TAILROOM) + 0)
104 /* WDT Late COL Lenght COL Type */
105 #define ERROR_FILTER_MASK ((1<<14) | (1<<15) | (1<<16) | (1<<17) | (0<<18) | \
106 /* MII Dribbling CRC Len/type Control */\
107 (1<<19) | (1<<20) | (1<<21) | (0<<24) | (1<<25) | \
110 #define TX_RING_SIZE 30
111 #define RX_RING_SIZE 30
113 static inline u32 nuport_mac_readl(void __iomem *reg)
115 return __raw_readl(reg);
118 static inline u8 nuport_mac_readb(void __iomem *reg)
120 return __raw_readb(reg);
123 static inline void nuport_mac_writel(u32 value, void __iomem *reg)
125 __raw_writel(value, reg);
128 static inline void nuport_mac_writeb(u8 value, void __iomem *reg)
130 __raw_writel(value, reg);
133 /* MAC private data */
134 struct nuport_mac_priv {
137 void __iomem *mac_base;
138 void __iomem *dma_base;
143 struct clk *emac_clk;
144 struct clk *ephy_clk;
146 /* Transmit buffers */
147 struct sk_buff *tx_skb[TX_RING_SIZE];
149 unsigned int valid_txskb[TX_RING_SIZE];
152 unsigned int tx_full;
154 /* Receive buffers */
155 struct sk_buff *rx_skb[RX_RING_SIZE];
157 unsigned int irq_rxskb[RX_RING_SIZE];
158 int pkt_len[RX_RING_SIZE];
161 unsigned int rx_full;
163 unsigned int first_pkt;
166 struct napi_struct napi;
167 struct net_device *dev;
168 struct platform_device *pdev;
169 struct mii_bus *mii_bus;
170 struct phy_device *phydev;
174 unsigned int buffer_shifting_len;
177 static inline int nuport_mac_mii_busy_wait(struct nuport_mac_priv *priv)
180 unsigned long finish = jiffies + 3 * HZ;
184 if (!(nuport_mac_readl(MII_ADDR_REG) & MII_BUSY))
187 } while (!time_after_eq(curr, finish));
192 /* Read from PHY registers */
193 static int nuport_mac_mii_read(struct mii_bus *bus,
194 int mii_id, int regnum)
196 struct net_device *dev = bus->priv;
197 struct nuport_mac_priv *priv = netdev_priv(dev);
201 ret = nuport_mac_mii_busy_wait(priv);
205 val |= (mii_id << MII_ADDR_SHIFT) | (regnum << MII_REG_SHIFT) | MII_BUSY;
206 nuport_mac_writel(val, MII_ADDR_REG);
207 ret = nuport_mac_mii_busy_wait(priv);
211 return nuport_mac_readl(MII_DATA_REG);
214 static int nuport_mac_mii_write(struct mii_bus *bus, int mii_id,
215 int regnum, u16 value)
217 struct net_device *dev = bus->priv;
218 struct nuport_mac_priv *priv = netdev_priv(dev);
222 ret = nuport_mac_mii_busy_wait(priv);
226 val |= (mii_id << MII_ADDR_SHIFT) | (regnum << MII_REG_SHIFT);
227 val |= MII_BUSY | MII_WRITE;
228 nuport_mac_writel(value, MII_DATA_REG);
229 nuport_mac_writel(val, MII_ADDR_REG);
231 return nuport_mac_mii_busy_wait(priv);
234 static int nuport_mac_mii_reset(struct mii_bus *bus)
239 static int nuport_mac_start_tx_dma(struct nuport_mac_priv *priv,
243 unsigned int timeout = 2048;
246 reg = nuport_mac_readl(TX_START_DMA);
247 if (!(reg & TX_DMA_ENABLE)) {
248 netdev_dbg(priv->dev, "dma ready\n");
257 priv->tx_addr = dma_map_single(&priv->pdev->dev, skb->data,
258 skb->len, DMA_TO_DEVICE);
259 if (dma_mapping_error(&priv->pdev->dev, priv->tx_addr))
262 /* enable enhanced mode */
263 nuport_mac_writel(TX_DMA_ENH_ENABLE, TX_DMA_ENH);
264 nuport_mac_writel(priv->tx_addr, TX_BUFFER_ADDR);
265 nuport_mac_writel((skb->len) - 1, TX_PKT_BYTES);
267 reg = TX_DMA_ENABLE | TX_DMA_START_FRAME | TX_DMA_END_FRAME;
268 nuport_mac_writel(reg, TX_START_DMA);
273 static void nuport_mac_reset_tx_dma(struct nuport_mac_priv *priv)
277 reg = nuport_mac_readl(TX_START_DMA);
279 nuport_mac_writel(reg, TX_START_DMA);
282 static int nuport_mac_start_rx_dma(struct nuport_mac_priv *priv,
286 unsigned int timeout = 2048;
289 reg = nuport_mac_readl(RX_START_DMA);
290 if (!(reg & RX_DMA_ENABLE)) {
291 netdev_dbg(priv->dev, "dma ready\n");
300 priv->rx_addr = dma_map_single(&priv->pdev->dev, skb->data,
301 RX_ALLOC_SIZE, DMA_FROM_DEVICE);
302 if (dma_mapping_error(&priv->pdev->dev, priv->rx_addr))
305 nuport_mac_writel(priv->rx_addr, RX_BUFFER_ADDR);
307 nuport_mac_writel(RX_DMA_ENABLE, RX_START_DMA);
312 static void nuport_mac_reset_rx_dma(struct nuport_mac_priv *priv)
316 reg = nuport_mac_readl(RX_START_DMA);
318 nuport_mac_writel(reg, RX_START_DMA);
321 /* I suppose this might do something, but I am not sure actually */
322 static void nuport_mac_disable_rx_dma(struct nuport_mac_priv *priv)
326 reg = nuport_mac_readl(RX_DMA_ENH);
327 reg &= ~RX_DMA_INT_ENABLE;
328 nuport_mac_writel(reg, RX_DMA_ENH);
331 static void nuport_mac_enable_rx_dma(struct nuport_mac_priv *priv)
335 reg = nuport_mac_readl(RX_DMA_ENH);
336 reg |= RX_DMA_INT_ENABLE;
337 nuport_mac_writel(reg, RX_DMA_ENH);
340 /* Add packets to the transmit queue */
341 static int nuport_mac_start_xmit(struct sk_buff *skb, struct net_device *dev)
344 struct nuport_mac_priv *priv = netdev_priv(dev);
347 if (netif_queue_stopped(dev)) {
348 netdev_warn(dev, "netif queue was stopped, restarting\n");
349 netif_start_queue(dev);
352 spin_lock_irqsave(&priv->lock, flags);
353 if (priv->first_pkt) {
354 ret = nuport_mac_start_tx_dma(priv, skb);
356 netif_stop_queue(dev);
357 spin_unlock_irqrestore(&priv->lock, flags);
358 netdev_err(dev, "transmit path busy\n");
359 return NETDEV_TX_BUSY;
364 priv->tx_skb[priv->cur_tx] = skb;
365 dev->stats.tx_bytes += skb->len;
366 dev->stats.tx_packets++;
367 priv->valid_txskb[priv->cur_tx] = 1;
369 dev->trans_start = jiffies;
371 if (priv->cur_tx >= TX_RING_SIZE)
374 spin_unlock_irqrestore(&priv->lock, flags);
376 if (priv->valid_txskb[priv->cur_tx]) {
378 netdev_err(dev, "stopping queue\n");
379 netif_stop_queue(dev);
385 static void nuport_mac_adjust_link(struct net_device *dev)
387 struct nuport_mac_priv *priv = netdev_priv(dev);
388 struct phy_device *phydev = priv->phydev;
389 unsigned int status_changed = 0;
394 if (priv->old_link != phydev->link) {
396 priv->old_link = phydev->link;
399 if (phydev->link & (priv->old_duplex != phydev->duplex)) {
400 reg = nuport_mac_readl(CTRL_REG);
401 if (phydev->duplex == DUPLEX_FULL)
405 nuport_mac_writel(reg, CTRL_REG);
408 priv->old_duplex = phydev->duplex;
414 pr_info("%s: link %s", dev->name, phydev->link ?
417 pr_cont(" - %d/%s", phydev->speed,
418 phydev->duplex == DUPLEX_FULL ? "full" : "half");
423 static irqreturn_t nuport_mac_link_interrupt(int irq, void *dev_id)
425 struct net_device *dev = dev_id;
426 struct nuport_mac_priv *priv = netdev_priv(dev);
430 irqreturn_t ret = IRQ_HANDLED;
432 spin_lock_irqsave(&priv->lock, flags);
433 reg = nuport_mac_readl(LINK_INT_CSR);
434 phy_addr = (reg >> LINK_PHY_ADDR_SHIFT) & (PHY_MAX_ADDR - 1);
436 if (phy_addr != priv->phydev->addr) {
437 netdev_err(dev, "spurious PHY irq (phy: %d)\n", phy_addr);
442 priv->phydev->link = (reg & LINK_UP);
443 nuport_mac_adjust_link(dev);
446 spin_unlock_irqrestore(&priv->lock, flags);
450 static irqreturn_t nuport_mac_tx_interrupt(int irq, void *dev_id)
452 struct net_device *dev = (struct net_device *)dev_id;
453 struct nuport_mac_priv *priv = netdev_priv(dev);
459 spin_lock_irqsave(&priv->lock, flags);
460 /* clear status word available if ready */
461 reg = nuport_mac_readl(TX_START_DMA);
462 if (reg & TX_DMA_STATUS_AVAIL) {
463 nuport_mac_writel(reg, TX_START_DMA);
464 reg = nuport_mac_readl(TX_DMA_STATUS);
467 dev->stats.tx_errors++;
469 netdev_dbg(dev, "no status word: %08x\n", reg);
471 skb = priv->tx_skb[priv->dma_tx];
472 priv->tx_skb[priv->dma_tx] = NULL;
473 priv->valid_txskb[priv->dma_tx] = 0;
474 dma_unmap_single(&priv->pdev->dev, priv->rx_addr, skb->len,
476 dev_kfree_skb_irq(skb);
479 if (priv->dma_tx >= TX_RING_SIZE)
482 if (!priv->valid_txskb[priv->dma_tx])
485 ret = nuport_mac_start_tx_dma(priv, priv->tx_skb[priv->dma_tx]);
487 netdev_err(dev, "failed to restart TX dma\n");
491 netdev_dbg(dev, "restarting transmit queue\n");
492 netif_wake_queue(dev);
496 spin_unlock_irqrestore(&priv->lock, flags);
501 static unsigned int nuport_mac_has_work(struct nuport_mac_priv *priv)
505 for (i = 0; i < RX_RING_SIZE; i++)
512 static irqreturn_t nuport_mac_rx_interrupt(int irq, void *dev_id)
514 struct net_device *dev = (struct net_device *)dev_id;
515 struct nuport_mac_priv *priv = netdev_priv(dev);
519 spin_lock_irqsave(&priv->lock, flags);
520 if (!priv->rx_full) {
521 priv->pkt_len[priv->dma_rx] = nuport_mac_readl(RX_ACT_BYTES) - 4;
522 priv->irq_rxskb[priv->dma_rx] = 0;
525 if (priv->dma_rx >= RX_RING_SIZE)
530 if (priv->irq_rxskb[priv->dma_rx] == 1) {
531 ret = nuport_mac_start_rx_dma(priv, priv->rx_skb[priv->dma_rx]);
533 netdev_err(dev, "failed to start rx dma\n");
536 netdev_dbg(dev, "RX ring full\n");
539 if (likely(nuport_mac_has_work(priv))) {
540 /* find a way to disable DMA rx irq */
541 nuport_mac_disable_rx_dma(priv);
542 napi_schedule(&priv->napi);
544 spin_unlock_irqrestore(&priv->lock, flags);
549 /* Process received packets in tasklet */
550 static int nuport_mac_rx(struct net_device *dev, int limit)
552 struct nuport_mac_priv *priv = netdev_priv(dev);
557 while (count < limit && !priv->irq_rxskb[priv->cur_rx]) {
558 skb = priv->rx_skb[priv->cur_rx];
559 len = priv->pkt_len[priv->cur_rx];
561 /* Remove 2 bytes added by RX buffer shifting */
562 len = len - priv->buffer_shifting_len;
563 skb->data = skb->data + priv->buffer_shifting_len;
565 /* Get packet status */
566 status = get_unaligned((u32 *) (skb->data + len));
569 dma_unmap_single(&priv->pdev->dev, priv->rx_addr, skb->len,
572 /* packet filter failed */
573 if (!(status & (1 << 30))) {
574 dev_kfree_skb_irq(skb);
579 if (status & (1 << 31)) {
580 dev->stats.rx_missed_errors++;
581 dev_kfree_skb_irq(skb);
585 /* Not ethernet type */
586 if ((!(status & (1 << 18))) || (status & ERROR_FILTER_MASK))
587 dev->stats.rx_errors++;
589 if (len > MAX_ETH_FRAME_SIZE) {
590 dev_kfree_skb_irq(skb);
595 skb->protocol = eth_type_trans(skb, dev);
596 dev->stats.rx_packets++;
598 if (status & (1 << 29))
599 skb->pkt_type = PACKET_OTHERHOST;
600 if (status & (1 << 27))
601 skb->pkt_type = PACKET_MULTICAST;
602 if (status & (1 << 28))
603 skb->pkt_type = PACKET_BROADCAST;
605 skb->ip_summed = CHECKSUM_UNNECESSARY;
607 /* Pass the received packet to network layer */
608 status = netif_receive_skb(skb);
609 if (status != NET_RX_DROP)
610 dev->stats.rx_bytes += len - 4; /* Without CRC */
612 dev->stats.rx_dropped++;
614 dev->last_rx = jiffies;
617 skb = netdev_alloc_skb(dev, RX_ALLOC_SIZE);
618 skb_reserve(skb, RX_SKB_HEADROOM);
619 priv->rx_skb[priv->cur_rx] = skb;
620 priv->irq_rxskb[priv->cur_rx] = 1;
623 if (priv->cur_rx >= RX_RING_SIZE)
631 static int nuport_mac_poll(struct napi_struct *napi, int budget)
633 struct nuport_mac_priv *priv =
634 container_of(napi, struct nuport_mac_priv, napi);
635 struct net_device *dev = priv->dev;
638 work_done = nuport_mac_rx(dev, budget);
640 if (work_done < budget) {
642 nuport_mac_enable_rx_dma(priv);
648 static void nuport_mac_init_tx_ring(struct nuport_mac_priv *priv)
652 priv->cur_tx = priv->dma_tx = priv->tx_full = 0;
653 for (i = 0; i < TX_RING_SIZE; i++) {
654 priv->tx_skb[i] = NULL;
655 priv->valid_txskb[i] = 0;
660 static int nuport_mac_init_rx_ring(struct net_device *dev)
662 struct nuport_mac_priv *priv = netdev_priv(dev);
666 priv->cur_rx = priv->dma_rx = priv->rx_full = 0;
668 for (i = 0; i < RX_RING_SIZE; i++) {
669 skb = netdev_alloc_skb(dev, RX_ALLOC_SIZE);
672 skb_reserve(skb, RX_SKB_HEADROOM);
673 priv->rx_skb[i] = skb;
674 priv->irq_rxskb[i] = 1;
680 static void nuport_mac_free_rx_ring(struct nuport_mac_priv *priv)
684 for (i = 0; i < RX_RING_SIZE; i++) {
685 if (!priv->rx_skb[i])
688 dev_kfree_skb(priv->rx_skb[i]);
689 priv->rx_skb[i] = NULL;
693 dma_unmap_single(&priv->pdev->dev, priv->rx_addr, RX_ALLOC_SIZE,
697 static void nuport_mac_read_mac_address(struct net_device *dev)
699 struct nuport_mac_priv *priv = netdev_priv(dev);
702 for (i = 0; i < 4; i++)
703 dev->dev_addr[i] = nuport_mac_readb(MAC_ADDR_LOW_REG + i);
704 dev->dev_addr[4] = nuport_mac_readb(MAC_ADDR_HIGH_REG);
705 dev->dev_addr[5] = nuport_mac_readb(MAC_ADDR_HIGH_REG + 1);
707 if (!is_valid_ether_addr(dev->dev_addr)) {
708 dev_info(&priv->pdev->dev, "using random address\n");
709 random_ether_addr(dev->dev_addr);
713 static int nuport_mac_change_mac_address(struct net_device *dev, void *mac_addr)
715 struct sockaddr *addr = mac_addr;
716 struct nuport_mac_priv *priv = netdev_priv(dev);
717 unsigned long *temp = (unsigned long *)dev->dev_addr;
720 if (netif_running(dev))
723 memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN);
725 spin_lock_irq(&priv->lock);
727 nuport_mac_writel(*temp, MAC_ADDR_LOW_REG);
728 temp = (unsigned long *)(dev->dev_addr + 4);
729 nuport_mac_writel(*temp, MAC_ADDR_HIGH_REG);
731 low = nuport_mac_readl(MAC_ADDR_LOW_REG);
732 high = nuport_mac_readl(MAC_ADDR_HIGH_REG);
734 spin_unlock_irq(&priv->lock);
739 static int nuport_mac_open(struct net_device *dev)
742 struct nuport_mac_priv *priv = netdev_priv(dev);
746 ret = clk_enable(priv->emac_clk);
748 netdev_err(dev, "failed to enable EMAC clock\n");
752 /* Set MAC into full duplex mode by default */
753 reg |= RX_ENABLE | TX_ENABLE;
754 reg |= DEFER_CHECK | STRIP_PAD | DRTRY_DISABLE;
755 reg |= FULL_DUPLEX | HBD_DISABLE;
756 nuport_mac_writel(reg, CTRL_REG);
758 /* set mac address in hardware in case it was not already */
759 nuport_mac_change_mac_address(dev, dev->dev_addr);
761 ret = request_irq(priv->link_irq, &nuport_mac_link_interrupt,
764 netdev_err(dev, "unable to request link interrupt\n");
768 ret = request_irq(priv->tx_irq, &nuport_mac_tx_interrupt,
771 netdev_err(dev, "unable to request rx interrupt\n");
775 /* Enable link interrupt monitoring for our PHY address */
776 reg = LINK_INT_EN | (priv->phydev->addr << LINK_PHY_ADDR_SHIFT);
777 /* MII_BMSR register to be watched */
778 reg |= (1 << LINK_PHY_REG_SHIFT);
779 /* BMSR_STATUS to be watched in particular */
780 reg |= (2 << LINK_BIT_UP_SHIFT);
782 spin_lock_irqsave(&priv->lock, flags);
783 nuport_mac_writel(reg, LINK_INT_CSR);
784 nuport_mac_writel(LINK_POLL_MASK, LINK_INT_POLL_TIME);
785 spin_unlock_irqrestore(&priv->lock, flags);
787 phy_start(priv->phydev);
789 napi_enable(&priv->napi);
791 ret = request_irq(priv->rx_irq, &nuport_mac_rx_interrupt,
794 netdev_err(dev, "unable to request tx interrupt\n");
798 netif_start_queue(dev);
800 nuport_mac_init_tx_ring(priv);
802 ret = nuport_mac_init_rx_ring(dev);
804 netdev_err(dev, "rx ring init failed\n");
808 nuport_mac_reset_tx_dma(priv);
809 nuport_mac_reset_rx_dma(priv);
812 spin_lock_irqsave(&priv->lock, flags);
813 ret = nuport_mac_start_rx_dma(priv, priv->rx_skb[0]);
814 spin_unlock_irqrestore(&priv->lock, flags);
819 nuport_mac_free_rx_ring(priv);
820 free_irq(priv->rx_irq, dev);
822 free_irq(priv->tx_irq, dev);
824 free_irq(priv->link_irq, dev);
826 clk_disable(priv->emac_clk);
830 static int nuport_mac_close(struct net_device *dev)
832 struct nuport_mac_priv *priv = netdev_priv(dev);
834 spin_lock_irq(&priv->lock);
835 napi_disable(&priv->napi);
836 netif_stop_queue(dev);
838 free_irq(priv->link_irq, dev);
839 /* disable PHY polling */
840 nuport_mac_writel(0, LINK_INT_CSR);
841 nuport_mac_writel(0, LINK_INT_POLL_TIME);
842 phy_stop(priv->phydev);
844 free_irq(priv->tx_irq, dev);
845 free_irq(priv->rx_irq, dev);
846 spin_unlock_irq(&priv->lock);
848 nuport_mac_free_rx_ring(priv);
850 clk_disable(priv->emac_clk);
855 static void nuport_mac_tx_timeout(struct net_device *dev)
857 struct nuport_mac_priv *priv = netdev_priv(dev);
860 netdev_warn(dev, "transmit timeout, attempting recovery\n");
862 netdev_info(dev, "TX DMA regs\n");
863 for (i = 0; i < DMA_CHAN_WIDTH; i += 4)
864 netdev_info(dev, "[%02x]: 0x%08x\n", i, nuport_mac_readl(TX_DMA_BASE + i));
865 netdev_info(dev, "RX DMA regs\n");
866 for (i = 0; i < DMA_CHAN_WIDTH; i += 4)
867 netdev_info(dev, "[%02x]: 0x%08x\n", i, nuport_mac_readl(RX_DMA_BASE + i));
869 nuport_mac_init_tx_ring(priv);
870 nuport_mac_reset_tx_dma(priv);
872 netif_wake_queue(dev);
875 static int nuport_mac_mii_probe(struct net_device *dev)
877 struct nuport_mac_priv *priv = netdev_priv(dev);
878 struct phy_device *phydev = NULL;
881 ret = clk_enable(priv->ephy_clk);
883 netdev_err(dev, "unable to enable ePHY clk\n");
887 phydev = phy_find_first(priv->mii_bus);
889 netdev_err(dev, "no PHYs found\n");
894 phydev = phy_connect(dev, dev_name(&phydev->dev),
895 nuport_mac_adjust_link, 0,
896 PHY_INTERFACE_MODE_MII);
897 if (IS_ERR(phydev)) {
898 netdev_err(dev, "could not attach PHY\n");
899 ret = PTR_ERR(phydev);
903 phydev->supported &= PHY_BASIC_FEATURES;
904 phydev->advertising = phydev->supported;
905 priv->phydev = phydev;
907 priv->old_duplex = DUPLEX_FULL;
909 dev_info(&priv->pdev->dev, "attached PHY driver [%s] "
910 "(mii_bus:phy_addr=%d)\n",
911 phydev->drv->name, phydev->addr);
916 /* disable the Ethernet PHY clock for the moment */
917 clk_disable(priv->ephy_clk);
922 static void nuport_mac_ethtool_drvinfo(struct net_device *dev,
923 struct ethtool_drvinfo *info)
925 strncpy(info->driver, "nuport-mac", sizeof(info->driver));
926 strncpy(info->version, "0.1", sizeof(info->version));
927 strncpy(info->fw_version, "N/A", sizeof(info->fw_version));
928 strncpy(info->bus_info, "internal", sizeof(info->bus_info));
930 info->testinfo_len = 0;
931 info->regdump_len = 0;
932 info->eedump_len = 0;
935 static int nuport_mac_ethtool_get_settings(struct net_device *dev,
936 struct ethtool_cmd *cmd)
938 struct nuport_mac_priv *priv = netdev_priv(dev);
941 return phy_ethtool_gset(priv->phydev, cmd);
946 static int nuport_mac_ethtool_set_settings(struct net_device *dev,
947 struct ethtool_cmd *cmd)
949 struct nuport_mac_priv *priv = netdev_priv(dev);
952 return phy_ethtool_sset(priv->phydev, cmd);
957 static void nuport_mac_set_msglevel(struct net_device *dev, u32 msg_level)
959 struct nuport_mac_priv *priv = netdev_priv(dev);
961 priv->msg_level = msg_level;
964 static u32 nuport_mac_get_msglevel(struct net_device *dev)
966 struct nuport_mac_priv *priv = netdev_priv(dev);
968 return priv->msg_level;
971 static const struct ethtool_ops nuport_mac_ethtool_ops = {
972 .get_drvinfo = nuport_mac_ethtool_drvinfo,
973 .get_link = ethtool_op_get_link,
974 .get_settings = nuport_mac_ethtool_get_settings,
975 .set_settings = nuport_mac_ethtool_set_settings,
976 .set_msglevel = nuport_mac_set_msglevel,
977 .get_msglevel = nuport_mac_get_msglevel,
980 static const struct net_device_ops nuport_mac_ops = {
981 .ndo_open = nuport_mac_open,
982 .ndo_stop = nuport_mac_close,
983 .ndo_start_xmit = nuport_mac_start_xmit,
984 .ndo_change_mtu = eth_change_mtu,
985 .ndo_validate_addr = eth_validate_addr,
986 .ndo_set_mac_address = nuport_mac_change_mac_address,
987 .ndo_tx_timeout = nuport_mac_tx_timeout,
990 static int __init nuport_mac_probe(struct platform_device *pdev)
992 struct net_device *dev;
993 struct nuport_mac_priv *priv = NULL;
994 struct resource *regs, *dma;
996 int rx_irq, tx_irq, link_irq;
998 const unsigned int *intspec;
1000 dev = alloc_etherdev(sizeof(struct nuport_mac_priv));
1002 dev_err(&pdev->dev, "no memory for net_device\n");
1006 regs = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1007 dma = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1008 if (!regs || !dma) {
1009 dev_err(&pdev->dev, "failed to get regs resources\n");
1014 rx_irq = platform_get_irq(pdev, 0);
1015 tx_irq = platform_get_irq(pdev, 1);
1016 link_irq = platform_get_irq(pdev, 2);
1017 if (rx_irq < 0 || tx_irq < 0 || link_irq < 0) {
1022 platform_set_drvdata(pdev, dev);
1023 SET_NETDEV_DEV(dev, &pdev->dev);
1024 priv = netdev_priv(dev);
1027 spin_lock_init(&priv->lock);
1029 intspec = of_get_property(pdev->dev.of_node,
1030 "nuport-mac,buffer-shifting", NULL);
1032 priv->buffer_shifting_len = 0;
1034 priv->buffer_shifting_len = 2;
1036 priv->mac_base = devm_ioremap(&pdev->dev,
1037 regs->start, resource_size(regs));
1038 if (!priv->mac_base) {
1039 dev_err(&pdev->dev, "failed to remap regs\n");
1044 priv->dma_base = devm_ioremap(&pdev->dev,
1045 dma->start, resource_size(dma));
1046 if (!priv->dma_base) {
1047 dev_err(&pdev->dev, "failed to remap dma-regs\n");
1052 priv->emac_clk = clk_get(&pdev->dev, "emac");
1053 if (IS_ERR_OR_NULL(priv->emac_clk)) {
1054 dev_err(&pdev->dev, "failed to get emac clk\n");
1055 ret = PTR_ERR(priv->emac_clk);
1059 priv->ephy_clk = clk_get(&pdev->dev, "ephy");
1060 if (IS_ERR_OR_NULL(priv->ephy_clk)) {
1061 dev_err(&pdev->dev, "failed to get ephy clk\n");
1062 ret = PTR_ERR(priv->ephy_clk);
1066 priv->link_irq = link_irq;
1067 priv->rx_irq = rx_irq;
1068 priv->tx_irq = tx_irq;
1069 priv->msg_level = NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK;
1070 dev->netdev_ops = &nuport_mac_ops;
1071 dev->ethtool_ops = &nuport_mac_ethtool_ops;
1072 dev->watchdog_timeo = HZ;
1073 dev->flags = IFF_BROADCAST; /* Supports Broadcast */
1074 dev->tx_queue_len = TX_RING_SIZE / 2;
1076 netif_napi_add(dev, &priv->napi, nuport_mac_poll, 64);
1078 priv->mii_bus = mdiobus_alloc();
1079 if (!priv->mii_bus) {
1080 dev_err(&pdev->dev, "mii bus allocation failed\n");
1084 priv->mii_bus->priv = dev;
1085 priv->mii_bus->read = nuport_mac_mii_read;
1086 priv->mii_bus->write = nuport_mac_mii_write;
1087 priv->mii_bus->reset = nuport_mac_mii_reset;
1088 priv->mii_bus->name = "nuport-mac-mii";
1089 priv->mii_bus->phy_mask = (1 << 0);
1090 snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s", pdev->name);
1091 priv->mii_bus->irq = kzalloc(PHY_MAX_ADDR * sizeof(int), GFP_KERNEL);
1092 if (!priv->mii_bus->irq) {
1093 dev_err(&pdev->dev, "failed to allocate mii_bus irqs\n");
1098 /* We support PHY interrupts routed back to the MAC */
1099 for (i = 0; i < PHY_MAX_ADDR; i++)
1100 priv->mii_bus->irq[i] = PHY_IGNORE_INTERRUPT;
1102 ret = mdiobus_register(priv->mii_bus);
1104 dev_err(&pdev->dev, "failed to register mii_bus\n");
1108 ret = nuport_mac_mii_probe(dev);
1110 dev_err(&pdev->dev, "failed to probe MII bus\n");
1111 goto out_mdio_unregister;
1114 ret = register_netdev(dev);
1116 dev_err(&pdev->dev, "failed to register net_device\n");
1117 goto out_mdio_probe;
1120 /* read existing mac address */
1121 nuport_mac_read_mac_address(dev);
1123 dev_info(&pdev->dev, "registered (MAC: %pM)\n", dev->dev_addr);
1128 phy_disconnect(priv->phydev);
1129 out_mdio_unregister:
1130 mdiobus_unregister(priv->mii_bus);
1132 kfree(priv->mii_bus->irq);
1134 mdiobus_free(priv->mii_bus);
1136 platform_set_drvdata(pdev, NULL);
1138 clk_put(priv->ephy_clk);
1139 clk_put(priv->emac_clk);
1141 platform_set_drvdata(pdev, NULL);
1145 static int nuport_mac_remove(struct platform_device *pdev)
1147 struct net_device *dev = platform_get_drvdata(pdev);
1148 struct nuport_mac_priv *priv = netdev_priv(dev);
1150 unregister_netdev(dev);
1151 phy_disconnect(priv->phydev);
1152 mdiobus_unregister(priv->mii_bus);
1153 kfree(priv->mii_bus->irq);
1154 mdiobus_free(priv->mii_bus);
1155 clk_put(priv->ephy_clk);
1156 clk_put(priv->emac_clk);
1159 platform_set_drvdata(pdev, NULL);
1164 static struct of_device_id nuport_eth_ids[] __initdata = {
1165 {.compatible = "moschip,nuport-mac",},
1169 static struct platform_driver nuport_eth_driver = {
1171 .name = "nuport-mac",
1172 .owner = THIS_MODULE,
1173 .of_match_table = nuport_eth_ids,
1175 .probe = nuport_mac_probe,
1176 .remove = __devexit_p(nuport_mac_remove),
1179 module_platform_driver(nuport_eth_driver);
1181 MODULE_AUTHOR("Moschip Semiconductors Ltd.");
1182 MODULE_DESCRIPTION("Moschip MCS8140 Ethernet MAC driver");
1183 MODULE_LICENSE("GPL");