1 From fb143ba7f7cd215bc2fc34a478c4c0b6dc56e537 Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Mon, 6 Jan 2014 14:51:59 +0100
4 Subject: [PATCH] MIPS: BCM47XX: fix position of cpu_wait disabling
6 The disabling of cpu_wait was done too early, before the detection was
7 done. This moves the code to a position where it actually works.
9 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
10 Acked-by: Rafa? Mi?ecki <zajec5@gmail.com>
12 arch/mips/bcm47xx/setup.c | 34 +++++++++++++++++++++++++---------
13 1 file changed, 25 insertions(+), 9 deletions(-)
15 --- a/arch/mips/bcm47xx/setup.c
16 +++ b/arch/mips/bcm47xx/setup.c
19 #include <asm/reboot.h>
21 +#include <asm/idle.h>
23 #include <bcm47xx_nvram.h>
24 #include <bcm47xx_board.h>
25 @@ -229,6 +230,31 @@ void __init plat_mem_setup(void)
26 mips_set_machine_name(bcm47xx_board_get_name());
29 +static int __init bcm47xx_cpu_fixes(void)
31 + switch (bcm47xx_bus_type) {
32 +#ifdef CONFIG_BCM47XX_SSB
33 + case BCM47XX_BUS_TYPE_SSB:
37 +#ifdef CONFIG_BCM47XX_BCMA
38 + case BCM47XX_BUS_TYPE_BCMA:
39 + /* The BCM4706 has a problem with the CPU wait instruction.
40 + * When r4k_wait or r4k_wait_irqoff is used will just hang and
41 + * not return from a msleep(). Removing the cpu_wait
42 + * functionality is a workaround for this problem. The BCM4716
43 + * does not have this problem.
45 + if (bcm47xx_bus.bcma.bus.chipinfo.id == BCMA_CHIP_ID_BCM4706)
52 +arch_initcall(bcm47xx_cpu_fixes);
54 static int __init bcm47xx_register_bus_complete(void)
56 switch (bcm47xx_bus_type) {