1 diff -urN linux-2.4.32/arch/mips/ar531x/ar531xdbg_io.c linux-2.4.32.new/arch/mips/ar531x/ar531xdbg_io.c
\r
2 --- linux-2.4.32/arch/mips/ar531x/ar531xdbg_io.c 1970-01-01 01:00:00.000000000 +0100
\r
3 +++ linux-2.4.32.new/arch/mips/ar531x/ar531xdbg_io.c 2005-12-24 20:29:42.102311328 +0000
\r
6 + * This file is subject to the terms and conditions of the GNU General Public
\r
7 + * License. See the file "COPYING" in the main directory of this archive
\r
8 + * for more details.
\r
10 + * Copyright MontaVista Software Inc
\r
11 + * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.
\r
15 + * Basic support for polled character input/output
\r
16 + * using the AR531X's serial port.
\r
19 +#include <linux/config.h>
\r
20 +#include <linux/init.h>
\r
21 +#include <linux/delay.h>
\r
22 +#include <linux/irq.h>
\r
23 +#include <linux/interrupt.h>
\r
24 +#include <linux/serial.h>
\r
25 +#include <linux/types.h>
\r
26 +#include <linux/string.h>
\r
28 +#include <asm/reboot.h>
\r
29 +#include <asm/io.h>
\r
30 +#include <asm/time.h>
\r
31 +#include <asm/pgtable.h>
\r
32 +#include <asm/processor.h>
\r
33 +#include <asm/reboot.h>
\r
34 +#include <asm/system.h>
\r
35 +#include <asm/serial.h>
\r
36 +#include <asm/gdb-stub.h>
\r
38 +#include "ar531xlnx.h"
\r
40 +#if CONFIG_EARLY_PRINTK_HACK || CONFIG_KGDB
\r
41 +/* base addr of uart and clock timing */
\r
42 +#define BASE 0xbc000003
\r
44 +/* distance in bytes between two serial registers */
\r
45 +#define REG_OFFSET 4
\r
48 + * 0 - we need to do serial init
\r
49 + * 1 - skip serial init
\r
51 +static int serialPortInitialized = 0;
\r
54 + * * the default baud rate *if* we do serial init
\r
56 +#define BAUD_DEFAULT UART16550_BAUD_9600
\r
58 +/* === END OF CONFIG === */
\r
60 +#define UART16550_BAUD_2400 2400
\r
61 +#define UART16550_BAUD_4800 4800
\r
62 +#define UART16550_BAUD_9600 9600
\r
63 +#define UART16550_BAUD_19200 19200
\r
64 +#define UART16550_BAUD_38400 38400
\r
65 +#define UART16550_BAUD_57600 57600
\r
66 +#define UART16550_BAUD_115200 115200
\r
68 +#define UART16550_PARITY_NONE 0
\r
69 +#define UART16550_PARITY_ODD 0x08
\r
70 +#define UART16550_PARITY_EVEN 0x18
\r
71 +#define UART16550_PARITY_MARK 0x28
\r
72 +#define UART16550_PARITY_SPACE 0x38
\r
74 +#define UART16550_DATA_5BIT 0x0
\r
75 +#define UART16550_DATA_6BIT 0x1
\r
76 +#define UART16550_DATA_7BIT 0x2
\r
77 +#define UART16550_DATA_8BIT 0x3
\r
79 +#define UART16550_STOP_1BIT 0x0
\r
80 +#define UART16550_STOP_2BIT 0x4
\r
82 +/* register offset */
\r
83 +#define OFS_RCV_BUFFER (0*REG_OFFSET)
\r
84 +#define OFS_TRANS_HOLD (0*REG_OFFSET)
\r
85 +#define OFS_SEND_BUFFER (0*REG_OFFSET)
\r
86 +#define OFS_INTR_ENABLE (1*REG_OFFSET)
\r
87 +#define OFS_INTR_ID (2*REG_OFFSET)
\r
88 +#define OFS_DATA_FORMAT (3*REG_OFFSET)
\r
89 +#define OFS_LINE_CONTROL (3*REG_OFFSET)
\r
90 +#define OFS_MODEM_CONTROL (4*REG_OFFSET)
\r
91 +#define OFS_RS232_OUTPUT (4*REG_OFFSET)
\r
92 +#define OFS_LINE_STATUS (5*REG_OFFSET)
\r
93 +#define OFS_MODEM_STATUS (6*REG_OFFSET)
\r
94 +#define OFS_RS232_INPUT (6*REG_OFFSET)
\r
95 +#define OFS_SCRATCH_PAD (7*REG_OFFSET)
\r
97 +#define OFS_DIVISOR_LSB (0*REG_OFFSET)
\r
98 +#define OFS_DIVISOR_MSB (1*REG_OFFSET)
\r
101 +/* memory-mapped read/write of the port */
\r
102 +#define UART16550_READ(y) (*((volatile u8*)(BASE + y)))
\r
103 +#define UART16550_WRITE(y, z) ((*((volatile u8*)(BASE + y))) = z)
\r
106 +debugPortInit(u32 baud, u8 data, u8 parity, u8 stop)
\r
108 + /* Pull UART out of reset */
\r
109 + sysRegWrite(AR531X_RESET,
\r
110 + sysRegRead(AR531X_RESET) & ~(AR531X_RESET_UART0));
\r
112 + /* disable interrupts */
\r
113 + UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
\r
114 + UART16550_WRITE(OFS_INTR_ENABLE, 0);
\r
116 + /* set up buad rate */
\r
119 + u32 uart_clock_rate = ar531x_cpu_frequency() / 4;
\r
120 + u32 base_baud = uart_clock_rate / 16;
\r
122 + /* set DIAB bit */
\r
123 + UART16550_WRITE(OFS_LINE_CONTROL, 0x80);
\r
125 + /* set divisor */
\r
126 + divisor = base_baud / baud;
\r
127 + UART16550_WRITE(OFS_DIVISOR_LSB, divisor & 0xff);
\r
128 + UART16550_WRITE(OFS_DIVISOR_MSB, (divisor & 0xff00)>>8);
\r
130 + /* clear DIAB bit */
\r
131 + UART16550_WRITE(OFS_LINE_CONTROL, 0x0);
\r
134 + /* set data format */
\r
135 + UART16550_WRITE(OFS_DATA_FORMAT, data | parity | stop);
\r
139 +getDebugChar(void)
\r
141 + if (!serialPortInitialized) {
\r
142 + serialPortInitialized = 1;
\r
143 + debugPortInit(BAUD_DEFAULT,
\r
144 + UART16550_DATA_8BIT,
\r
145 + UART16550_PARITY_NONE, UART16550_STOP_1BIT);
\r
148 + while((UART16550_READ(OFS_LINE_STATUS) & 0x1) == 0);
\r
149 + return UART16550_READ(OFS_RCV_BUFFER);
\r
154 + * Peek at the most recently received character.
\r
155 + * Don't wait for a new character to be received.
\r
158 +peekDebugChar(void)
\r
160 + return UART16550_READ(OFS_RCV_BUFFER);
\r
163 +static int kgdbInitialized = 0;
\r
168 + sysRegWrite(AR531X_WD_CTRL, AR531X_WD_CTRL_IGNORE_EXPIRATION);
\r
170 + if (!kgdbInitialized) {
\r
171 + printk("Setting debug traps - please connect the remote debugger.\n");
\r
172 + set_debug_traps();
\r
173 + kgdbInitialized = 1;
\r
181 + return kgdbInitialized;
\r
184 +#define DEBUG_CHAR '\001';
\r
187 +kgdbInterrupt(void)
\r
189 + if (!kgdbInitialized) {
\r
194 + * Try to avoid swallowing too much input: Only consume
\r
195 + * a character if nothing new has arrived. Yes, there's
\r
196 + * still a small hole here, and we may lose an input
\r
197 + * character now and then.
\r
199 + if (UART16550_READ(OFS_LINE_STATUS) & 1) {
\r
202 + return UART16550_READ(OFS_RCV_BUFFER) == DEBUG_CHAR;
\r
209 +putDebugChar(char byte)
\r
211 + if (!serialPortInitialized) {
\r
212 + serialPortInitialized = 1;
\r
213 + debugPortInit(BAUD_DEFAULT,
\r
214 + UART16550_DATA_8BIT,
\r
215 + UART16550_PARITY_NONE, UART16550_STOP_1BIT);
\r
218 + while ((UART16550_READ(OFS_LINE_STATUS) &0x20) == 0);
\r
219 + UART16550_WRITE(OFS_SEND_BUFFER, byte);
\r
221 +#endif /* CONFIG_EARLY_PRINTK_HACK || CONFIG_KGDB */
\r
222 diff -urN linux-2.4.32/arch/mips/ar531x/ar531xgpio.c linux-2.4.32.new/arch/mips/ar531x/ar531xgpio.c
\r
223 --- linux-2.4.32/arch/mips/ar531x/ar531xgpio.c 1970-01-01 01:00:00.000000000 +0100
\r
224 +++ linux-2.4.32.new/arch/mips/ar531x/ar531xgpio.c 2005-12-24 20:29:42.102311328 +0000
\r
227 + * This file is subject to the terms and conditions of the GNU General Public
\r
228 + * License. See the file "COPYING" in the main directory of this archive
\r
229 + * for more details.
\r
231 + * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.
\r
235 + * Support for GPIO -- General Purpose Input/Output Pins
\r
238 +#include <linux/config.h>
\r
239 +#include <linux/kernel.h>
\r
240 +#include <linux/signal.h>
\r
241 +#include <linux/interrupt.h>
\r
242 +#include <linux/irq.h>
\r
244 +#include "ar531xlnx.h"
\r
246 +/* GPIO Interrupt Support */
\r
248 +/* Turn on the specified AR531X_GPIO_IRQ interrupt */
\r
249 +static unsigned int
\r
250 +ar531x_gpio_intr_startup(unsigned int irq)
\r
252 + ar531x_gpio_intr_enable(irq);
\r
256 +/* Turn off the specified AR531X_GPIO_IRQ interrupt */
\r
258 +ar531x_gpio_intr_shutdown(unsigned int irq)
\r
260 + ar531x_gpio_intr_disable(irq);
\r
263 +u32 gpioIntMask = 0;
\r
265 +/* Enable the specified AR531X_GPIO_IRQ interrupt */
\r
267 +ar531x_gpio_intr_enable(unsigned int irq)
\r
272 + gpio = irq - AR531X_GPIO_IRQ_BASE;
\r
273 + gpioIntMask |= gpio;
\r
275 + reg = sysRegRead(AR531X_GPIO_CR);
\r
276 + reg &= ~(GPIO_CR_M(gpio) | GPIO_CR_UART(gpio) | GPIO_CR_INT(gpio));
\r
277 + reg |= GPIO_CR_I(gpio);
\r
278 + reg |= GPIO_CR_INT(gpio);
\r
280 + sysRegWrite(AR531X_GPIO_CR, reg);
\r
281 + (void)sysRegRead(AR531X_GPIO_CR); /* flush to hardware */
\r
284 +/* Disable the specified AR531X_GPIO_IRQ interrupt */
\r
286 +ar531x_gpio_intr_disable(unsigned int irq)
\r
291 + gpio = irq - AR531X_GPIO_IRQ_BASE;
\r
293 + reg = sysRegRead(AR531X_GPIO_CR);
\r
294 + reg &= ~(GPIO_CR_M(gpio) | GPIO_CR_UART(gpio) | GPIO_CR_INT(gpio));
\r
295 + reg |= GPIO_CR_I(gpio);
\r
296 + /* No GPIO_CR_INT bit */
\r
298 + sysRegWrite(AR531X_GPIO_CR, reg);
\r
299 + (void)sysRegRead(AR531X_GPIO_CR); /* flush to hardware */
\r
301 + gpioIntMask &= ~gpio;
\r
305 +ar531x_gpio_intr_ack(unsigned int irq)
\r
307 + ar531x_gpio_intr_disable(irq);
\r
311 +ar531x_gpio_intr_end(unsigned int irq)
\r
313 + if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
\r
314 + ar531x_gpio_intr_enable(irq);
\r
318 +ar531x_gpio_intr_set_affinity(unsigned int irq, unsigned long mask)
\r
320 + /* Only 1 CPU; ignore affinity request */
\r
323 +int ar531x_gpio_irq_base;
\r
325 +struct hw_interrupt_type ar531x_gpio_intr_controller = {
\r
327 + ar531x_gpio_intr_startup,
\r
328 + ar531x_gpio_intr_shutdown,
\r
329 + ar531x_gpio_intr_enable,
\r
330 + ar531x_gpio_intr_disable,
\r
331 + ar531x_gpio_intr_ack,
\r
332 + ar531x_gpio_intr_end,
\r
333 + ar531x_gpio_intr_set_affinity,
\r
337 +ar531x_gpio_intr_init(int irq_base)
\r
341 + for (i = irq_base; i < irq_base + AR531X_GPIO_IRQ_COUNT; i++) {
\r
342 + irq_desc[i].status = IRQ_DISABLED;
\r
343 + irq_desc[i].action = NULL;
\r
344 + irq_desc[i].depth = 1;
\r
345 + irq_desc[i].handler = &ar531x_gpio_intr_controller;
\r
348 + ar531x_gpio_irq_base = irq_base;
\r
353 +spurious_gpio_handler(int cpl, void *dev_id, struct pt_regs *regs)
\r
357 + gpioDataIn = sysRegRead(AR531X_GPIO_DI) & gpioIntMask;
\r
359 + printk("spurious_gpio_handler: 0x%x di=0x%8.8x gpioIntMask=0x%8.8x\n",
\r
360 + cpl, gpioDataIn, gpioIntMask);
\r
363 +struct irqaction spurious_gpio =
\r
364 + {spurious_gpio_handler, SA_INTERRUPT, 0, "spurious_gpio",
\r
367 diff -urN linux-2.4.32/arch/mips/ar531x/ar531x.h linux-2.4.32.new/arch/mips/ar531x/ar531x.h
\r
368 --- linux-2.4.32/arch/mips/ar531x/ar531x.h 1970-01-01 01:00:00.000000000 +0100
\r
369 +++ linux-2.4.32.new/arch/mips/ar531x/ar531x.h 2005-12-24 20:29:42.102311328 +0000
\r
372 + * This file is subject to the terms and conditions of the GNU General Public
\r
373 + * License. See the file "COPYING" in the main directory of this archive
\r
374 + * for more details.
\r
376 + * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.
\r
380 +#define AR531X_H 1
\r
382 +#include <asm/addrspace.h>
\r
385 +#define AR531X_WLAN0 0x18000000
\r
386 +#define AR531X_WLAN1 0x18500000
\r
387 +#define AR531X_ENET0 0x18100000
\r
388 +#define AR531X_ENET1 0x18200000
\r
389 +#define AR531X_SDRAMCTL 0x18300000
\r
390 +#define AR531X_FLASHCTL 0x18400000
\r
391 +#define AR531X_APBBASE 0x1c000000
\r
392 +#define AR531X_FLASH 0x1e000000
\r
395 + * AR531X_NUM_ENET_MAC defines the number of ethernet MACs that
\r
396 + * should be considered available. The AR5312 supports 2 enet MACS,
\r
397 + * even though many reference boards only actually use 1 of them
\r
398 + * (i.e. Only MAC 0 is actually connected to an enet PHY or PHY switch.
\r
399 + * The AR2312 supports 1 enet MAC.
\r
401 +#define AR531X_NUM_ENET_MAC 2
\r
404 + * Need these defines to determine true number of ethernet MACs
\r
406 +#define AR5212_AR5312_REV2 0x0052 /* AR5312 WMAC (AP31) */
\r
407 +#define AR5212_AR5312_REV7 0x0057 /* AR5312 WMAC (AP30-040) */
\r
408 +#define AR5212_AR2313_REV8 0x0058 /* AR2313 WMAC (AP43-030) */
\r
409 +#define AR531X_RADIO_MASK_OFF 0xc8
\r
410 +#define AR531X_RADIO0_MASK 0x0003
\r
411 +#define AR531X_RADIO1_MASK 0x000c
\r
412 +#define AR531X_RADIO1_S 2
\r
415 + * AR531X_NUM_WMAC defines the number of Wireless MACs that\
\r
416 + * should be considered available.
\r
418 +#define AR531X_NUM_WMAC 2
\r
420 +/* Reset/Timer Block Address Map */
\r
421 +#define AR531X_RESETTMR (AR531X_APBBASE + 0x3000)
\r
422 +#define AR531X_TIMER (AR531X_RESETTMR + 0x0000) /* countdown timer */
\r
423 +#define AR531X_WD_CTRL (AR531X_RESETTMR + 0x0008) /* watchdog cntrl */
\r
424 +#define AR531X_WD_TIMER (AR531X_RESETTMR + 0x000c) /* watchdog timer */
\r
425 +#define AR531X_ISR (AR531X_RESETTMR + 0x0010) /* Intr Status Reg */
\r
426 +#define AR531X_IMR (AR531X_RESETTMR + 0x0014) /* Intr Mask Reg */
\r
427 +#define AR531X_RESET (AR531X_RESETTMR + 0x0020)
\r
428 +#define AR5312_CLOCKCTL1 (AR531X_RESETTMR + 0x0064)
\r
429 +#define AR5312_SCRATCH (AR531X_RESETTMR + 0x006c)
\r
430 +#define AR531X_PROCADDR (AR531X_RESETTMR + 0x0070)
\r
431 +#define AR531X_PROC1 (AR531X_RESETTMR + 0x0074)
\r
432 +#define AR531X_DMAADDR (AR531X_RESETTMR + 0x0078)
\r
433 +#define AR531X_DMA1 (AR531X_RESETTMR + 0x007c)
\r
434 +#define AR531X_ENABLE (AR531X_RESETTMR + 0x0080) /* interface enb */
\r
435 +#define AR531X_REV (AR531X_RESETTMR + 0x0090) /* revision */
\r
437 +/* AR531X_WD_CTRL register bit field definitions */
\r
438 +#define AR531X_WD_CTRL_IGNORE_EXPIRATION 0x0000
\r
439 +#define AR531X_WD_CTRL_NMI 0x0001
\r
440 +#define AR531X_WD_CTRL_RESET 0x0002
\r
442 +/* AR531X_ISR register bit field definitions */
\r
443 +#define AR531X_ISR_NONE 0x0000
\r
444 +#define AR531X_ISR_TIMER 0x0001
\r
445 +#define AR531X_ISR_AHBPROC 0x0002
\r
446 +#define AR531X_ISR_AHBDMA 0x0004
\r
447 +#define AR531X_ISR_GPIO 0x0008
\r
448 +#define AR531X_ISR_UART0 0x0010
\r
449 +#define AR531X_ISR_UART0DMA 0x0020
\r
450 +#define AR531X_ISR_WD 0x0040
\r
451 +#define AR531X_ISR_LOCAL 0x0080
\r
453 +/* AR531X_RESET register bit field definitions */
\r
454 +#define AR531X_RESET_SYSTEM 0x00000001 /* cold reset full system */
\r
455 +#define AR531X_RESET_PROC 0x00000002 /* cold reset MIPS core */
\r
456 +#define AR531X_RESET_WLAN0 0x00000004 /* cold reset WLAN MAC and BB */
\r
457 +#define AR531X_RESET_EPHY0 0x00000008 /* cold reset ENET0 phy */
\r
458 +#define AR531X_RESET_EPHY1 0x00000010 /* cold reset ENET1 phy */
\r
459 +#define AR531X_RESET_ENET0 0x00000020 /* cold reset ENET0 mac */
\r
460 +#define AR531X_RESET_ENET1 0x00000040 /* cold reset ENET1 mac */
\r
461 +#define AR531X_RESET_UART0 0x00000100 /* cold reset UART0 (high speed) */
\r
462 +#define AR531X_RESET_WLAN1 0x00000200 /* cold reset WLAN MAC/BB */
\r
463 +#define AR531X_RESET_APB 0x00000400 /* cold reset APB (ar5312) */
\r
464 +#define AR531X_RESET_WARM_PROC 0x00001000 /* warm reset MIPS core */
\r
465 +#define AR531X_RESET_WARM_WLAN0_MAC 0x00002000 /* warm reset WLAN0 MAC */
\r
466 +#define AR531X_RESET_WARM_WLAN0_BB 0x00004000 /* warm reset WLAN0 BaseBand */
\r
467 +#define AR531X_RESET_NMI 0x00010000 /* send an NMI to the processor */
\r
468 +#define AR531X_RESET_WARM_WLAN1_MAC 0x00020000 /* warm reset WLAN1 mac */
\r
469 +#define AR531X_RESET_WARM_WLAN1_BB 0x00040000 /* warm reset WLAN1 baseband */
\r
470 +#define AR531X_RESET_LOCAL_BUS 0x00080000 /* reset local bus */
\r
471 +#define AR531X_RESET_WDOG 0x00100000 /* last reset was a watchdog */
\r
473 +#define AR531X_RESET_WMAC0_BITS \
\r
474 + AR531X_RESET_WLAN0 |\
\r
475 + AR531X_RESET_WARM_WLAN0_MAC |\
\r
476 + AR531X_RESET_WARM_WLAN0_BB
\r
478 +#define AR531X_RESERT_WMAC1_BITS \
\r
479 + AR531X_RESET_WLAN1 |\
\r
480 + AR531X_RESET_WARM_WLAN1_MAC |\
\r
481 + AR531X_RESET_WARM_WLAN1_BB
\r
483 +/* AR5312_CLOCKCTL1 register bit field definitions */
\r
484 +#define AR5312_CLOCKCTL1_PREDIVIDE_MASK 0x00000030
\r
485 +#define AR5312_CLOCKCTL1_PREDIVIDE_SHIFT 4
\r
486 +#define AR5312_CLOCKCTL1_MULTIPLIER_MASK 0x00001f00
\r
487 +#define AR5312_CLOCKCTL1_MULTIPLIER_SHIFT 8
\r
488 +#define AR5312_CLOCKCTL1_DOUBLER_MASK 0x00010000
\r
490 +/* Valid for AR5312 and AR2312 */
\r
491 +#define AR5312_CLOCKCTL1_PREDIVIDE_MASK 0x00000030
\r
492 +#define AR5312_CLOCKCTL1_PREDIVIDE_SHIFT 4
\r
493 +#define AR5312_CLOCKCTL1_MULTIPLIER_MASK 0x00001f00
\r
494 +#define AR5312_CLOCKCTL1_MULTIPLIER_SHIFT 8
\r
495 +#define AR5312_CLOCKCTL1_DOUBLER_MASK 0x00010000
\r
497 +/* Valid for AR2313 */
\r
498 +#define AR2313_CLOCKCTL1_PREDIVIDE_MASK 0x00003000
\r
499 +#define AR2313_CLOCKCTL1_PREDIVIDE_SHIFT 12
\r
500 +#define AR2313_CLOCKCTL1_MULTIPLIER_MASK 0x001f0000
\r
501 +#define AR2313_CLOCKCTL1_MULTIPLIER_SHIFT 16
\r
502 +#define AR2313_CLOCKCTL1_DOUBLER_MASK 0x00000000
\r
505 +/* AR531X_ENABLE register bit field definitions */
\r
506 +#define AR531X_ENABLE_WLAN0 0x0001
\r
507 +#define AR531X_ENABLE_ENET0 0x0002
\r
508 +#define AR531X_ENABLE_ENET1 0x0004
\r
509 +#define AR531X_ENABLE_UART_AND_WLAN1_PIO 0x0008 /* UART, and WLAN1 PIOs */
\r
510 +#define AR531X_ENABLE_WLAN1_DMA 0x0010 /* WLAN1 DMAs */
\r
511 +#define AR531X_ENABLE_WLAN1 \
\r
512 + (AR531X_ENABLE_UART_AND_WLAN1_PIO | AR531X_ENABLE_WLAN1_DMA)
\r
514 +/* AR531X_REV register bit field definitions */
\r
515 +#define AR531X_REV_WMAC_MAJ 0xf000
\r
516 +#define AR531X_REV_WMAC_MAJ_S 12
\r
517 +#define AR531X_REV_WMAC_MIN 0x0f00
\r
518 +#define AR531X_REV_WMAC_MIN_S 8
\r
519 +#define AR531X_REV_MAJ 0x00f0
\r
520 +#define AR531X_REV_MAJ_S 4
\r
521 +#define AR531X_REV_MIN 0x000f
\r
522 +#define AR531X_REV_MIN_S 0
\r
523 +#define AR531X_REV_CHIP (REV_MAJ|REV_MIN)
\r
525 +/* Major revision numbers, bits 7..4 of Revision ID register */
\r
526 +#define AR531X_REV_MAJ_AR5312 0x4
\r
527 +#define AR531X_REV_MAJ_AR2313 0x5
\r
529 +/* Minor revision numbers, bits 3..0 of Revision ID register */
\r
530 +#define AR5312_REV_MIN_DUAL 0x0 /* Dual WLAN version */
\r
531 +#define AR5312_REV_MIN_SINGLE 0x1 /* Single WLAN version */
\r
533 +/* AR531X_FLASHCTL register bit field definitions */
\r
534 +#define FLASHCTL_IDCY 0x0000000f /* Idle cycle turn around time */
\r
535 +#define FLASHCTL_IDCY_S 0
\r
536 +#define FLASHCTL_WST1 0x000003e0 /* Wait state 1 */
\r
537 +#define FLASHCTL_WST1_S 5
\r
538 +#define FLASHCTL_RBLE 0x00000400 /* Read byte lane enable */
\r
539 +#define FLASHCTL_WST2 0x0000f800 /* Wait state 2 */
\r
540 +#define FLASHCTL_WST2_S 11
\r
541 +#define FLASHCTL_AC 0x00070000 /* Flash address check (added) */
\r
542 +#define FLASHCTL_AC_S 16
\r
543 +#define FLASHCTL_AC_128K 0x00000000
\r
544 +#define FLASHCTL_AC_256K 0x00010000
\r
545 +#define FLASHCTL_AC_512K 0x00020000
\r
546 +#define FLASHCTL_AC_1M 0x00030000
\r
547 +#define FLASHCTL_AC_2M 0x00040000
\r
548 +#define FLASHCTL_AC_4M 0x00050000
\r
549 +#define FLASHCTL_AC_8M 0x00060000
\r
550 +#define FLASHCTL_AC_RES 0x00070000 /* 16MB is not supported */
\r
551 +#define FLASHCTL_E 0x00080000 /* Flash bank enable (added) */
\r
552 +#define FLASHCTL_BUSERR 0x01000000 /* Bus transfer error status flag */
\r
553 +#define FLASHCTL_WPERR 0x02000000 /* Write protect error status flag */
\r
554 +#define FLASHCTL_WP 0x04000000 /* Write protect */
\r
555 +#define FLASHCTL_BM 0x08000000 /* Burst mode */
\r
556 +#define FLASHCTL_MW 0x30000000 /* Memory width */
\r
557 +#define FLASHCTL_MWx8 0x00000000 /* Memory width x8 */
\r
558 +#define FLASHCTL_MWx16 0x10000000 /* Memory width x16 */
\r
559 +#define FLASHCTL_MWx32 0x20000000 /* Memory width x32 (not supported) */
\r
560 +#define FLASHCTL_ATNR 0x00000000 /* Access type == no retry */
\r
561 +#define FLASHCTL_ATR 0x80000000 /* Access type == retry every */
\r
562 +#define FLASHCTL_ATR4 0xc0000000 /* Access type == retry every 4 */
\r
564 +/* ARM Flash Controller -- 3 flash banks with either x8 or x16 devices. */
\r
565 +#define AR531X_FLASHCTL0 (AR531X_FLASHCTL + 0x00)
\r
566 +#define AR531X_FLASHCTL1 (AR531X_FLASHCTL + 0x04)
\r
567 +#define AR531X_FLASHCTL2 (AR531X_FLASHCTL + 0x08)
\r
569 +/* ARM SDRAM Controller -- just enough to determine memory size */
\r
570 +#define AR531X_MEM_CFG1 (AR531X_SDRAMCTL + 0x04)
\r
571 +#define MEM_CFG1_AC0 0x00000700 /* bank 0: SDRAM addr check (added) */
\r
572 +#define MEM_CFG1_AC0_S 8
\r
573 +#define MEM_CFG1_AC1 0x00007000 /* bank 1: SDRAM addr check (added) */
\r
574 +#define MEM_CFG1_AC1_S 12
\r
576 +/* GPIO Address Map */
\r
577 +#define AR531X_GPIO (AR531X_APBBASE + 0x2000)
\r
578 +#define AR531X_GPIO_DO (AR531X_GPIO + 0x00) /* output register */
\r
579 +#define AR531X_GPIO_DI (AR531X_GPIO + 0x04) /* intput register */
\r
580 +#define AR531X_GPIO_CR (AR531X_GPIO + 0x08) /* control register */
\r
582 +/* GPIO Control Register bit field definitions */
\r
583 +#define GPIO_CR_M(x) (1 << (x)) /* mask for i/o */
\r
584 +#define GPIO_CR_O(x) (0 << (x)) /* mask for output */
\r
585 +#define GPIO_CR_I(x) (1 << (x)) /* mask for input */
\r
586 +#define GPIO_CR_INT(x) (1 << ((x)+8)) /* mask for interrupt */
\r
587 +#define GPIO_CR_UART(x) (1 << ((x)+16)) /* uart multiplex */
\r
590 +typedef unsigned int AR531X_REG;
\r
592 +#define sysRegRead(phys) \
\r
593 + (*(volatile AR531X_REG *)PHYS_TO_K1(phys))
\r
595 +#define sysRegWrite(phys, val) \
\r
596 + ((*(volatile AR531X_REG *)PHYS_TO_K1(phys)) = (val))
\r
600 + * This is board-specific data that is stored in a "fixed" location in flash.
\r
601 + * It is shared across operating systems, so it should not be changed lightly.
\r
602 + * The main reason we need it is in order to extract the ethernet MAC
\r
605 +struct ar531x_boarddata {
\r
606 + u32 magic; /* board data is valid */
\r
607 +#define AR531X_BD_MAGIC 0x35333131 /* "5311", for all 531x platforms */
\r
608 + u16 cksum; /* checksum (starting with BD_REV 2) */
\r
609 + u16 rev; /* revision of this struct */
\r
611 + char boardName[64]; /* Name of board */
\r
612 + u16 major; /* Board major number */
\r
613 + u16 minor; /* Board minor number */
\r
614 + u32 config; /* Board configuration */
\r
615 +#define BD_ENET0 0x00000001 /* ENET0 is stuffed */
\r
616 +#define BD_ENET1 0x00000002 /* ENET1 is stuffed */
\r
617 +#define BD_UART1 0x00000004 /* UART1 is stuffed */
\r
618 +#define BD_UART0 0x00000008 /* UART0 is stuffed (dma) */
\r
619 +#define BD_RSTFACTORY 0x00000010 /* Reset factory defaults stuffed */
\r
620 +#define BD_SYSLED 0x00000020 /* System LED stuffed */
\r
621 +#define BD_EXTUARTCLK 0x00000040 /* External UART clock */
\r
622 +#define BD_CPUFREQ 0x00000080 /* cpu freq is valid in nvram */
\r
623 +#define BD_SYSFREQ 0x00000100 /* sys freq is set in nvram */
\r
624 +#define BD_WLAN0 0x00000200 /* Enable WLAN0 */
\r
625 +#define BD_MEMCAP 0x00000400 /* CAP SDRAM @ memCap for testing */
\r
626 +#define BD_DISWATCHDOG 0x00000800 /* disable system watchdog */
\r
627 +#define BD_WLAN1 0x00001000 /* Enable WLAN1 (ar5212) */
\r
628 +#define BD_ISCASPER 0x00002000 /* FLAG for AR2312 */
\r
629 +#define BD_WLAN0_2G_EN 0x00004000 /* FLAG for radio0_2G */
\r
630 +#define BD_WLAN0_5G_EN 0x00008000 /* FLAG for radio0_2G */
\r
631 +#define BD_WLAN1_2G_EN 0x00020000 /* FLAG for radio0_2G */
\r
632 +#define BD_WLAN1_5G_EN 0x00040000 /* FLAG for radio0_2G */
\r
633 + u16 resetConfigGpio; /* Reset factory GPIO pin */
\r
634 + u16 sysLedGpio; /* System LED GPIO pin */
\r
636 + u32 cpuFreq; /* CPU core frequency in Hz */
\r
637 + u32 sysFreq; /* System frequency in Hz */
\r
638 + u32 cntFreq; /* Calculated C0_COUNT frequency */
\r
644 + u16 pciId; /* Pseudo PCIID for common code */
\r
645 + u16 memCap; /* cap bank1 in MB */
\r
648 + u8 wlan1Mac[6]; /* (ar5212) */
\r
650 +#endif /* AR531X_H */
\r
651 diff -urN linux-2.4.32/arch/mips/ar531x/ar531xintr.S linux-2.4.32.new/arch/mips/ar531x/ar531xintr.S
\r
652 --- linux-2.4.32/arch/mips/ar531x/ar531xintr.S 1970-01-01 01:00:00.000000000 +0100
\r
653 +++ linux-2.4.32.new/arch/mips/ar531x/ar531xintr.S 2005-12-24 20:29:42.103311176 +0000
\r
656 + * This file is subject to the terms and conditions of the GNU General Public
\r
657 + * License. See the file "COPYING" in the main directory of this archive
\r
658 + * for more details.
\r
660 + * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.
\r
663 +#include <asm/asm.h>
\r
664 +#include <asm/mipsregs.h>
\r
665 +#include <asm/regdef.h>
\r
666 +#include <asm/stackframe.h>
\r
669 + * Glue code to save registers and get us to the interrupt dispatcher
\r
674 +NESTED(ar531x_interrupt_receive, PT_SIZE, sp)
\r
680 + jal ar531x_irq_dispatch
\r
684 + END(ar531x_interrupt_receive)
\r
685 diff -urN linux-2.4.32/arch/mips/ar531x/ar531xirq.c linux-2.4.32.new/arch/mips/ar531x/ar531xirq.c
\r
686 --- linux-2.4.32/arch/mips/ar531x/ar531xirq.c 1970-01-01 01:00:00.000000000 +0100
\r
687 +++ linux-2.4.32.new/arch/mips/ar531x/ar531xirq.c 2005-12-24 20:29:42.132306768 +0000
\r
690 + * This file is subject to the terms and conditions of the GNU General Public
\r
691 + * License. See the file "COPYING" in the main directory of this archive
\r
692 + * for more details.
\r
694 + * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.
\r
698 + * Interrupt support for AR531X WiSOC.
\r
701 +#include <linux/config.h>
\r
702 +#include <linux/init.h>
\r
703 +#include <linux/kernel_stat.h>
\r
704 +#include <linux/signal.h>
\r
705 +#include <linux/sched.h>
\r
706 +#include <linux/interrupt.h>
\r
707 +#include <linux/slab.h>
\r
708 +#include <linux/random.h>
\r
709 +#include <linux/pm.h>
\r
710 +#include <linux/delay.h>
\r
711 +#include <linux/reboot.h>
\r
713 +#include <asm/irq.h>
\r
714 +#include <asm/mipsregs.h>
\r
715 +#include <asm/gdb-stub.h>
\r
717 +#include "ar531xlnx.h"
\r
718 +#include <asm/irq_cpu.h>
\r
720 +extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
\r
722 +static void ar531x_misc_intr_enable(unsigned int irq);
\r
723 +static void ar531x_misc_intr_disable(unsigned int irq);
\r
725 +/* Turn on the specified AR531X_MISC_IRQ interrupt */
\r
726 +static unsigned int
\r
727 +ar531x_misc_intr_startup(unsigned int irq)
\r
729 + ar531x_misc_intr_enable(irq);
\r
733 +/* Turn off the specified AR531X_MISC_IRQ interrupt */
\r
735 +ar531x_misc_intr_shutdown(unsigned int irq)
\r
737 + ar531x_misc_intr_disable(irq);
\r
740 +/* Enable the specified AR531X_MISC_IRQ interrupt */
\r
742 +ar531x_misc_intr_enable(unsigned int irq)
\r
744 + unsigned int imr;
\r
746 + imr = sysRegRead(AR531X_IMR);
\r
747 + imr |= (1 << (irq - AR531X_MISC_IRQ_BASE - 1));
\r
748 + sysRegWrite(AR531X_IMR, imr);
\r
749 + sysRegRead(AR531X_IMR); /* flush write buffer */
\r
752 +/* Disable the specified AR531X_MISC_IRQ interrupt */
\r
754 +ar531x_misc_intr_disable(unsigned int irq)
\r
756 + unsigned int imr;
\r
758 + imr = sysRegRead(AR531X_IMR);
\r
759 + imr &= ~(1 << (irq - AR531X_MISC_IRQ_BASE - 1));
\r
760 + sysRegWrite(AR531X_IMR, imr);
\r
761 + sysRegRead(AR531X_IMR); /* flush write buffer */
\r
765 +ar531x_misc_intr_ack(unsigned int irq)
\r
767 + ar531x_misc_intr_disable(irq);
\r
771 +ar531x_misc_intr_end(unsigned int irq)
\r
773 + if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
\r
774 + ar531x_misc_intr_enable(irq);
\r
778 +ar531x_misc_intr_set_affinity(unsigned int irq, unsigned long mask)
\r
780 + /* Only 1 CPU; ignore affinity request */
\r
783 +struct hw_interrupt_type ar531x_misc_intr_controller = {
\r
785 + ar531x_misc_intr_startup,
\r
786 + ar531x_misc_intr_shutdown,
\r
787 + ar531x_misc_intr_enable,
\r
788 + ar531x_misc_intr_disable,
\r
789 + ar531x_misc_intr_ack,
\r
790 + ar531x_misc_intr_end,
\r
791 + ar531x_misc_intr_set_affinity,
\r
794 +int ar531x_misc_irq_base;
\r
797 + * Determine interrupt source among interrupts that use IP6
\r
800 +ar531x_misc_intr_init(int irq_base)
\r
804 + for (i = irq_base; i < irq_base + AR531X_MISC_IRQ_COUNT; i++) {
\r
805 + irq_desc[i].status = IRQ_DISABLED;
\r
806 + irq_desc[i].action = NULL;
\r
807 + irq_desc[i].depth = 1;
\r
808 + irq_desc[i].handler = &ar531x_misc_intr_controller;
\r
811 + ar531x_misc_irq_base = irq_base;
\r
816 +spurious_irq_handler(int cpl, void *dev_id, struct pt_regs *regs)
\r
819 + printk("spurious_irq_handler: %d cause=0x%8.8x status=0x%8.8x\n",
\r
820 + cpl, cause_intrs, status_intrs);
\r
826 +spurious_misc_handler(int cpl, void *dev_id, struct pt_regs *regs)
\r
829 + printk("spurious_misc_handler: 0x%x isr=0x%8.8x imr=0x%8.8x\n",
\r
830 + cpl, ar531x_isr, ar531x_imr);
\r
835 +ar531x_timer_handler(int cpl, void *dev_id, struct pt_regs *regs)
\r
837 + (void)sysRegRead(AR531X_TIMER); /* clear interrupt */
\r
841 +ar531x_ahb_proc_handler(int cpl, void *dev_id, struct pt_regs *regs)
\r
848 + proc1 = sysRegRead(AR531X_PROC1);
\r
849 + procAddr = sysRegRead(AR531X_PROCADDR); /* clears error state */
\r
850 + dma1 = sysRegRead(AR531X_DMA1);
\r
851 + dmaAddr = sysRegRead(AR531X_DMAADDR); /* clears error state */
\r
853 + printk("AHB interrupt: PROCADDR=0x%8.8x PROC1=0x%8.8x DMAADDR=0x%8.8x DMA1=0x%8.8x\n",
\r
854 + procAddr, proc1, dmaAddr, dma1);
\r
856 + machine_restart("AHB error"); /* Catastrophic failure */
\r
859 +static struct irqaction cascade =
\r
860 + {no_action, SA_INTERRUPT, 0, "cascade",
\r
863 +static struct irqaction spurious_irq =
\r
864 + {spurious_irq_handler, SA_INTERRUPT, 0, "spurious_irq",
\r
867 +static struct irqaction spurious_misc =
\r
868 + {spurious_misc_handler, SA_INTERRUPT, 0, "spurious_misc",
\r
871 +static struct irqaction ar531x_timer_interrupt =
\r
872 + {ar531x_timer_handler, SA_INTERRUPT, 0, "ar531x_timer_interrupt",
\r
875 +static struct irqaction ar531x_ahb_proc_interrupt =
\r
876 + {ar531x_ahb_proc_handler, SA_INTERRUPT, 0, "ar531x_ahb_proc_interrupt",
\r
879 +extern asmlinkage void ar531x_interrupt_receive(void);
\r
882 + * Called when an interrupt is received, this function
\r
883 + * determines exactly which interrupt it was, and it
\r
884 + * invokes the appropriate handler.
\r
886 + * Implicitly, we also define interrupt priority by
\r
887 + * choosing which to dispatch first.
\r
890 +ar531x_irq_dispatch(struct pt_regs *regs)
\r
892 + int cause_intrs = regs->cp0_cause;
\r
893 + int status_intrs = regs->cp0_status;
\r
894 + int pending = cause_intrs & status_intrs;
\r
896 + if (pending & CAUSEF_IP2) {
\r
897 + do_IRQ(AR531X_IRQ_WLAN0_INTRS, regs);
\r
899 + else if (pending & CAUSEF_IP3) {
\r
900 + do_IRQ(AR531X_IRQ_ENET0_INTRS, regs);
\r
902 + else if (pending & CAUSEF_IP4) {
\r
903 + do_IRQ(AR531X_IRQ_ENET1_INTRS, regs);
\r
905 + else if (pending & CAUSEF_IP5) {
\r
906 + do_IRQ(AR531X_IRQ_WLAN1_INTRS, regs);
\r
908 + else if (pending & CAUSEF_IP6) {
\r
909 + AR531X_REG ar531x_isr = sysRegRead(AR531X_ISR);
\r
910 + AR531X_REG ar531x_imr = sysRegRead(AR531X_IMR);
\r
911 + unsigned int ar531x_misc_intrs = ar531x_isr & ar531x_imr;
\r
913 + if (ar531x_misc_intrs & AR531X_ISR_TIMER)
\r
914 + do_IRQ(AR531X_MISC_IRQ_TIMER, regs);
\r
915 + else if (ar531x_misc_intrs & AR531X_ISR_AHBPROC)
\r
916 + do_IRQ(AR531X_MISC_IRQ_AHB_PROC, regs);
\r
917 + else if (ar531x_misc_intrs & AR531X_ISR_AHBDMA)
\r
918 + do_IRQ(AR531X_MISC_IRQ_AHB_DMA, regs);
\r
919 + else if (ar531x_misc_intrs & AR531X_ISR_GPIO)
\r
922 + u32 gpioIntPending;
\r
924 + gpioIntPending = sysRegRead(AR531X_GPIO_DI) & gpioIntMask;
\r
925 + for (i=0; i<AR531X_GPIO_IRQ_COUNT; i++) {
\r
926 + if (gpioIntPending & (1 << i))
\r
927 + do_IRQ(AR531X_GPIO_IRQ(i), regs);
\r
930 + else if ((ar531x_misc_intrs & AR531X_ISR_UART0) ||
\r
931 + (ar531x_misc_intrs & AR531X_ISR_UART0DMA)) {
\r
932 + do_IRQ(AR531X_MISC_IRQ_UART0, regs);
\r
934 + if (kgdbInterrupt()) {
\r
935 + if (!user_mode(regs))
\r
936 + set_async_breakpoint((unsigned long *)®s->cp0_epc);
\r
938 +#endif /* CONFIG_KGDB */
\r
940 + else if (ar531x_misc_intrs & AR531X_ISR_WD)
\r
941 + do_IRQ(AR531X_MISC_IRQ_WATCHDOG, regs);
\r
942 + else if (ar531x_misc_intrs & AR531X_ISR_LOCAL)
\r
943 + do_IRQ(AR531X_MISC_IRQ_LOCAL, regs);
\r
945 + do_IRQ(AR531X_MISC_IRQ_NONE, regs);
\r
946 + } else if (pending & CAUSEF_IP7)
\r
947 + do_IRQ(AR531X_IRQ_CPU_CLOCK, regs);
\r
949 + do_IRQ(AR531X_IRQ_NONE, regs);
\r
952 +void __init init_IRQ(void)
\r
954 + init_generic_irq();
\r
955 + set_except_vector(0, ar531x_interrupt_receive);
\r
957 + /* Initialize interrupt controllers */
\r
958 + mips_cpu_irq_init(MIPS_CPU_IRQ_BASE);
\r
959 + ar531x_misc_intr_init(AR531X_MISC_IRQ_BASE);
\r
960 + ar531x_gpio_intr_init(AR531X_GPIO_IRQ_BASE);
\r
961 + setup_irq(AR531X_IRQ_MISC_INTRS, &cascade);
\r
963 + * AR531X_IRQ_CPU_CLOCK is setup by ar531x_timer_setup.
\r
966 + /* Default "spurious interrupt" handlers */
\r
967 + setup_irq(AR531X_IRQ_NONE, &spurious_irq);
\r
968 + setup_irq(AR531X_MISC_IRQ_NONE, &spurious_misc);
\r
969 + setup_irq(AR531X_GPIO_IRQ_NONE, &spurious_gpio);
\r
971 + setup_irq(AR531X_MISC_IRQ_TIMER, &ar531x_timer_interrupt);
\r
972 + setup_irq(AR531X_MISC_IRQ_AHB_PROC, &ar531x_ahb_proc_interrupt);
\r
973 + setup_irq(AR531X_MISC_IRQ_GPIO, &cascade);
\r
975 +#ifdef CONFIG_KGDB
\r
976 +#if CONFIG_EARLY_STOP
\r
981 diff -urN linux-2.4.32/arch/mips/ar531x/ar531xksyms.c linux-2.4.32.new/arch/mips/ar531x/ar531xksyms.c
\r
982 --- linux-2.4.32/arch/mips/ar531x/ar531xksyms.c 1970-01-01 01:00:00.000000000 +0100
\r
983 +++ linux-2.4.32.new/arch/mips/ar531x/ar531xksyms.c 2005-12-24 20:29:42.132306768 +0000
\r
986 + * This file is subject to the terms and conditions of the GNU General Public
\r
987 + * License. See the file "COPYING" in the main directory of this archive
\r
988 + * for more details.
\r
990 + * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.
\r
993 +#include <linux/module.h>
\r
994 +#include "asm/atheros/ar531xbsp.h"
\r
997 +EXPORT_SYMBOL(kgdbInit);
\r
998 +EXPORT_SYMBOL(kgdbEnabled);
\r
1000 +EXPORT_SYMBOL(ar531x_sys_frequency);
\r
1001 diff -urN linux-2.4.32/arch/mips/ar531x/ar531xlnx.h linux-2.4.32.new/arch/mips/ar531x/ar531xlnx.h
\r
1002 --- linux-2.4.32/arch/mips/ar531x/ar531xlnx.h 1970-01-01 01:00:00.000000000 +0100
\r
1003 +++ linux-2.4.32.new/arch/mips/ar531x/ar531xlnx.h 2005-12-24 20:29:42.133306616 +0000
\r
1006 + * This file is subject to the terms and conditions of the GNU General Public
\r
1007 + * License. See the file "COPYING" in the main directory of this archive
\r
1008 + * for more details.
\r
1010 + * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.
\r
1014 + * This file contains definitions needed in order to compile
\r
1015 + * AR531X products for linux. Definitions that are largely
\r
1016 + * AR531X-specific and independent of operating system belong
\r
1017 + * in ar531x.h rather than this file.
\r
1019 +#include "ar531x.h"
\r
1021 +#define MIPS_CPU_IRQ_BASE 0x00
\r
1022 +#define AR531X_HIGH_PRIO 0x10
\r
1023 +#define AR531X_MISC_IRQ_BASE 0x20
\r
1024 +#define AR531X_GPIO_IRQ_BASE 0x30
\r
1026 +/* Software's idea of interrupts handled by "CPU Interrupt Controller" */
\r
1027 +#define AR531X_IRQ_NONE MIPS_CPU_IRQ_BASE+0
\r
1028 +#define AR531X_IRQ_WLAN0_INTRS MIPS_CPU_IRQ_BASE+2 /* C0_CAUSE: 0x0400 */
\r
1029 +#define AR531X_IRQ_ENET0_INTRS MIPS_CPU_IRQ_BASE+3 /* C0_CAUSE: 0x0800 */
\r
1030 +#define AR531X_IRQ_ENET1_INTRS MIPS_CPU_IRQ_BASE+4 /* C0_CAUSE: 0x1000 */
\r
1031 +#define AR531X_IRQ_WLAN1_INTRS MIPS_CPU_IRQ_BASE+5 /* C0_CAUSE: 0x2000 */
\r
1032 +#define AR531X_IRQ_MISC_INTRS MIPS_CPU_IRQ_BASE+6 /* C0_CAUSE: 0x4000 */
\r
1033 +#define AR531X_IRQ_CPU_CLOCK MIPS_CPU_IRQ_BASE+7 /* C0_CAUSE: 0x8000 */
\r
1035 +/* Miscellaneous interrupts, which share IP6 */
\r
1036 +#define AR531X_MISC_IRQ_NONE AR531X_MISC_IRQ_BASE+0
\r
1037 +#define AR531X_MISC_IRQ_TIMER AR531X_MISC_IRQ_BASE+1
\r
1038 +#define AR531X_MISC_IRQ_AHB_PROC AR531X_MISC_IRQ_BASE+2
\r
1039 +#define AR531X_MISC_IRQ_AHB_DMA AR531X_MISC_IRQ_BASE+3
\r
1040 +#define AR531X_MISC_IRQ_GPIO AR531X_MISC_IRQ_BASE+4
\r
1041 +#define AR531X_MISC_IRQ_UART0 AR531X_MISC_IRQ_BASE+5
\r
1042 +#define AR531X_MISC_IRQ_UART0_DMA AR531X_MISC_IRQ_BASE+6
\r
1043 +#define AR531X_MISC_IRQ_WATCHDOG AR531X_MISC_IRQ_BASE+7
\r
1044 +#define AR531X_MISC_IRQ_LOCAL AR531X_MISC_IRQ_BASE+8
\r
1045 +#define AR531X_MISC_IRQ_COUNT 9
\r
1047 +/* GPIO Interrupts [0..7], share AR531X_MISC_IRQ_GPIO */
\r
1048 +#define AR531X_GPIO_IRQ_NONE AR531X_MISC_IRQ_BASE+0
\r
1049 +#define AR531X_GPIO_IRQ(n) AR531X_MISC_IRQ_BASE+(n)+1
\r
1050 +#define AR531X_GPIO_IRQ_COUNT 9
\r
1052 +#define PHYS_TO_K1(physaddr) KSEG1ADDR(physaddr)
\r
1053 +#define PHYS_TO_K0(physaddr) KSEG0ADDR(physaddr)
\r
1054 +#define UNMAPPED_TO_PHYS(vaddr) PHYSADDR(vaddr)
\r
1055 +#define IS_UNMAPPED_VADDR(vaddr) \
\r
1056 + ((KSEGX(vaddr) == KSEG0) || (KSEGX(vaddr) == KSEG1))
\r
1058 +/* IOCTL commands for /proc/ar531x */
\r
1059 +#define AR531X_CTRL_DO_BREAKPOINT 1
\r
1060 +#define AR531X_CTRL_DO_MADWIFI 2
\r
1063 + * Definitions for operating system portability.
\r
1064 + * These are vxWorks-->Linux translations.
\r
1066 +#define LOCAL static
\r
1071 +#define UINT16 u16
\r
1072 +#define UINT32 u32
\r
1073 +#define PRINTF printk
\r
1074 +#if /* DEBUG */ 1
\r
1075 +#define DEBUG_PRINTF printk
\r
1078 +DEBUG_PRINTF while (0) printk
\r
1079 +#define INLINE inline
\r
1081 +#define sysUDelay(usecs) udelay(usecs)
\r
1082 +#define sysMsDelay(msecs) mdelay(msecs)
\r
1083 +typedef volatile UINT8 *VIRT_ADDR;
\r
1084 +#define MALLOC(sz) kmalloc(sz, GFP_KERNEL)
\r
1085 +#define MALLOC_NOSLEEP(sz) kmalloc(sz, GFP_ATOMIC)
\r
1086 +#define FREE(ptr) kfree((void *)ptr)
\r
1087 +#define BSP_BUG() do { printk("kernel BSP BUG at %s:%d!\n", __FILE__, __LINE__); *(int *)0=0; } while (0)
\r
1088 +#define BSP_BUG_ON(condition) do { if (unlikely((condition)!=0)) BSP_BUG(); } while(0)
\r
1089 +#define ASSERT(x) BSP_BUG_ON(!(x))
\r
1091 +extern struct ar531x_boarddata *ar531x_board_configuration;
\r
1092 +extern char *ar531x_radio_configuration;
\r
1093 +extern char *enet_mac_address_get(int MACUnit);
\r
1095 +extern void kgdbInit(void);
\r
1096 +extern int kgdbEnabled(void);
\r
1097 +extern void breakpoint(void);
\r
1098 +extern int kgdbInterrupt(void);
\r
1099 +extern unsigned int ar531x_cpu_frequency(void);
\r
1100 +extern unsigned int ar531x_sys_frequency(void);
\r
1102 +/* GPIO support */
\r
1103 +extern struct irqaction spurious_gpio;
\r
1104 +extern unsigned int gpioIntMask;
\r
1105 +extern void ar531x_gpio_intr_init(int irq_base);
\r
1106 +extern void ar531x_gpio_ctrl_output(int gpio);
\r
1107 +extern void ar531x_gpio_ctrl_input(int gpio);
\r
1108 +extern void ar531x_gpio_set(int gpio, int val);
\r
1109 +extern int ar531x_gpio_get(int gpio);
\r
1110 +extern void ar531x_gpio_intr_enable(unsigned int irq);
\r
1111 +extern void ar531x_gpio_intr_disable(unsigned int irq);
\r
1113 +/* Watchdog Timer support */
\r
1114 +extern int watchdog_start(unsigned int milliseconds);
\r
1115 +extern int watchdog_stop(void);
\r
1116 +extern int watchdog_is_enabled(void);
\r
1117 +extern unsigned int watchdog_min_timer_reached(void);
\r
1118 +extern void watchdog_notify_alive(void);
\r
1120 +#define A_DATA_CACHE_INVAL(start, length) \
\r
1121 + dma_cache_inv((UINT32)(start),(length))
\r
1123 +#define sysWbFlush() mb()
\r
1125 +#define intDisable(x) cli()
\r
1126 +#define intEnable(x) sti()
\r
1127 diff -urN linux-2.4.32/arch/mips/ar531x/ar531xprom.c linux-2.4.32.new/arch/mips/ar531x/ar531xprom.c
\r
1128 --- linux-2.4.32/arch/mips/ar531x/ar531xprom.c 1970-01-01 01:00:00.000000000 +0100
\r
1129 +++ linux-2.4.32.new/arch/mips/ar531x/ar531xprom.c 2005-12-24 20:29:42.133306616 +0000
\r
1132 + * This file is subject to the terms and conditions of the GNU General Public
\r
1133 + * License. See the file "COPYING" in the main directory of this archive
\r
1134 + * for more details.
\r
1136 + * Copyright MontaVista Software Inc
\r
1137 + * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.
\r
1141 + * Prom setup file for ar531x
\r
1144 +#include <linux/init.h>
\r
1145 +#include <linux/config.h>
\r
1146 +#include <linux/kernel.h>
\r
1147 +#include <linux/string.h>
\r
1148 +#include <linux/mm.h>
\r
1149 +#include <linux/bootmem.h>
\r
1151 +#include <asm/bootinfo.h>
\r
1152 +#include <asm/addrspace.h>
\r
1154 +#include "ar531xlnx.h"
\r
1156 +#define COMMAND_LINE_SIZE 512
\r
1158 +char arcs_cmdline[COMMAND_LINE_SIZE];
\r
1160 +void __init prom_init(int argc, char *argv[])
\r
1163 + unsigned int memcfg1;
\r
1164 + int bank0AC, bank1AC;
\r
1165 + int memsz_in_mb;
\r
1167 + strcpy(arcs_cmdline, "console=ttyS0,9600");
\r
1168 + for (i=0; i<argc; i++) {
\r
1169 + strcat(arcs_cmdline, " ");
\r
1170 + strcat(arcs_cmdline, argv[i]);
\r
1173 + mips_machgroup = MACH_GROUP_AR531X;
\r
1174 +#ifdef CONFIG_APUNUSED
\r
1175 + mips_machtype = MACH_ATHEROS_UNUSED;
\r
1177 +#ifdef CONFIG_AP30
\r
1178 + mips_machtype = MACH_ATHEROS_AP30;
\r
1180 +#ifdef CONFIG_AP33
\r
1181 + mips_machtype = MACH_ATHEROS_AP33;
\r
1183 +#ifdef CONFIG_AP38
\r
1184 + mips_machtype = MACH_ATHEROS_AP38;
\r
1186 +#ifdef CONFIG_AP43
\r
1187 + mips_machtype = MACH_ATHEROS_AP43;
\r
1189 +#ifdef CONFIG_AP48
\r
1190 + mips_machtype = MACH_ATHEROS_AP48;
\r
1192 +#ifdef CONFIG_PB32
\r
1193 + mips_machtype = MACH_ATHEROS_PB32;
\r
1197 + /* Determine SDRAM size based on Address Checks done at startup */
\r
1198 + memcfg1 = sysRegRead(AR531X_MEM_CFG1);
\r
1199 + bank0AC = (memcfg1 & MEM_CFG1_AC0) >> MEM_CFG1_AC0_S;
\r
1200 + bank1AC = (memcfg1 & MEM_CFG1_AC1) >> MEM_CFG1_AC1_S;
\r
1201 + memsz_in_mb = (bank0AC ? (1 << (bank0AC+1)) : 0)
\r
1202 + + (bank1AC ? (1 << (bank1AC+1)) : 0);
\r
1205 + * By default, use all available memory. You can override this
\r
1206 + * to use, say, 8MB by specifying "mem=8M" as an argument on the
\r
1207 + * linux bootup command line.
\r
1209 + add_memory_region(0, memsz_in_mb << 20, BOOT_MEM_RAM);
\r
1212 +void __init prom_free_prom_memory(void)
\r
1215 diff -urN linux-2.4.32/arch/mips/ar531x/ar531xsetup.c linux-2.4.32.new/arch/mips/ar531x/ar531xsetup.c
\r
1216 --- linux-2.4.32/arch/mips/ar531x/ar531xsetup.c 1970-01-01 01:00:00.000000000 +0100
\r
1217 +++ linux-2.4.32.new/arch/mips/ar531x/ar531xsetup.c 2005-12-24 20:29:42.133306616 +0000
\r
1220 + * This file is subject to the terms and conditions of the GNU General Public
\r
1221 + * License. See the file "COPYING" in the main directory of this archive
\r
1222 + * for more details.
\r
1224 + * Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.
\r
1228 + * Initialization for ar531x SOC.
\r
1231 +#include <linux/config.h>
\r
1232 +#include <linux/init.h>
\r
1233 +#include <linux/delay.h>
\r
1234 +#include <linux/irq.h>
\r
1235 +#include <linux/interrupt.h>
\r
1236 +#include <linux/serial.h>
\r
1237 +#include <linux/types.h>
\r
1238 +#include <linux/string.h>
\r
1240 +#include <asm/reboot.h>
\r
1241 +#include <asm/io.h>
\r
1242 +#include <asm/time.h>
\r
1243 +#include <asm/pgtable.h>
\r
1244 +#include <asm/processor.h>
\r
1245 +#include <asm/reboot.h>
\r
1246 +#include <asm/system.h>
\r
1247 +#include <asm/serial.h>
\r
1249 +#include "ar531xlnx.h"
\r
1252 +ar531x_restart(char *command)
\r
1255 + sysRegWrite(AR531X_RESET, AR531X_RESET_SYSTEM);
\r
1260 +ar531x_halt(void)
\r
1262 + printk(KERN_NOTICE "\n** You can safely turn off the power\n");
\r
1267 +ar531x_power_off(void)
\r
1273 +get_system_type(void)
\r
1275 + return "Atheros AR531X";
\r
1279 + * This table is indexed by bits 5..4 of the CLOCKCTL1 register
\r
1280 + * to determine the predevisor value.
\r
1282 +static int CLOCKCTL1_PREDIVIDE_TABLE[4] = {
\r
1290 +ar531x_cpu_frequency(void)
\r
1292 + static unsigned int ar531x_calculated_cpu_freq;
\r
1293 + unsigned int clockctl1_predivide_mask;
\r
1294 + unsigned int clockctl1_predivide_shift;
\r
1295 + unsigned int clockctl1_multiplier_mask;
\r
1296 + unsigned int clockctl1_multiplier_shift;
\r
1297 + unsigned int clockctl1_doubler_mask;
\r
1298 + int wisoc_revision;
\r
1301 + * Trust the bootrom's idea of cpu frequency.
\r
1303 + ar531x_calculated_cpu_freq = sysRegRead(AR5312_SCRATCH);
\r
1304 + if (ar531x_calculated_cpu_freq)
\r
1305 + return ar531x_calculated_cpu_freq;
\r
1307 + wisoc_revision = (sysRegRead(AR531X_REV) & AR531X_REV_MAJ) >> AR531X_REV_MAJ_S;
\r
1308 + if (wisoc_revision == AR531X_REV_MAJ_AR2313) {
\r
1309 + clockctl1_predivide_mask = AR2313_CLOCKCTL1_PREDIVIDE_MASK;
\r
1310 + clockctl1_predivide_shift = AR2313_CLOCKCTL1_PREDIVIDE_SHIFT;
\r
1311 + clockctl1_multiplier_mask = AR2313_CLOCKCTL1_MULTIPLIER_MASK;
\r
1312 + clockctl1_multiplier_shift = AR2313_CLOCKCTL1_MULTIPLIER_SHIFT;
\r
1313 + clockctl1_doubler_mask = AR2313_CLOCKCTL1_DOUBLER_MASK;
\r
1314 + } else { /* AR5312 and AR2312 */
\r
1315 + clockctl1_predivide_mask = AR5312_CLOCKCTL1_PREDIVIDE_MASK;
\r
1316 + clockctl1_predivide_shift = AR5312_CLOCKCTL1_PREDIVIDE_SHIFT;
\r
1317 + clockctl1_multiplier_mask = AR5312_CLOCKCTL1_MULTIPLIER_MASK;
\r
1318 + clockctl1_multiplier_shift = AR5312_CLOCKCTL1_MULTIPLIER_SHIFT;
\r
1319 + clockctl1_doubler_mask = AR5312_CLOCKCTL1_DOUBLER_MASK;
\r
1323 + * Clocking is derived from a fixed 40MHz input clock.
\r
1324 + * cpuFreq = InputClock * MULT (where MULT is PLL multiplier)
\r
1326 + * sysFreq = cpuFreq / 4 (used for APB clock, serial,
\r
1327 + * flash, Timer, Watchdog Timer)
\r
1329 + * cntFreq = cpuFreq / 2 (use for CPU count/compare)
\r
1331 + * So, for example, with a PLL multiplier of 5, we have
\r
1332 + * cpuFrez = 200MHz
\r
1333 + * sysFreq = 50MHz
\r
1334 + * cntFreq = 100MHz
\r
1336 + * We compute the CPU frequency, based on PLL settings.
\r
1338 + if (ar531x_calculated_cpu_freq == 0) {
\r
1339 + unsigned int clockCtl1 = sysRegRead(AR5312_CLOCKCTL1);
\r
1341 + int preDivideSelect = (clockCtl1 & clockctl1_predivide_mask) >>
\r
1342 + clockctl1_predivide_shift;
\r
1344 + int preDivisor = CLOCKCTL1_PREDIVIDE_TABLE[preDivideSelect];
\r
1346 + int multiplier = (clockCtl1 & clockctl1_multiplier_mask) >>
\r
1347 + clockctl1_multiplier_shift;
\r
1349 + if (clockCtl1 & clockctl1_doubler_mask) {
\r
1350 + multiplier = multiplier << 1;
\r
1353 + ar531x_calculated_cpu_freq = (40000000 / preDivisor) * multiplier;
\r
1356 + return ar531x_calculated_cpu_freq;
\r
1360 +ar531x_sys_frequency(void)
\r
1362 + static unsigned int ar531x_calculated_sys_freq = 0;
\r
1364 + if (ar531x_calculated_sys_freq == 0) {
\r
1365 + ar531x_calculated_sys_freq = ar531x_cpu_frequency() / 4;
\r
1368 + return ar531x_calculated_sys_freq;
\r
1371 +static void __init
\r
1372 +flash_setup(void)
\r
1374 + UINT32 flash_ctl;
\r
1376 + /* Configure flash bank 0 */
\r
1377 + flash_ctl = FLASHCTL_E |
\r
1378 + FLASHCTL_AC_8M |
\r
1380 + (0x01 << FLASHCTL_IDCY_S) |
\r
1381 + (0x07 << FLASHCTL_WST1_S) |
\r
1382 + (0x07 << FLASHCTL_WST2_S) |
\r
1383 + (sysRegRead(AR531X_FLASHCTL0) & FLASHCTL_MW);
\r
1385 + sysRegWrite(AR531X_FLASHCTL0, flash_ctl);
\r
1387 + /* Disable other flash banks */
\r
1388 + sysRegWrite(AR531X_FLASHCTL1,
\r
1389 + sysRegRead(AR531X_FLASHCTL1) & ~(FLASHCTL_E | FLASHCTL_AC));
\r
1391 + sysRegWrite(AR531X_FLASHCTL2,
\r
1392 + sysRegRead(AR531X_FLASHCTL2) & ~(FLASHCTL_E | FLASHCTL_AC));
\r
1398 +serial_setup(void)
\r
1400 + struct serial_struct s;
\r
1402 + memset(&s, 0, sizeof(s));
\r
1404 + s.flags = STD_COM_FLAGS;
\r
1405 + s.io_type = SERIAL_IO_MEM;
\r
1406 + s.baud_base = ar531x_sys_frequency()/16;
\r
1407 + s.irq = AR531X_MISC_IRQ_UART0;
\r
1408 + s.iomem_reg_shift = 2;
\r
1409 + s.iomem_base = (u8 *)0xbc000003;
\r
1411 + if (early_serial_setup(&s) != 0)
\r
1412 + printk(KERN_ERR "early_serial_setup failed\n");
\r
1415 +extern int setup_irq(unsigned int irq, struct irqaction *irqaction);
\r
1416 +static void __init
\r
1417 +ar531x_timer_setup(struct irqaction *irq)
\r
1419 + unsigned int count;
\r
1421 + /* Usually irq is timer_irqaction (timer_interrupt) */
\r
1422 + setup_irq(AR531X_IRQ_CPU_CLOCK, irq);
\r
1424 + /* to generate the first CPU timer interrupt */
\r
1425 + count = read_c0_count();
\r
1426 + write_c0_compare(count + 1000);
\r
1429 +extern void (*board_time_init)(void);
\r
1431 +static void __init
\r
1432 +ar531x_time_init(void)
\r
1434 + mips_hpt_frequency = ar531x_cpu_frequency() / 2;
\r
1438 +ar531x_setup(void)
\r
1440 + /* Clear any lingering AHB errors */
\r
1441 + sysRegRead(AR531X_PROCADDR);
\r
1442 + sysRegRead(AR531X_DMAADDR);
\r
1444 + sysRegWrite(AR531X_WD_CTRL, AR531X_WD_CTRL_IGNORE_EXPIRATION);
\r
1446 + /* Disable data watchpoints */
\r
1447 + write_c0_watchlo0(0);
\r
1449 + board_time_init = ar531x_time_init;
\r
1450 + board_timer_setup = ar531x_timer_setup;
\r
1452 + _machine_restart = ar531x_restart;
\r
1453 + _machine_halt = ar531x_halt;
\r
1454 + _machine_power_off = ar531x_power_off;
\r
1459 diff -urN linux-2.4.32/arch/mips/ar531x/Makefile linux-2.4.32.new/arch/mips/ar531x/Makefile
\r
1460 --- linux-2.4.32/arch/mips/ar531x/Makefile 1970-01-01 01:00:00.000000000 +0100
\r
1461 +++ linux-2.4.32.new/arch/mips/ar531x/Makefile 2005-12-24 20:29:42.010325312 +0000
\r
1464 +# This file is subject to the terms and conditions of the GNU General Public
\r
1465 +# License. See the file "COPYING" in the main directory of this archive
\r
1466 +# for more details.
\r
1468 +# Copyright © 2003 Atheros Communications, Inc., All Rights Reserved.
\r
1471 +# Makefile for Atheros ar531x boards
\r
1473 +# Note! Dependencies are done automagically by 'make dep', which also
\r
1474 +# removes any old dependencies. DON'T put your own dependencies here
\r
1475 +# unless it's something special (ie not a .c file).
\r
1479 + $(CPP) $(CFLAGS) $< -o $*.s
\r
1481 + $(CC) $(CFLAGS) -D__ASSEMBLY__ -c $< -o $*.o
\r
1483 +O_TARGET:= ar531x.o
\r
1485 +export-objs = ar531xksyms.o
\r
1487 +obj-y := ar531xdbg_io.o \
\r
1495 +include $(TOPDIR)/Rules.make
\r
1496 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/backup-busybox.links linux-2.4.32.new/arch/mips/ar531x/RAMDISK/backup-busybox.links
\r
1497 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/backup-busybox.links 1970-01-01 01:00:00.000000000 +0100
\r
1498 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/backup-busybox.links 2005-12-24 20:29:42.011325160 +0000
\r
1533 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/busybox.links linux-2.4.32.new/arch/mips/ar531x/RAMDISK/busybox.links
\r
1534 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/busybox.links 1970-01-01 01:00:00.000000000 +0100
\r
1535 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/busybox.links 2005-12-24 20:29:42.011325160 +0000
\r
1570 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/Makefile linux-2.4.32.new/arch/mips/ar531x/RAMDISK/Makefile
\r
1571 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/Makefile 1970-01-01 01:00:00.000000000 +0100
\r
1572 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/Makefile 2005-12-24 20:29:42.011325160 +0000
\r
1574 +KERNEL_SOURCE=../../../..
\r
1576 +# The value for INITRDSIZE is extracted from linux/.config,
\r
1577 +# if it exists; otherwise, a default value is used.
\r
1579 +CONFIG_FILE = $(KERNEL_SOURCE)/.config
\r
1581 +ifeq ($(CONFIG_FILE),$(wildcard $(CONFIG_FILE)))
\r
1583 +include $(CONFIG_FILE)
\r
1584 +ifdef CONFIG_BLK_DEV_RAM_SIZE
\r
1585 +INITRDSIZE := $(shell echo $(CONFIG_BLK_DEV_RAM_SIZE))
\r
1587 +INITRDSIZE := 8192
\r
1591 +INITRDSIZE := 8192
\r
1594 +MOUNTPT = /mnt/xtmp
\r
1596 +ramdisk.gz: ramdisk
\r
1601 + @echo "CREATING RAMDISK OF SIZE $(INITRDSIZE) on $@"
\r
1602 + dd if=/dev/zero of=$@ bs=1k count=$(INITRDSIZE)
\r
1603 + /sbin/mke2fs -vFm0 $@ $(INITRDSIZE)
\r
1604 + if [ \! -e $(MOUNTPT) ]; then mkdir -p $(MOUNTPT) ; fi
\r
1605 + mount -o loop $@ $(MOUNTPT)
\r
1607 + (cd rootdir; tar cf - . ) | (cd $(MOUNTPT) && tar xf - )
\r
1608 + (cd $(MOUNTPT) ; chown -R root.root . )
\r
1610 + umount $(MOUNTPT)
\r
1613 + @(if [ -d $(KERNEL_SOURCE)/arch/mips/ramdisk ]; \
\r
1615 + if [ -f ramdisk.gz ]; \
\r
1617 + cp ramdisk.gz $(KERNEL_SOURCE)/arch/mips/ramdisk/; \
\r
1619 + echo "No ramdisk.gz image"; \
\r
1622 + echo "No ramdisk directory. Check KERNEL_SOURCE variable."; \
\r
1626 + rm -f ramdisk.gz ramdisk
\r
1627 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/makelinks linux-2.4.32.new/arch/mips/ar531x/RAMDISK/makelinks
\r
1628 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/makelinks 1970-01-01 01:00:00.000000000 +0100
\r
1629 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/makelinks 2005-12-24 20:29:42.012325008 +0000
\r
1633 +if [ -f busybox.links ]
\r
1635 + cat busybox.links | sed 's/\//ln -s -f \/bin\/busybox rootdir\//' | /bin/sh
\r
1638 +cons=" root tty 622"
\r
1639 +disk=" root disk 660"
\r
1640 +mtd=" root root 640"
\r
1641 +makedev () { # usage: makedev name [bcu] major minor owner group mode
\r
1643 + then if [ "$opt_d" ]
\r
1644 + then echo "rm -f $1"
\r
1645 + else echo "$1 = $2 $3 $4 $5:$6 $7"
\r
1648 + [ ! "$opt_n" ] && rm -f $1 &&
\r
1649 + [ ! "$opt_d" ] && mknod $1 $2 $3 $4 &&
\r
1650 + chown $5:$6 $1 &&
\r
1654 +makedev rootdir/dev/console c 5 1 $cons
\r
1655 +makedev rootdir/dev/ram b 1 1 $disk
\r
1656 +makedev rootdir/dev/ram0 b 1 0 $disk
\r
1657 +makedev rootdir/dev/ram1 b 1 1 $disk
\r
1658 +makedev rootdir/dev/ram2 b 1 2 $disk
\r
1659 +makedev rootdir/dev/ram3 b 1 3 $disk
\r
1660 +makedev rootdir/dev/ram4 b 1 4 $disk
\r
1661 +makedev rootdir/dev/ram5 b 1 5 $disk
\r
1662 +makedev rootdir/dev/ram6 b 1 6 $disk
\r
1663 +makedev rootdir/dev/ram7 b 1 7 $disk
\r
1664 +makedev rootdir/dev/ram8 b 1 8 $disk
\r
1665 +makedev rootdir/dev/ram9 b 1 9 $disk
\r
1666 +makedev rootdir/dev/ram10 b 1 10 $disk
\r
1667 +makedev rootdir/dev/ram11 b 1 11 $disk
\r
1668 +makedev rootdir/dev/ram12 b 1 12 $disk
\r
1669 +makedev rootdir/dev/ram13 b 1 13 $disk
\r
1670 +makedev rootdir/dev/ram14 b 1 14 $disk
\r
1671 +makedev rootdir/dev/ram15 b 1 15 $disk
\r
1673 +makedev rootdir/dev/mtd0 c 90 0 $mtd
\r
1674 +makedev rootdir/dev/mtd1 c 90 2 $mtd
\r
1675 +makedev rootdir/dev/mtd2 c 90 4 $mtd
\r
1676 +makedev rootdir/dev/mtd3 c 90 6 $mtd
\r
1677 +makedev rootdir/dev/mtd4 c 90 8 $mtd
\r
1678 +makedev rootdir/dev/mtd5 c 90 10 $mtd
\r
1679 +makedev rootdir/dev/mtd6 c 90 12 $mtd
\r
1680 +makedev rootdir/dev/mtdblock0 b 31 0 $mtd
\r
1681 +makedev rootdir/dev/mtdblock1 b 31 1 $mtd
\r
1682 +makedev rootdir/dev/mtdblock2 b 31 2 $mtd
\r
1683 +makedev rootdir/dev/mtdblock3 b 31 3 $mtd
\r
1684 +makedev rootdir/dev/mtdblock4 b 31 4 $mtd
\r
1685 +makedev rootdir/dev/mtdblock5 b 31 5 $mtd
\r
1686 +makedev rootdir/dev/mtdblock6 b 31 6 $mtd
\r
1687 +makedev rootdir/dev/mtdr0 c 90 1 $mtd
\r
1688 +makedev rootdir/dev/mtdr1 c 90 3 $mtd
\r
1689 +makedev rootdir/dev/mtdr2 c 90 5 $mtd
\r
1690 +makedev rootdir/dev/mtdr3 c 90 7 $mtd
\r
1691 +makedev rootdir/dev/mtdr4 c 90 9 $mtd
\r
1692 +makedev rootdir/dev/mtdr5 c 90 11 $mtd
\r
1693 +makedev rootdir/dev/mtdr6 c 90 13 $mtd
\r
1695 +cd rootdir/dev;ln -sf ram1 ram
\r
1696 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/README linux-2.4.32.new/arch/mips/ar531x/RAMDISK/README
\r
1697 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/README 1970-01-01 01:00:00.000000000 +0100
\r
1698 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/README 2005-12-24 20:29:42.011325160 +0000
\r
1700 +How to build a ramdisk image for use as a root filesystem with AR531X
\r
1703 +In order to boot from a ramdisk root file system image, you will
\r
1704 +first create a root directory structure in the "rootdir" directory.
\r
1705 +Then run "make" to create a compressed root file system image in
\r
1706 +ramdisk.gz. Finally, copy this image into your kernel source tree
\r
1707 +and remake the kernel. The ramdisk image is then built into the
\r
1708 +kernel. When the kernel starts, it is uncompressed into RAM, and
\r
1709 +used as a root file system.
\r
1711 +If you'd like to use a pre-built ramdisk.gz rather than build
\r
1713 + cp arch/mips/ar531x/RAMDISK/ramdisk.gz arch/mips/ramdisk/ramdisk.gz
\r
1715 +Here are the detailed steps to build your own:
\r
1717 +1) Modify Makefile to point KERNEL_SOURCE at your linux source tree.
\r
1719 +2) Copy whatever additional files/directories/links you'd like to
\r
1720 + under rootdir. Note that you're limited to CONFIG_BLK_DEV_RAM_SIZE
\r
1721 + 1KB blocks, as specified in your linux/.config file.
\r
1723 + Copy busybox to rootdir/bin/
\r
1724 + [NOTE: Copy busybox.links to this directory to
\r
1725 + cause the makelinks script to automatically
\r
1726 + set up all of the necessary busybox command links
\r
1727 + in the rootdir/bin directory].
\r
1729 + Copy any wireless driver modules into rootdir tree
\r
1731 + You might want to make a copy of the rootdir directory
\r
1732 + before you modify it, just in case you want to get back
\r
1733 + to the original.
\r
1735 +3) LOGIN AS ROOT (e.g. "su") and type "make"
\r
1737 +4) Copy the resulting ramdisk.gz to your linux source tree under
\r
1738 + arch/mips/ramdisk/ramdisk.gz
\r
1739 + (or "make install" will do this step for you)
\r
1740 Binary files linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/bin/busybox and linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/bin/busybox differ
\r
1741 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/fstab linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/fstab
\r
1742 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/fstab 1970-01-01 01:00:00.000000000 +0100
\r
1743 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/fstab 2005-12-24 20:29:42.063317256 +0000
\r
1745 +/proc /proc proc defaults 0 0
\r
1746 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/group linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/group
\r
1747 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/group 1970-01-01 01:00:00.000000000 +0100
\r
1748 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/group 2005-12-24 20:29:42.064317104 +0000
\r
1752 +bin:x:1:bin,daemon
\r
1753 +daemon:x:2:bin,daemon
\r
1755 +adm:x:4:adm,daemon
\r
1768 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/host.conf linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/host.conf
\r
1769 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/host.conf 1970-01-01 01:00:00.000000000 +0100
\r
1770 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/host.conf 2005-12-24 20:29:42.064317104 +0000
\r
1774 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/inittab linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/inittab
\r
1775 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/inittab 1970-01-01 01:00:00.000000000 +0100
\r
1776 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/inittab 2005-12-24 20:29:42.064317104 +0000
\r
1778 +::sysinit:/etc/rc.d/rcS
\r
1779 +::respawn:/bin/sh
\r
1780 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/nsswitch.conf linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/nsswitch.conf
\r
1781 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/nsswitch.conf 1970-01-01 01:00:00.000000000 +0100
\r
1782 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/nsswitch.conf 2005-12-24 20:29:42.065316952 +0000
\r
1784 +# /etc/nsswitch.conf
\r
1786 +# Name Service Switch configuration file.
\r
1794 +networks: files dns
\r
1800 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/passwd linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/passwd
\r
1801 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/passwd 1970-01-01 01:00:00.000000000 +0100
\r
1802 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/passwd 2005-12-24 20:29:42.065316952 +0000
\r
1804 +root:x:0:0:root:/root:/bin/ash
\r
1805 +bin:x:1:1:bin:/bin:/bin/sh
\r
1806 +daemon:x:2:2:daemon:/usr/sbin:/bin/sh
\r
1807 +adm:x:3:4:adm:/adm:/bin/sh
\r
1808 +lp:x:4:7:lp:/var/spool/lpd:/bin/sh
\r
1809 +sync:x:5:0:sync:/bin:/bin/sync
\r
1810 +shutdown:x:6:11:shutdown:/sbin:/sbin/shutdown
\r
1811 +halt:x:7:0:halt:/sbin:/sbin/halt
\r
1812 +uucp:x:10:14:uucp:/var/spool/uucp:/bin/sh
\r
1813 +operator:x:11:0:Operator:/var:/bin/sh
\r
1814 +nobody:x:65534:65534:nobody:/home:/bin/sh
\r
1815 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/rc.d/rcS linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/rc.d/rcS
\r
1816 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/rc.d/rcS 1970-01-01 01:00:00.000000000 +0100
\r
1817 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/rc.d/rcS 2005-12-24 20:29:42.066316800 +0000
\r
1822 +mount -t jffs2 -o remount +w /
\r
1823 +# mount -t ramfs /dev/ram /ramdisk
\r
1825 +echo Load MADWiFi wlan module
\r
1826 +insmod ../../lib/modules/2.4.25/net/wlan.o
\r
1828 +echo Load MADWiFi Atheros HAL module
\r
1829 +insmod ../../lib/modules/2.4.25/net/ath_hal.o
\r
1831 +echo Load MADWiFi Atheros Driver module
\r
1832 +insmod ../../lib/modules/2.4.25/net/ath_lbus.o
\r
1836 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/resolv.conf linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/resolv.conf
\r
1837 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/resolv.conf 1970-01-01 01:00:00.000000000 +0100
\r
1838 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/resolv.conf 2005-12-24 20:29:42.066316800 +0000
\r
1840 +# /etc/resolv.conf - DNS setup file
\r
1842 +# possible entries are:
\r
1844 +# domain <domain> Local domain name. If not present, the
\r
1845 +# gethostbyname syscall is used to
\r
1846 +# determine the local domain name.
\r
1848 +# search <list_of_domains> Search list for hostname lookup.
\r
1849 +# The search list is normally determined
\r
1850 +# from the local domain name but it
\r
1851 +# can be set to a list of domains.
\r
1853 +# nameserver <ip_addr> Define which server to contact
\r
1854 +# for DNS lookups. If there are
\r
1855 +# multiple nameserver lines (Max=3),
\r
1856 +# they are queried in the listed order.
\r
1858 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/securetty linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/securetty
\r
1859 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/securetty 1970-01-01 01:00:00.000000000 +0100
\r
1860 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/securetty 2005-12-24 20:29:42.066316800 +0000
\r
1874 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/services linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/services
\r
1875 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/services 1970-01-01 01:00:00.000000000 +0100
\r
1876 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/services 2005-12-24 20:29:42.066316800 +0000
\r
1878 +# $NetBSD: services,v 1.18 1996/03/26 00:07:58 mrg Exp $
\r
1880 +# Network services, Internet style
\r
1882 +# Note that it is presently the policy of IANA to assign a single well-known
\r
1883 +# port number for both TCP and UDP; hence, most entries here have two entries
\r
1884 +# even if the protocol doesn't support UDP operations.
\r
1885 +# Updated from RFC 1340, ``Assigned Numbers'' (July 1992). Not all ports
\r
1886 +# are included, only the more common ones.
\r
1888 +# from: @(#)services 5.8 (Berkeley) 5/9/91
\r
1890 +tcpmux 1/tcp # TCP port service multiplexer
\r
1893 +discard 9/tcp sink null
\r
1894 +discard 9/udp sink null
\r
1895 +systat 11/tcp users
\r
1899 +qotd 17/tcp quote
\r
1900 +msp 18/tcp # message send protocol
\r
1901 +msp 18/udp # message send protocol
\r
1902 +chargen 19/tcp ttytst source
\r
1903 +chargen 19/udp ttytst source
\r
1904 +ftp-data 20/tcp # default ftp data port
\r
1911 +# 26 - unassigned
\r
1912 +time 37/tcp timserver
\r
1913 +time 37/udp timserver
\r
1914 +rlp 39/udp resource # resource location
\r
1915 +nameserver 42/tcp name # IEN 116
\r
1916 +whois 43/tcp nicname
\r
1917 +domain 53/tcp nameserver # name-domain server
\r
1918 +domain 53/udp nameserver
\r
1919 +mtp 57/tcp # deprecated
\r
1920 +bootps 67/tcp # BOOTP server
\r
1922 +bootpc 68/tcp # BOOTP client
\r
1925 +gopher 70/tcp # Internet Gopher
\r
1927 +rje 77/tcp netrjs
\r
1929 +www 80/tcp http # WorldWideWeb HTTP
\r
1930 +www 80/udp # HyperText Transfer Protocol
\r
1931 +link 87/tcp ttylink
\r
1932 +kerberos 88/tcp krb5 # Kerberos v5
\r
1936 +hostnames 101/tcp hostname # usually from sri-nic
\r
1937 +iso-tsap 102/tcp tsap # part of ISODE.
\r
1938 +csnet-ns 105/tcp cso-ns # also used by CSO name server
\r
1939 +csnet-ns 105/udp cso-ns
\r
1940 +rtelnet 107/tcp # Remote Telnet
\r
1942 +pop2 109/tcp pop-2 postoffice # POP version 2
\r
1944 +pop3 110/tcp pop-3 # POP version 3
\r
1948 +auth 113/tcp authentication tap ident
\r
1950 +uucp-path 117/tcp
\r
1951 +nntp 119/tcp readnews untp # USENET News Transfer Protocol
\r
1953 +ntp 123/udp # Network Time Protocol
\r
1954 +netbios-ns 137/tcp # NETBIOS Name Service
\r
1955 +netbios-ns 137/udp
\r
1956 +netbios-dgm 138/tcp # NETBIOS Datagram Service
\r
1957 +netbios-dgm 138/udp
\r
1958 +netbios-ssn 139/tcp # NETBIOS session service
\r
1959 +netbios-ssn 139/udp
\r
1960 +imap2 143/tcp imap # Interim Mail Access Proto v2
\r
1962 +snmp 161/udp # Simple Net Mgmt Proto
\r
1963 +snmp-trap 162/udp snmptrap # Traps for SNMP
\r
1964 +cmip-man 163/tcp # ISO mgmt over IP (CMOT)
\r
1966 +cmip-agent 164/tcp
\r
1967 +cmip-agent 164/udp
\r
1968 +xdmcp 177/tcp # X Display Mgr. Control Proto
\r
1970 +nextstep 178/tcp NeXTStep NextStep # NeXTStep window
\r
1971 +nextstep 178/udp NeXTStep NextStep # server
\r
1972 +bgp 179/tcp # Border Gateway Proto.
\r
1974 +prospero 191/tcp # Cliff Neuman's Prospero
\r
1976 +irc 194/tcp # Internet Relay Chat
\r
1978 +smux 199/tcp # SNMP Unix Multiplexer
\r
1980 +at-rtmp 201/tcp # AppleTalk routing
\r
1982 +at-nbp 202/tcp # AppleTalk name binding
\r
1984 +at-echo 204/tcp # AppleTalk echo
\r
1986 +at-zis 206/tcp # AppleTalk zone information
\r
1988 +z3950 210/tcp wais # NISO Z39.50 database
\r
1989 +z3950 210/udp wais
\r
1990 +ipx 213/tcp # IPX
\r
1992 +imap3 220/tcp # Interactive Mail Access
\r
1993 +imap3 220/udp # Protocol v3
\r
1994 +ulistserv 372/tcp # UNIX Listserv
\r
1995 +ulistserv 372/udp
\r
1997 +# UNIX specific services
\r
2000 +biff 512/udp comsat
\r
2003 +shell 514/tcp cmd # no passwords used
\r
2005 +printer 515/tcp spooler # line printer spooler
\r
2008 +route 520/udp router routed # RIP
\r
2009 +timed 525/udp timeserver
\r
2010 +tempo 526/tcp newdate
\r
2011 +courier 530/tcp rpc
\r
2012 +conference 531/tcp chat
\r
2013 +netnews 532/tcp readnews
\r
2014 +netwall 533/udp # -for emergency broadcasts
\r
2015 +uucp 540/tcp uucpd # uucp daemon
\r
2016 +remotefs 556/tcp rfs_server rfs # Brunhoff remote filesystem
\r
2018 +webster 765/tcp # Network dictionary
\r
2020 +# temporary entry (not officially registered by the Samba Team!)
\r
2021 +swat 901/tcp # Samba Web Administration Tool
\r
2023 +# From ``Assigned Numbers'':
\r
2025 +#> The Registered Ports are not controlled by the IANA and on most systems
\r
2026 +#> can be used by ordinary user processes or programs executed by ordinary
\r
2029 +#> Ports are used in the TCP [45,106] to name the ends of logical
\r
2030 +#> connections which carry long term conversations. For the purpose of
\r
2031 +#> providing services to unknown callers, a service contact port is
\r
2032 +#> defined. This list specifies the port used by the server process as its
\r
2033 +#> contact port. While the IANA can not control uses of these ports it
\r
2034 +#> does register or list uses of these ports as a convienence to the
\r
2037 +ingreslock 1524/tcp
\r
2038 +ingreslock 1524/udp
\r
2039 +prospero-np 1525/tcp # Prospero non-privileged
\r
2040 +prospero-np 1525/udp
\r
2041 +rfe 5002/tcp # Radio Free Ethernet
\r
2042 +rfe 5002/udp # Actually uses UDP only
\r
2045 +# Kerberos (Project Athena/MIT) services
\r
2046 +# Note that these are for Kerberos v4, and are unofficial.
\r
2048 +klogin 543/tcp # Kerberos `rlogin'
\r
2049 +kshell 544/tcp krcmd # Kerberos `rsh'
\r
2050 +kerberos-adm 749/tcp # Kerberos `kadmin' (v5)
\r
2051 +kerberos4 750/udp kdc # Kerberos (server) udp
\r
2052 +kerberos4 750/tcp kdc # Kerberos (server) tcp
\r
2053 +kerberos-master 751/udp # Kerberos admin server udp
\r
2054 +kerberos-master 751/tcp # Kerberos admin server tcp
\r
2055 +krbupdate 760/tcp kreg # BSD Kerberos registration
\r
2056 +kpasswd 761/tcp kpwd # BSD Kerberos `passwd'
\r
2057 +eklogin 2105/tcp # Kerberos encrypted `rlogin'
\r
2059 +# Unofficial but necessary (for NetBSD) services
\r
2061 +supfilesrv 871/tcp # SUP server
\r
2062 +supfiledbg 1127/tcp # SUP debugging
\r
2064 +# AppleTalk DDP entries (DDP: Datagram Delivery Protocol)
\r
2066 +rtmp 1/ddp # Routing Table Maintenance Protocol
\r
2067 +nbp 2/ddp # Name Binding Protocol
\r
2068 +echo 4/ddp # AppleTalk Echo Protocol
\r
2069 +zip 6/ddp # Zone Information Protocol
\r
2071 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/shadow linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/shadow
\r
2072 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/etc/shadow 1970-01-01 01:00:00.000000000 +0100
\r
2073 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/etc/shadow 2005-12-24 20:29:42.067316648 +0000
\r
2075 +root::10933:0:99999:7:::
\r
2076 +bin:*:10933:0:99999:7:::
\r
2077 +daemon:*:10933:0:99999:7:::
\r
2078 +adm:*:10933:0:99999:7:::
\r
2079 +lp:*:10933:0:99999:7:::
\r
2080 +sync:*:10933:0:99999:7:::
\r
2081 +shutdown:*:10933:0:99999:7:::
\r
2082 +halt:*:10933:0:99999:7:::
\r
2083 +uucp:*:10933:0:99999:7:::
\r
2084 +operator:*:10933:0:99999:7:::
\r
2085 +nobody:*:10933:0:99999:7:::
\r
2086 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.generic_string linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.generic_string
\r
2087 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.generic_string 1970-01-01 01:00:00.000000000 +0100
\r
2088 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.generic_string 2005-12-24 20:29:42.071316040 +0000
\r
2090 +# module id=string
\r
2091 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.ieee1394map linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.ieee1394map
\r
2092 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.ieee1394map 1970-01-01 01:00:00.000000000 +0100
\r
2093 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.ieee1394map 2005-12-24 20:29:42.071316040 +0000
\r
2095 +# ieee1394 module match_flags vendor_id model_id specifier_id version
\r
2096 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.isapnpmap linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.isapnpmap
\r
2097 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.isapnpmap 1970-01-01 01:00:00.000000000 +0100
\r
2098 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.isapnpmap 2005-12-24 20:29:42.079314824 +0000
\r
2100 +# isapnp module cardvendor carddevice driver_data vendor function ...
\r
2101 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.parportmap linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.parportmap
\r
2102 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.parportmap 1970-01-01 01:00:00.000000000 +0100
\r
2103 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.parportmap 2005-12-24 20:29:42.079314824 +0000
\r
2106 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pcimap linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pcimap
\r
2107 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pcimap 1970-01-01 01:00:00.000000000 +0100
\r
2108 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pcimap 2005-12-24 20:29:42.080314672 +0000
\r
2110 +# pci module vendor device subvendor subdevice class class_mask driver_data
\r
2111 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pnpbiosmap linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pnpbiosmap
\r
2112 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pnpbiosmap 1970-01-01 01:00:00.000000000 +0100
\r
2113 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.pnpbiosmap 2005-12-24 20:29:42.080314672 +0000
\r
2116 diff -urN linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.usbmap linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.usbmap
\r
2117 --- linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.usbmap 1970-01-01 01:00:00.000000000 +0100
\r
2118 +++ linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/lib/modules/2.4.25/modules.usbmap 2005-12-24 20:29:42.080314672 +0000
\r
2120 +# usb module match_flags idVendor idProduct bcdDevice_lo bcdDevice_hi bDeviceClass bDeviceSubClass bDeviceProtocol bInterfaceClass bInterfaceSubClass bInterfaceProtocol driver_info
\r
2121 Binary files linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/sbin/iwconfig and linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/sbin/iwconfig differ
\r
2122 Binary files linux-2.4.32/arch/mips/ar531x/RAMDISK/rootdir/sbin/iwpriv and linux-2.4.32.new/arch/mips/ar531x/RAMDISK/rootdir/sbin/iwpriv differ
\r
2123 diff -urN linux-2.4.32/arch/mips/ar531x/README linux-2.4.32.new/arch/mips/ar531x/README
\r
2124 --- linux-2.4.32/arch/mips/ar531x/README 1970-01-01 01:00:00.000000000 +0100
\r
2125 +++ linux-2.4.32.new/arch/mips/ar531x/README 2005-12-24 20:29:42.101311480 +0000
\r
2127 +Basic information for the AR531X Board Support Package
\r
2129 +This directory contains the "LBSP" -- Linux Board Support Package --
\r
2130 +for Linux on the Atheros AR531X Wireless System-On-a-Chip. It is intended
\r
2131 +primarily as a building block for wireless products. At this time, the
\r
2132 +AR531X Linux BSP is experimental code, and is actively UNDER CONSTRUCTION.
\r
2134 +Some components that are supported by this LBSP along with a standard 2.4
\r
2135 +Linux MIPS kernel include
\r
2137 + instruction and data caches
\r
2139 + flash (Macronix, AMD, STS, etc.)
\r
2140 + 16550 serial port
\r
2142 + ethernet PHY or PHY Switch (RealTek, Kendin, Marvell)
\r
2143 + General-Purpose I/O pins
\r
2144 + kernel debugging with kgdb
\r
2146 +This LBSP code does NOT include drivers for the wireless components of the
\r
2147 +chip/boards! Drivers for those components may be distributed separately.
\r
2148 +In particular, the MADWiFi project under SourceForge supports (not yet!)
\r
2149 +wireless functions on the AR531X chipset. See
\r
2150 + http://www.sourceforge.net/projects/madwifi
\r
2152 +Files included in this BSP:
\r
2153 +ae531xlnx.c - Linux-specific portions of the ethernet driver
\r
2154 +ae531xmac.c - OS-independent AR531X ethernet MAC code
\r
2155 +ae531xmac.h - OS-independent AR531X ethernet MAC software definitions
\r
2156 +ae531xreg.h - OS-independent AR531X ethernet MAC hardware definitions
\r
2157 +ar531x.h - OS-independent AR531X system hardware definitions
\r
2158 +ar531xlnx.h - Linux-specific AR531X system definitions and externs
\r
2159 +defconfig-ar531x - Default Linux configuration file
\r
2160 +intr_recv.S - Linux interrupt "glue" code
\r
2161 +ar531xirq.c - Linux Interrupt Request management
\r
2162 +Makefile - Linux makefile
\r
2163 +mvPhy.c - OS-independent ethernet PHY code for Marvell Switch
\r
2164 +mvPhy.h - OS-independent ethernet PHY definitions for Marvell Switch
\r
2165 +ar531xprom.c - Linux prom "glue" code
\r
2166 +ar531xsetup.c - Linux startup code
\r
2167 +ar531xdbg_io.c - Support for kgdb-based debugging and for EARLY_PRINTK_HACK
\r
2168 +ar531xproc.c - Pseudo-device driver for /proc/ar531x device
\r
2169 +ar531xgpio.c - Support for General Purpose I/O pins
\r
2170 +ar531xwmacsl.c - Wireless MAC Support Layer
\r
2172 +Additional files, distributed with the BSP:
\r
2173 +README - This file
\r
2174 +README.BUILD - Instructions for building a linux kernel from source
\r
2175 +README.EXECUTE - Instructions for testing your linux kernel
\r
2176 +README.RAMDISK - Instructions for building a root ramdisk image
\r
2178 +ramdisk.gz - A binary ramdisk image, suitable for use with AR531X.
\r
2179 +DIFFS - Directory that contains "patch" files (See README.BUILD)
\r
2182 +There are several ways to boot a vmlinux image on an AR531X board:
\r
2183 + -You can boot in over ethernet from the vxWorks bootrom, which is preloaded
\r
2184 + on all Atheros boards
\r
2185 + -You can use an ICE (e.g. VisionICE) to load the vmlinux image. You will
\r
2186 + need appropriate register initialization (e.g. AP30.ini file)
\r
2187 + -You can use the eCos RedBoot bootrom loader. This is a full-featured
\r
2188 + bootrom which as been ported to AR531x. It can boot vmlinux over ethernet
\r
2189 + or from flash. Source code is available from Atheros.
\r
2191 +Please send comments, corrections, complaints, criticisms, suggestions,
\r
2192 +enhancements, requests, or any other reasonable communications regarding
\r
2193 +this effort, to "linux@atheros.com". Your email will be received by a
\r
2194 +couple of engineers, and redirected as appropriate.
\r
2195 diff -urN linux-2.4.32/arch/mips/ar531x/README.BUILD linux-2.4.32.new/arch/mips/ar531x/README.BUILD
\r
2196 --- linux-2.4.32/arch/mips/ar531x/README.BUILD 1970-01-01 01:00:00.000000000 +0100
\r
2197 +++ linux-2.4.32.new/arch/mips/ar531x/README.BUILD 2005-12-24 20:29:42.101311480 +0000
\r
2199 + How to BUILD a linux kernel for an AR531X system
\r
2201 +It is expected that you will build Linux on an existing Linux system, which
\r
2202 +has all of the standard Linux tools.
\r
2204 +01) Obtain a MIPS BigEndian ELF gcc-compatible toolchain. For example,
\r
2205 + if you're cross-compiling on a x86 Linux system, you could use:
\r
2206 + ftp://ftp.mips.com/pub/tools/software/sde-for-linux/sdelinux-5.01-4eb.i386.rpm
\r
2208 +02) Obtain the latest working MIPS Linux kernel
\r
2209 + cvs -d :pserver:cvs@ftp.linux-mips.org:/home/cvs login (password "cvs")
\r
2210 + cvs -d :pserver:cvs@ftp.linux-mips.org:/home/cvs co -r linux_2_4 linux
\r
2212 + Now "cd linux". The remainder of these instructions assume
\r
2213 + that you are in the linux directory.
\r
2215 +03) Place the contents of this directory at arch/mips/ar531x.
\r
2217 +04) Use the patch command to patch generic linux files according
\r
2218 + to the DIFFS directory
\r
2219 + for i in arch/mips/ar531x/DIFFS/*.diff
\r
2223 + NOTE: This version of the AR531X Linux BSP was tested with
\r
2224 + MIPS Linux 2.4.22 as of 11/14/03. If you use a different
\r
2225 + (e.g. more recent) version of Linux source, you may need to
\r
2226 + resolve some minor patch and compilation issues.
\r
2228 +05) Set up a RAMDISK image.
\r
2229 + See the instructions in README.RAMDISK.
\r
2231 +06) Set up a linux configuration using ar531x/defconfig-ar531x.
\r
2232 + cp arch/mips/ar531x/defconfig-ar531x .config
\r
2233 + make oldconfig (answer all questions that are asked)
\r
2234 + NOTE: For development/debug purposes, you may want to
\r
2235 + enable CONFIG_RUNTIME_DEBUG and CONFIG_KGDB.
\r
2237 +07) Make dependencies.
\r
2240 +08) Build the linux kernel
\r
2243 +09) The linux image you just built is in vmlinux.
\r
2244 + See instructions in README.EXECUTE to run your vmlinux
\r
2245 + image on an AP531X-based board.
\r
2246 diff -urN linux-2.4.32/arch/mips/ar531x/README.EXECUTE linux-2.4.32.new/arch/mips/ar531x/README.EXECUTE
\r
2247 --- linux-2.4.32/arch/mips/ar531x/README.EXECUTE 1970-01-01 01:00:00.000000000 +0100
\r
2248 +++ linux-2.4.32.new/arch/mips/ar531x/README.EXECUTE 2005-12-24 20:29:42.101311480 +0000
\r
2250 + How to EXECUTE a linux image on an AR531X system
\r
2252 +There are currently three ways to run you vmlinux image:
\r
2253 + 1) Load it using the vxWorks bootrom that is supplied with the board.
\r
2254 + You can load it over ethernet or from the TFFS file system, if you
\r
2255 + have sufficient flash to store the image.
\r
2256 + 2) Load it using an ICE (e.g. VisionICE).
\r
2257 + 3) Use a bootrom loader, such as eCos RedBoot.
\r
2259 +After you have booted linux:
\r
2260 + By default, the root filesystem on ramdisk is read-only.
\r
2261 + To make it writable, use "mount -o remount w /".
\r
2263 + The user-level commands are slightly non-standard, as they
\r
2264 + are based on "busybox".
\r
2266 + The "wget" command is included. You can use wget to fetch
\r
2267 + files from any ftp server. So, for instance, you can fetch
\r
2268 + a kernel module and then "insmod" it.
\r
2270 +Note that the standard source-level kernel debugger, kgdb, works well
\r
2271 +over the serial line with this port. We use kgdb and the kgdb_demux perl
\r
2272 +script -- available over the www -- for debugging.
\r
2273 diff -urN linux-2.4.32/arch/mips/ar531x/README.VERSION linux-2.4.32.new/arch/mips/ar531x/README.VERSION
\r
2274 --- linux-2.4.32/arch/mips/ar531x/README.VERSION 1970-01-01 01:00:00.000000000 +0100
\r
2275 +++ linux-2.4.32.new/arch/mips/ar531x/README.VERSION 2005-12-24 20:29:42.101311480 +0000
\r
2277 +Source release last modified: 12/16/03
\r
2278 diff -urN linux-2.4.32/arch/mips/config-shared.in linux-2.4.32.new/arch/mips/config-shared.in
\r
2279 --- linux-2.4.32/arch/mips/config-shared.in 2005-12-24 16:11:21.000000000 +0000
\r
2280 +++ linux-2.4.32.new/arch/mips/config-shared.in 2005-12-24 21:33:42.804435856 +0000
\r
2282 dep_bool 'Support for Alchemy PB1000 board' CONFIG_MIPS_PB1000 $CONFIG_MIPS32
\r
2283 dep_bool 'Support for Alchemy PB1100 board' CONFIG_MIPS_PB1100 $CONFIG_MIPS32
\r
2284 dep_bool 'Support for Alchemy PB1500 board' CONFIG_MIPS_PB1500 $CONFIG_MIPS32
\r
2285 +dep_bool 'Support for Atheros AR5312/AR2312 WiSoC (EXPERIMENTAL)' CONFIG_AR531X $CONFIG_AR531X $CONFIG_EXPERIMENTAL
\r
2286 dep_bool 'Support for Alchemy PB1550 board' CONFIG_MIPS_PB1550 $CONFIG_MIPS32
\r
2287 dep_bool 'Support for Alchemy PB1200 board' CONFIG_MIPS_PB1200 $CONFIG_MIPS32
\r
2288 dep_bool 'Support for Alchemy Hydrogen3 board' CONFIG_MIPS_HYDROGEN3 $CONFIG_MIPS32
\r
2289 @@ -196,7 +197,7 @@
\r
2290 bool ' Support for ZBbus profiling' CONFIG_SIBYTE_TBPROF
\r
2292 if [ "$CONFIG_SIBYTE_SWARM" = "y" -o \
\r
2293 - "$CONFIG_SIBYTE_LITTLESUR" = "y" -o \
\r
2294 +O5B "$CONFIG_SIBYTE_LITTLESUR" = "y" -o \
\r
2295 "$CONFIG_SIBYTE_PTSWARM" = "y" -o \
\r
2296 "$CONFIG_SIBYTE_CARMEL" = "y" ]; then
\r
2297 define_bool CONFIG_SIBYTE_GENBUS_IDE y
\r
2298 @@ -239,6 +240,43 @@
\r
2299 define_bool CONFIG_NONCOHERENT_IO y
\r
2300 define_bool CONFIG_PC_KEYB y
\r
2302 +if [ "$CONFIG_AR531X" = "y" ]; then
\r
2303 + define_bool CONFIG_IRQ_CPU y
\r
2304 + define_bool CONFIG_CPU_VR4100 y
\r
2305 + define_bool CONFIG_SERIAL y
\r
2306 + define_bool CONFIG_NEW_IRQ y
\r
2307 + define_bool CONFIG_NEW_TIME_C y
\r
2308 + define_bool CONFIG_AR5312
\r
2309 + define_bool CONFIG_NONCOHERENT_IO y
\r
2310 + bool 'Enable early printk hack' CONFIG_EARLY_PRINTK_HACK
\r
2311 + define_bool CONFIG_SCSI n
\r
2312 + mainmenu_option next_comment
\r
2313 + comment 'Board selection'
\r
2314 + choice 'Board type' \
\r
2315 + "UNKNOWN CONFIG_APUNKNOWN \
\r
2316 + AP30 CONFIG_AP30 \
\r
2317 + AP31 CONFIG_AP31 \
\r
2318 + AP33 CONFIG_AP33 \
\r
2319 + AP38 CONFIG_AP38 \
\r
2320 + AP43 CONFIG_AP43 \
\r
2321 + AP48 CONFIG_AP48" AP30
\r
2322 + if [ "$CONFIG_AP30" = "y" ]; then
\r
2323 + define_int CONFIG_MTD_PHYSMAP_BUSWIDTH 2
\r
2325 + if [ "$CONFIG_AP33" = "y" ]; then
\r
2326 + define_int CONFIG_MTD_PHYSMAP_BUSWIDTH 1
\r
2328 + if [ "$CONFIG_AP38" = "y" ]; then
\r
2329 + define_int CONFIG_MTD_PHYSMAP_BUSWIDTH 1
\r
2331 + if [ "$CONFIG_AP43" = "y" ]; then
\r
2332 + define_int CONFIG_MTD_PHYSMAP_BUSWIDTH 1
\r
2334 + if [ "$CONFIG_AP48" = "y" ]; then
\r
2335 + define_int CONFIG_MTD_PHYSMAP_BUSWIDTH 1
\r
2339 if [ "$CONFIG_CASIO_E55" = "y" ]; then
\r
2340 define_bool CONFIG_IRQ_CPU y
\r
2341 define_bool CONFIG_NONCOHERENT_IO y
\r
2342 diff -urN linux-2.4.32/arch/mips/kernel/setup.c linux-2.4.32.new/arch/mips/kernel/setup.c
\r
2343 --- linux-2.4.32/arch/mips/kernel/setup.c 2005-12-24 16:08:53.000000000 +0000
\r
2344 +++ linux-2.4.32.new/arch/mips/kernel/setup.c 2005-12-24 21:28:51.779678344 +0000
\r
2345 @@ -494,6 +494,7 @@
\r
2346 void hp_setup(void);
\r
2347 void au1x00_setup(void);
\r
2348 void frame_info_init(void);
\r
2349 + void ar531x_setup(void);
\r
2351 frame_info_init();
\r
2352 #if defined(CONFIG_BLK_DEV_FD) || defined(CONFIG_BLK_DEV_FD_MODULE)
\r
2353 @@ -691,6 +692,12 @@
\r
2354 pmc_yosemite_setup();
\r
2358 +#ifdef CONFIG_AR531X
\r
2359 + case MACH_GROUP_AR531X:
\r
2364 panic("Unsupported architecture");
\r
2366 diff -urN linux-2.4.32/arch/mips/Makefile linux-2.4.32.new/arch/mips/Makefile
\r
2367 --- linux-2.4.32/arch/mips/Makefile 2005-12-24 16:09:51.000000000 +0000
\r
2368 +++ linux-2.4.32.new/arch/mips/Makefile 2005-12-24 21:28:51.780678192 +0000
\r
2369 @@ -725,6 +725,12 @@
\r
2370 LOADADDR += 0x80020000
\r
2373 +ifdef CONFIG_AR531X
\r
2374 +SUBDIRS += arch/mips/ar531x
\r
2375 +LIBS += arch/mips/ar531x/ar531x.o
\r
2376 +LOADADDR += 0x80002000
\r
2380 # Choosing incompatible machines durings configuration will result in
\r
2381 # error messages during linking. Select a default linkscript if
\r
2382 diff -urN linux-2.4.32/drivers/mtd/chips/cfi_cmdset_0002.c linux-2.4.32.new/drivers/mtd/chips/cfi_cmdset_0002.c
\r
2383 --- linux-2.4.32/drivers/mtd/chips/cfi_cmdset_0002.c 2004-11-17 11:54:21.000000000 +0000
\r
2384 +++ linux-2.4.32.new/drivers/mtd/chips/cfi_cmdset_0002.c 2005-12-24 21:28:51.795675912 +0000
\r
2385 @@ -510,7 +510,7 @@
\r
2386 or tells us why it failed. */
\r
2389 - timeo = jiffies + (HZ/1000); /* setting timeout to 1ms for now */
\r
2390 + timeo = jiffies + (HZ/1000) + 1; /* setting timeout to 1ms for now */
\r
2392 oldstatus = cfi_read(map, adr);
\r
2393 status = cfi_read(map, adr);
\r
2394 @@ -535,12 +535,14 @@
\r
2395 if( (status & dq5) == dq5 ) {
\r
2396 /* When DQ5 raises, we must check once again
\r
2397 if DQ6 is toggling. If not, the erase has been
\r
2398 - completed OK. If not, reset chip. */
\r
2399 + completed OK. But if so, reset chip. */
\r
2400 oldstatus = cfi_read(map, adr);
\r
2401 status = cfi_read(map, adr);
\r
2403 if ( (oldstatus & 0x00FF) == (status & 0x00FF) ) {
\r
2405 printk(KERN_WARNING "Warning: DQ5 raised while program operation was in progress, however operation completed OK\n" );
\r
2408 /* DQ5 is active so we can do a reset and stop the erase */
\r
2409 cfi_write(map, CMD(0xF0), chip->start);
\r
2410 diff -urN linux-2.4.32/drivers/mtd/chips/jedec_probe.c linux-2.4.32.new/drivers/mtd/chips/jedec_probe.c
\r
2411 --- linux-2.4.32/drivers/mtd/chips/jedec_probe.c 2003-06-13 15:51:34.000000000 +0100
\r
2412 +++ linux-2.4.32.new/drivers/mtd/chips/jedec_probe.c 2005-12-24 21:28:51.797675608 +0000
\r
2413 @@ -900,7 +900,16 @@
\r
2414 NumEraseRegions: 1,
\r
2415 regions: {ERASEINFO(0x01000,256),
\r
2419 + mfr_id: MANUFACTURER_SST,
\r
2420 + dev_id: SST39LF160,
\r
2421 + name: "SST 39LF160",
\r
2422 + DevSize: SIZE_2MiB,
\r
2423 + CmdSet: P_ID_AMD_STD,
\r
2424 + NumEraseRegions: 1,
\r
2425 + regions: {ERASEINFO(0x01000,512),
\r
2431 diff -urN linux-2.4.32/drivers/mtd/Config.in linux-2.4.32.new/drivers/mtd/Config.in
\r
2432 --- linux-2.4.32/drivers/mtd/Config.in 2003-06-13 15:51:34.000000000 +0100
\r
2433 +++ linux-2.4.32.new/drivers/mtd/Config.in 2005-12-24 21:28:51.803674696 +0000
\r
2435 dep_tristate ' MTD partitioning support' CONFIG_MTD_PARTITIONS $CONFIG_MTD
\r
2436 dep_tristate ' MTD concatenating support' CONFIG_MTD_CONCAT $CONFIG_MTD
\r
2437 dep_tristate ' RedBoot partition table parsing' CONFIG_MTD_REDBOOT_PARTS $CONFIG_MTD_PARTITIONS
\r
2438 + if [ "$CONFIG_MTD_END_RESERVED" != "" ]; then
\r
2439 + define_int CONFIG_MTD_END_RESERVED $CONFIG_MTD_END_RESERVED
\r
2441 dep_tristate ' Command line partition table parsing' CONFIG_MTD_CMDLINE_PARTS $CONFIG_MTD_PARTITIONS
\r
2442 if [ "$CONFIG_ARM" = "y" ]; then
\r
2443 dep_tristate ' ARM Firmware Suite partition parsing' CONFIG_MTD_AFS_PARTS $CONFIG_MTD_PARTITIONS
\r
2444 diff -urN linux-2.4.32/drivers/mtd/maps/physmap.c linux-2.4.32.new/drivers/mtd/maps/physmap.c
\r
2445 --- linux-2.4.32/drivers/mtd/maps/physmap.c 2003-06-13 15:51:34.000000000 +0100
\r
2446 +++ linux-2.4.32.new/drivers/mtd/maps/physmap.c 2005-12-24 21:28:51.811673480 +0000
\r
2447 @@ -80,12 +80,18 @@
\r
2450 #ifdef CONFIG_MTD_PARTITIONS
\r
2451 -#ifdef CONFIG_MTD_CMDLINE_PARTS
\r
2452 +#if defined(CONFIG_MTD_CMDLINE_PARTS) || defined(CONFIG_MTD_REDBOOT_PARTS)
\r
2453 static struct mtd_partition *mtd_parts = 0;
\r
2454 static int mtd_parts_nb = 0;
\r
2456 static struct mtd_partition physmap_partitions[] = {
\r
2457 /* Put your own partition definitions here */
\r
2460 + size: 0x000e0000,
\r
2461 + offset: 0x000f0000,
\r
2462 + /* Allow file system to be mounted for writing */
\r
2467 @@ -138,6 +144,22 @@
\r
2469 add_mtd_device(mymtd);
\r
2470 #ifdef CONFIG_MTD_PARTITIONS
\r
2471 +#ifdef CONFIG_MTD_REDBOOT_PARTS
\r
2473 + extern int parse_redboot_partitions(struct mtd_info *master,
\r
2474 + struct mtd_partition **pparts);
\r
2476 + struct mtd_partition *rb_parts = 0;
\r
2477 + int rb_parts_nb = 0;
\r
2479 + rb_parts_nb = parse_redboot_partitions(mymtd, &rb_parts);
\r
2480 + if (rb_parts_nb > 0) {
\r
2481 + printk(KERN_NOTICE
\r
2482 + "Using redboot flash partitioning");
\r
2483 + add_mtd_partitions (mymtd, rb_parts, rb_parts_nb);
\r
2487 #ifdef CONFIG_MTD_CMDLINE_PARTS
\r
2488 mtd_parts_nb = parse_cmdline_partitions(mymtd, &mtd_parts,
\r
2490 @@ -147,7 +169,8 @@
\r
2491 "Using command line partition definition\n");
\r
2492 add_mtd_partitions (mymtd, mtd_parts, mtd_parts_nb);
\r
2496 +#if !defined(CONFIG_MTD_CMDLINE_PARTS) && !defined(CONFIG_MTD_REDBOOT_PARTS)
\r
2497 if (NUM_PARTITIONS != 0)
\r
2499 printk(KERN_NOTICE
\r
2500 diff -urN linux-2.4.32/drivers/mtd/redboot.c linux-2.4.32.new/drivers/mtd/redboot.c
\r
2501 --- linux-2.4.32/drivers/mtd/redboot.c 2001-11-09 22:01:22.000000000 +0000
\r
2502 +++ linux-2.4.32.new/drivers/mtd/redboot.c 2005-12-24 21:28:51.821671960 +0000
\r
2503 @@ -51,8 +51,14 @@
\r
2506 /* Read the start of the last erase block */
\r
2507 - ret = master->read(master, master->size - master->erasesize,
\r
2509 + u_int32_t part_table_start = master->size - master->erasesize;
\r
2510 +#if defined(CONFIG_MTD_END_RESERVED)
\r
2511 + part_table_start -= CONFIG_MTD_END_RESERVED;
\r
2513 + ret = master->read(master, part_table_start,
\r
2514 PAGE_SIZE, &retlen, (void *)buf);
\r
2519 diff -urN linux-2.4.32/drivers/net/Config.in linux-2.4.32.new/drivers/net/Config.in
\r
2520 --- linux-2.4.32/drivers/net/Config.in 2005-12-24 16:16:53.000000000 +0000
\r
2521 +++ linux-2.4.32.new/drivers/net/Config.in 2005-12-24 21:28:51.856666640 +0000
\r
2523 comment 'Ethernet (10 or 100Mbit)'
\r
2524 bool 'Ethernet (10 or 100Mbit)' CONFIG_NET_ETHERNET
\r
2525 if [ "$CONFIG_NET_ETHERNET" = "y" ]; then
\r
2526 + define_bool CONFIG_VENETDEV n
\r
2527 + define_bool CONFIG_MARVELL_ENET_PHY y
\r
2528 if [ "$CONFIG_ARM" = "y" ]; then
\r
2529 dep_bool ' ARM EBSA110 AM79C961A support' CONFIG_ARM_AM79C961A $CONFIG_ARCH_EBSA110
\r
2530 tristate ' Cirrus Logic CS8900A support' CONFIG_ARM_CIRRUS
\r
2531 diff -urN linux-2.4.32/drivers/net/wireless/Config.in linux-2.4.32.new/drivers/net/wireless/Config.in
\r
2532 --- linux-2.4.32/drivers/net/wireless/Config.in 2004-11-17 11:54:21.000000000 +0000
\r
2533 +++ linux-2.4.32.new/drivers/net/wireless/Config.in 2005-12-24 21:28:51.898660256 +0000
\r
2536 # yes, this works even when no drivers are selected
\r
2537 if [ "$CONFIG_ISA" = "y" -o "$CONFIG_PCI" = "y" -o \
\r
2538 - "$CONFIG_ALL_PPC" = "y" -o "$CONFIG_PCMCIA" != "n" ]; then
\r
2539 + "$CONFIG_ALL_PPC" = "y" -o "$CONFIG_PCMCIA" != "n" -o \
\r
2540 + "$CONFIG_NET_WIRELESS" = "y" ]; then
\r
2541 define_bool CONFIG_NET_WIRELESS y
\r
2543 define_bool CONFIG_NET_WIRELESS n
\r
2544 diff -urN linux-2.4.32/include/asm-mips/atheros/ar531xbsp.h linux-2.4.32.new/include/asm-mips/atheros/ar531xbsp.h
\r
2545 --- linux-2.4.32/include/asm-mips/atheros/ar531xbsp.h 1970-01-01 01:00:00.000000000 +0100
\r
2546 +++ linux-2.4.32.new/include/asm-mips/atheros/ar531xbsp.h 2005-12-24 20:29:06.898663096 +0000
\r
2548 +#ifndef __ASM_ATHEROS_BSP_SUPPORT_H
\r
2549 +#define __ASM_ATHEROS_BSP_SUPPORT_H
\r
2551 + * These are definitions and functions provided by the bsp to support the
\r
2552 + * AR5312 WiSoC running LSDK. For different BSP implementations, different
\r
2553 + * BSP functions will be needed.
\r
2556 +extern unsigned int ar531x_sys_frequency(void);
\r
2558 +#ifdef CONFIG_KGDB
\r
2559 +extern void kgdbInit(void);
\r
2560 +extern int kgdbEnabled(void);
\r
2563 +#endif /* __ASM_ATHEROS_BSP_SUPPORT_H */
\r
2564 diff -urN linux-2.4.32/include/asm-mips/bootinfo.h linux-2.4.32.new/include/asm-mips/bootinfo.h
\r
2565 --- linux-2.4.32/include/asm-mips/bootinfo.h 2005-12-24 16:08:53.000000000 +0000
\r
2566 +++ linux-2.4.32.new/include/asm-mips/bootinfo.h 2005-12-24 21:28:51.899660104 +0000
\r
2568 #define MACH_GROUP_HP_LJ 20 /* Hewlett Packard LaserJet */
\r
2569 #define MACH_GROUP_LASAT 21
\r
2570 #define MACH_GROUP_TITAN 22 /* PMC-Sierra Titan */
\r
2571 +#define MACH_GROUP_AR531X 23 /* Atheros AR531X */
\r
2574 * Valid machtype values for group unknown (low order halfword of mips_machtype)
\r
2575 @@ -201,6 +202,17 @@
\r
2577 #define MACH_TITAN_YOSEMITE 1 /* PMC-Sierra Yosemite */
\r
2580 + * Valid machtype for group MACH_GROUP_AR5312
\r
2582 +#define MACH_ATHEROS_UNUSED 0
\r
2583 +#define MACH_ATHEROS_AP30 1 /* AP30 */
\r
2584 +#define MACH_ATHEROS_AP33 2 /* AP33 */
\r
2585 +#define MACH_ATHEROS_AP38 3 /* AP38 */
\r
2586 +#define MACH_ATHEROS_AP43 4 /* AP43 */
\r
2587 +#define MACH_ATHEROS_AP48 5 /* AP48 */
\r
2588 +#define MACH_ATHEROS_PB32 6 /* PB32 */
\r
2590 #define CL_SIZE (256)
\r
2592 const char *get_system_type(void);
\r
2593 diff -urN linux-2.4.32/include/asm-mips/serial.h linux-2.4.32.new/include/asm-mips/serial.h
\r
2594 --- linux-2.4.32/include/asm-mips/serial.h 2005-01-19 14:10:12.000000000 +0000
\r
2595 +++ linux-2.4.32.new/include/asm-mips/serial.h 2005-12-24 21:28:51.901659800 +0000
\r
2596 @@ -467,6 +467,11 @@
\r
2597 #define DDB5477_SERIAL_PORT_DEFNS
\r
2600 +#if defined(CONFIG_AR531X)
\r
2601 +#undef RS_TABLE_SIZE
\r
2602 +#define RS_TABLE_SIZE 1
\r
2605 #define SERIAL_PORT_DFNS \
\r
2606 ATLAS_SERIAL_PORT_DEFNS \
\r
2607 AU1000_SERIAL_PORT_DEFNS \
\r
2608 diff -urN linux-2.4.32/kernel/printk.c linux-2.4.32.new/kernel/printk.c
\r
2609 --- linux-2.4.32/kernel/printk.c 2004-11-17 11:54:22.000000000 +0000
\r
2610 +++ linux-2.4.32.new/kernel/printk.c 2005-12-24 21:28:51.929655544 +0000
\r
2611 @@ -384,6 +384,18 @@
\r
2612 _call_console_drivers(start_print, end, msg_level);
\r
2615 +#if CONFIG_EARLY_PRINTK_HACK
\r
2616 +void putDebugChar(char byte);
\r
2617 +static void emit_log_char(char c)
\r
2619 + if (c == '\n') {
\r
2620 + putDebugChar('\r');
\r
2621 + putDebugChar('\n');
\r
2623 + putDebugChar(c);
\r
2627 static void emit_log_char(char c)
\r
2629 LOG_BUF(log_end) = c;
\r
2630 @@ -395,6 +407,7 @@
\r
2631 if (logged_chars < LOG_BUF_LEN)
\r
2637 * This is printk. It can be called from any context. We want it to work.
\r
2638 @@ -700,3 +713,4 @@
\r
2639 tty->driver.write(tty, 0, msg, strlen(msg));
\r
projects / openwrt.git / blob